CS2841B CS2841B Automotive Current Mode PWM Control Circuit Description The CS2841B provides all the necessary features to implement offline fixed frequency current-mode control with a minimum number of external components. Features quality and reliability in automotive applications. The CS2841B incorporates a precision temperature-controlled oscillator with an internally trimmed discharge current to minimize variations in frequency. Duty-cycles greater than 50% are also possible. On board logic ensures that VREF is stabilized before the output stage is enabled. Ion implant resistors provide tighter control of undervoltage lockout. The CS2841B (a variation of the CS-2843A) is designed specifically for use in automotive operation. The low start threshold voltage of 8.0V (typ), and the ability to survive 40V automotive load dump transients are important for automotive subsystem designs. The CS-2841 series has a history of Absolute Maximum Ratings Supply Voltage (Low Impedance Source)...................................................40V Output Current ...............................................................................................±1A Output Energy (Capacitive Load) .................................................................5µJ Analog Inputs (VFB, Sense) ............................................................-0.3V to 5.5V Error Amp Output Sink Current...............................................................10mA Lead Temperature Soldering Wave Solder (through hole styles only) ..........10 sec. max, 260°C peak Reflow (SMD styles only) ...........60 sec. max above 183°C, 230°C peak ■ Optimized for Off-line Control ■ Internally Trimmed Temperature Compensated Oscillator ■ Maximum Duty-cycle Clamp ■ VREF Stabilized before Output Stage Enabled ■ Low Start-up Current ■ Pulse-by-pulse Current Limiting ■ Improved Undervoltage Lockout ■ Double Pulse Suppression ■ 1% Trimmed Bandgap Reference ■ High Current Totem Pole Output Package Options Block Diagram 8 Lead PDIP V CC V CC Pwr Undervoltage Lock-out Circuit Set/ 5V Reset Reference Gnd V REF 8.0V/7.4V Internal Bias 2.50V OSC – Error Amplifier COMP 8 VREF VFB 2 7 VCC Sense 3 6 VOUT OSC 4 5 Gnd COMP 1 14 VREF NC 2 13 NC VFB 3 12 NC 4 11 VCC Pwr Sense 5 10 VOUT NC 6 9 Pwr Gnd OSC 7 8 Gnd NOR V OUT V FB 1 14 Lead SO Narrow Output Enable Oscillator S 2 R + COMP R VC R 1 V PWM Latch VCC Pwr Gnd Current Sensing Comparator Sense Cherry Semiconductor Corporation 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 Email: [email protected] Web Site: www.cherry-semi.com Rev. 6/23/99 1 A ® Company CS2841B Electrical Characteristics: d -40≤TA≤85˚C RT=680kΩ, CT=0.022µF for triangular mode, VCC=15V (Note 1), RT=10kΩ, CT=3.3nF for sawtooth mode (See Fig. 3), unless otherwise stated. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 4.90 5.00 5.10 V 6 20 mV ■ Reference Section Output Voltage TJ=25˚C, IOUT=1mA Line Regulation 8.4≤VCC≤16V Load Regulation 1≤IOUT≤20mA 6 25 mV Temperature Stability (Note 2) 0.2 0.4 mV/˚C Total Output Variation Line, Load, Temp. (Note 2) 5.18 V Output Noise Voltage 10Hz≤f≤10kHz, TJ=25˚C (Note 2) 4.82 50 µV Long Term Stability TA=125˚C, 1000 Hrs. (Note 2) 5 25 mV Output Short Circuit TA=25˚C -30 -100 -180 mA Initial Accuracy Sawtooth Mode: (See Fig. 3)TJ=25˚C Sawtooth Mode: -40˚C≤TA≤+85˚ Triangular Mode (See Fig. 3) TJ=25˚C 47 44 44 52 52 52 57 60 60 kHz kHz kHz Voltage Stability 8.4V≤Vcc≤16V 0.2 1.0 % Temperature Stability Sawtooth Mode TMIN≤TA≤TMAX Triangular Mode TMIN≤TA ≤TMAX (Note 2) 5 8 % % Amplitude VOSC (peak to peak) 1.7 V Discharge current TJ=25˚C TMIN≤TA≤TMAX 7.4 7.2 8.3 9.2 9.4 mA mA Input Voltage VCOMP=2.5V 2.42 2.50 2.58 V -0.3 -2.0 ■ Oscillator Section ■ Error Amp Section Input Bias Current VFB=0V AVOL 2≤VOUT≤4V 65 90 dB µA Unity Gain Bandwidth (Note 2) 0.7 1.0 MHz PSRR 8.4V≤VCC≤16V 60 70 dB Output Sink Current VFB=2.7V, VCOMP=1.1V 2 6 mA Output Source Current VFB=2.3V, VCOMP=5V -0.5 -0.8 mA VOUT High VFB=2.3V, RL=15kΩ to ground 5 6 VOUT Low VFB=2.7V, RL=15kΩ to VREF V 0.7 1.1 V ■ Current Sense Section Gain (Notes 3 & 4) 2.85 3.00 3.15 V/V Maximum Input Signal VCOMP=5V (Note 3) 0.9 1.0 1.1 V PSRR 12V≤VCC≤25V (Note 3) 70 Input Bias Current VSense=0V -2 -10 µA Delay to Output TJ=25˚C (Note 2) 150 300 ns Notes: dB 1. Adjust Vcc above the start threshold before setting at 15V. 3. Parameter measured at trip point of latch with VFB=0. 2.These parameters, although guaranteed, are not 100% tested in production. 4. Gain defined as: A= 2 ∆VCOMP ∆VSense ; 0 ≤ VSense ≤ 0.8V. PARAMETER TEST CONDITIONS MIN TYP MAX 0.1 1.5 0.4 2.2 UNIT ■ Output Section Output Low Level ISINK=20mA ISINK=200mA Output High Level ISOURCE=20mA ISOURCE=200mA Rise Time TJ=25˚C, CL=1nF (Note 2) Fall Time TJ=25˚C, CL=1nF (Note 2) 50 150 ns Output Leakage Undervoltage Active, VOUT=0 -0.01 -10.00 µA Start-Up Current 0.5 1.0 mA Operating Supply Current ICC VFB=VSense=0V, RT=10kΩ, CT=3.3nF 11 17 mA 7.6 8.0 8.4 V 7.0 7.4 7.8 V 13.0 12.0 13.5 13.5 50 V V V V 150 ns ■ Total Standby Current ■ Under-Voltage Lockout Section Start Threshold Min. Operating Voltage After Turn On Package Pin Description PACKAGE PIN # PIN SYMBOL FUNCTION 8L PDIP 14L SO Narrow 1 1 COMP 2 3 VFB 3 5 Sense Noninverting input to Current Sense Comparator 4 7 OSC Oscillator timing network with Capacitor to Ground, resistor to VREF 5 8 Gnd Ground 9 Pwr Gnd 10 VOUT 11 VCCPwr 7 12 VCC Positive power supply 8 14 VREF Output of 5V internal reference 2,4,6,13 NC No Connection 6 Error amp output, used to compensate error amplifier Error amp inverting input Output driver Ground Output drive pin Output driver positive supply 3 CS2841B Electrical Characteristics: continued CS2841B Typical Performance Characteristics: Oscillator Duty Cycle vs RT Oscillator Frequency vs CT 100 900 90 800 80 RT =680Ω DUTY CYCLE (%) FREQ. (kHz) 700 600 500 RT =1.5kΩ 400 60 50 40 30 300 20 200 RT =10kΩ 10 100 .0005 70 .001 .002 .003 .005 .01 .02 100 .03 .04 .05 200 300 400 500 700 1k 2k 3k 4k 5k 7k 10k RT (Ω) CT (µF) Test Circuit V REF RT 2N2222 V CC A 100kΩ 1kΩ Error Amp Adjust 4.7kΩ V REF COMP 4.7kΩ V FB 0.1µF V CC 0.1µF 5kΩ Sense Sense Adjust 1kΩ 1W VO V OUT OSC Gnd Gnd CT Circuit Description Undervoltage Lockout V CC During Undervoltage Lockout (Figure 1), the output driver is biased to a high impedance state. The output should be shunted to ground with a resistor to prevent output leakage current from activating the power switch. ON/OFF Command to reset of IC V ON = 8.0V V OFF = 7.4V PWM Waveform To generate the PWM waveform, the control voltage from the error amplifier is compared to a current sense signal which represents the peak output inductor current (Figure 2). An increase in VCC causes the inductor current slope to increase, thus reducing the duty cycle. This is an inherent feed-forward characteristic of current mode control, since the control voltage does not have to change during changes of input supply voltage. When the power supply sees a sudden large output current increase, the control voltage will increase allowing the duty cycle to momentarily increase. Since the duty cycle tends to exceed the maximum allowed to prevent trans- I CC <15mA <1mA V CC 7.4V 8.0V Figure 1: Typical Undervoltage Characteristics 4 former saturation in some power supplies, the internal oscillator waveform provides the maximum duty cycle clamp as programmed by the selection of OSC components. OSC OSC RESET Setting the Oscillator Oscillator timing capacitor, CT, is charged by VREF through RT and discharged by an internal current source. During the discharge time, the internal clock signal blanks out the output to the Low state, thus providing a user selected maximum duty cycle clamp. Charge and discharge times are determined by the general formulas: EA Output Switch Current VCC IO t c = RTCT ln VO t d = RTCT ln Figure 2: Timing Diagram for key CS2841B parameters ( ( VREF - Vlower VREF - Vupper ) VREF - IdRT - Vlower VREF - IdRT - Vupper ) Substituting in typical values for the parameters in the above formulas: VREF = 5.0V, Vupper = 2.7V, Vlower = 1.0V, Id = 8.3mA tc ≈ 0.5534RTCT V REF RT OSC CT td = RTCT ln Gnd ( 2.3 - 0.0083 RT 4.0 - 0.0083 RT ) The frequency and maximum duty cycle can be determined from the Typical Performance Characteristic graphs. Timing parameters Vupper Grounding High peak currents associated with capacitive loads necessitate careful grounding techniques. Timing and bypass capacitors should be connected close to Gnd pin in a single point ground. The transistor and 5kΩ potentiometer are used to sample the oscillator waveform and apply an adjustable ramp to Sense. Vlower tc td Sawtooth Mode LARGE RT (≈10kΩ) VOSC Internal Clock Triangular Mode SMALL RT (≈700kΩ) VOSC Internal Clock Figure 3: Oscillator Timing Network and parameters 5 CS2841B Circuit Description: continued CS2841B Package Specification PACKAGE THERMAL DATA PACKAGE DIMENSIONS IN mm (INCHES) Lead Count 8 Lead PDIP 14 Lead SO Narrow Metric Max Min 10.16 9.02 8.75 8.55 D Thermal Data English Max Min .400 .355 .344 .337 RΘJC RΘJA 8L PDIP 52 100 typ typ 14 L SO Narrow 30 125 ˚C/W ˚C/W Surface Mount Narrow Body (D); 150 mil wide 4.00 (.157) 3.80 (.150) 6.20 (.244) 5.80 (.228) 0.51 (.020) 0.33 (.013) 1.27 (.050) BSC 1.75 (.069) MAX 1.57 (.062) 1.37 (.054) 1.27 (.050) 0.40 (.016) 0.25 (.010) 0.19 (.008) 0.25 (0.10) 0.10 (.004) D REF: JEDEC MS-012 Plastic DIP (N); 300 mil wide 7.11 (.280) 6.10 (.240) 8.26 (.325) 7.62 (.300) 1.77 (.070) 1.14 (.045) 2.54 (.100) BSC 3.68 (.145) 2.92 (.115) .356 (.014) .203 (.008) 0.39 (.015) MIN. .558 (.022) .356 (.014) REF: JEDEC MS-001 D Some 8 and 16 lead packages may have 1/2 lead at the end of the package. All specs are the same. Ordering Information Part Number CS2841BEN8 CS2841BED14 CS2841BEDR14 Rev. 6/23/99 Description 8L PDIP 14L SO Narrow 14L SO Narrow (tape & reel) Cherry Semiconductor Corporation reserves the right to make changes to the specifications without notice. Please contact Cherry Semiconductor Corporation for the latest available information. 6 © 1999 Cherry Semiconductor Corporation