CS8161 CS8161 12V, 5V Low Dropout Dual Regulator with ENABLE Features Description The CS8161 is a 12V/5V dual output linear regulator. The 12V ± 5% output sources 400mA and the 5V ±2.0% output sources 200mA. The on board ENABLE function controls the regulatorÕs two outputs. When the ENABLE pin is low, the regulator is placed in SLEEP mode. Both outputs are disabled and the regulator draws only 200nA of quiescent current. The primary output, VOUT1 is protected against overvoltage conditions. Both outputs are protected against short circuit and thermal runaway conditions. The CS8161 is packaged in a 5 lead TOÐ220 with copper tab. The copper tab can be connected to a heat sink if necessary. It is also available in a 16 lead SO wide package. Absolute Maximum Ratings Input Voltage Operating Range .....................................................................Ð15V to 26V Overvoltage Protection.........................................................................74V Internal Power Dissipation ..................................................Internally Limited Junction Temperature Range.......................................................Ð40¡C +150¡C Storage Temperature Range....................................................Ð65¡C to +150¡C Lead Temperature Soldering Wave Solder (through hole styles only)..........10 sec. max, 260¡C peak Reflow (SMD styles only)...........60 sec. max above 183¡C, 230¡C peak ESD (Human Body Model) ...........................................................................2kV ■ Two regulated outputs 12V ±5.0%; 400mA 5V ±2.0%; 200mA ■ Very low SLEEP mode current drain 200nA ■ Fault Protection Reverse Battery (-15V) 74V Load Dump -100V Reverse Transient Short Circuit Thermal Shutdown Package Options TO-220 5 Lead Tab (Gnd) 1 2 3 4 5 Block Diagram V IN ENABLE V OUT 2 + + Pre-Regulator - - Anti-saturation and Current Limit 1 16 Lead SO Wide (internally fused leads) NC V OUT 1 Over Voltage Shutdown Gnd Bandgap Reference + Anti-saturation and Current Limit - VIN VOUT1 Gnd ENABLE VOUT2 Gnd 1 NC Gnd VIN NC Gnd Gnd Gnd Gnd VOUT(1) Thermal Shutdown SENSE1 SENSE1 VOUT(2) ENABLE NC Cherry Semiconductor Corporation 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 Email: [email protected] Web Site: www.cherry-semi.com Rev. 4/5/99 1 A ¨ Company CS8161 Electrical Characteristics for VOUT: 6V ² VIN ² 26V, IOUT1 = 5mA, IOUT2 = 5mA, -40¡C ² TJ ² +150ûC, -40¡C ² TA ² +125ûC; unless otherwise specified. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT 11.4 12.0 12.6 V 0.35 0.6 V ■ Primary Output Stage(VOUT1) Output Voltage, VOUT1 13V²VIN²26V, IOUT1²400mA Dropout Voltage IOUT1=400mA Line Regulation 13V²VIN²20V,5mA² IOUT<400mA 80 mV Load Regulation 5mA² IOUT1²400mA, VIN=14V 80 mV Quiescent Current IOUT1 =100mA, No Load on VOUT2 IOUT1 =400mA, No Load on VOUT2 12 75 mA mA Ripple Rejection f=120Hz, IOUT=300µA, VIN=15.0VDC, 2VRMS 8 50 42 Current Limit dB 0.40 1.0 A Reverse Polarity Input Voltage, DC VOUT1 ³-0.6V, 10½ Load -30 -18 V Reverse Polarity Input Voltage, Transient 1% Duty Cycle, t=100ms, VOUT³-6V, 10½ Load -80 -50 V 34 45 V 700 mA 5.10 V 0.60 V Over-voltage Shutdown 28 Short Circuit Current ■ Secondary Output (VOUT2) Output Voltage, (VOUT2) 6V²VIN²26V, IOUT2²200mA 4.90 Dropout Voltage IOUT2 ²200mA Line Regulation 6V²VIN²26V, 1mA²IOUT²200mA 50 mV Load Regulation 1mA²IOUT2²200mA, 9VIN=14V 50 mV Quiescent Current IOUT2 =50mA IOUT2 =200mA 10 35 mA mA Ripple Rejection f=120Hz; IOUT=10mA, VIN=15V, 2VRMS 0.35 5 20 42 Current Limit dB 200 Short Circuit Current 600 mA 400 mA 0.80 V V 500 10 µA µA 50 µA 210 ¡C 60 mA ■ ENABLE Function (ENABLE) Input ENABLE Threshold Input ENABLE Current VOUT1 Off VOUT1 On 2.00 VENABLE=5.5V VENABLE<0.8V 80 -10 1.30 1.30 ■ Other Features Sleep Mode VENABLE<0.4V 0.2 Thermal Shutdown 150 Quiescent Current in Dropout IOUT1=100mA, IOUT2=50mA 2 CS8161 Package Pin Description PACKAGE PIN # PIN SYMBOL FUNCTION 5 L TO-220 16L SO Wide 1 3 VIN Supply voltage, usually direct from battery. 2 6 VOUT1 Regulated output 12V, 400mA (typ) 3 4,5,12,13,15,16 Gnd Ground connection. 4 8 ENABLE CMOS compatible input pin; switches outputs on and off. When ENABLE is high VOUT1 and VOUT2 are active. 5 10 VOUT2 Output 5V, 200mA (typ). N/A 7 Sense1 Kelvin connection that allows remote sensing of V OUT 1 for improved regulation. If remote sensing is not required, connect to VOUT1. N/A 11 Sense2 Kelvin connection that allows remote sensing of V OUT 2 for improved regulation. If remote sensing is not required, connect to VOUT2. N/A 1,2,9,14 NC No Connection Typical Performance Characteristics Output Voltage vs. Temperature for VOUT1 Line Regulation vs. Output Current for VOUT1 10 12.150 VIN = 14V IOUT1 = 5A 12.110 0 Line Regulation (mV) 12.070 12.030 11.990 Volt 1 VIN = 13 - 26V 5 11.950 11.910 11.870 -5 -10 -20 125°C -25 11.830 -30 11.790 -35 11.750 25°C -15 -40°C -40 -40 -20 0 20 40 60 80 100 120 140 160 0 50 100 150 Temperature (Deg. C) 300 350 400 450 500 100 VIN = 14.0V 10 Quiescent Current (mA) 25°C 0 -5 -10 -15 -20 -30 VIN = 14.0V No Load on VOUT2 90 -40°C 5 Load Regulation (mV) 250 Quiescent Current vs. Output Current for VOUT1 Load Regulation vs. Output Current for VOUT1 15 200 Output Current (mA) 125°C 80 -40°C 25°C 70 60 50 40 30 20 125°C 10 -35 0 -40 0 50 100 150 200 250 300 350 400 450 0 500 50 100 150 200 250 300 Output Current (mA) Output Current (mA) 3 350 400 450 500 CS8161 Typical Performance Characteristics: continued Dropout Voltage vs. Output Voltage for VOUT1 Quiescent Current vs Output Current @ Dropout for VOUT1 150 600 VIN = 11V 130 500 Quiescent Current (mA) 25°C 400 350 300 -40°C 250 200 150 110 100 90 80 70 60 50 40 30 100 20 50 10 0 0 50 0 100 150 250 300 200 Output Current (mA) 350 400 450 0 500 50 100 150 200 250 300 350 400 450 500 Output Current (mA) Output Voltage vs. Temperature for VOUT2 Line Regulation vs Output Current for VOUT2 3 5.025 VIN = 6 - 26V VIN = 14V IOUT = 5mA 5.020 2 5.015 1 Load Regulation (mV) 5.010 5.005 5.000 4.995 4.990 0 -1 -2 -3 -4 4.985 -5 4.980 -6 125°C -7 4.975 -40 -20 0 20 40 60 80 100 120 140 160 -8 0 Temperature (Deg. C) 25 50 75 100 125 150 175 200 225 -40°C 25°C 250 Output Current (mA) Load Regulation vs Output Current for VOUT2 Quiescent Current vs Output Current for VOUT2 8 50 VIN = 14.0V 6 -40°C Quiescent Current (mA) 2 25°C 0 -2 -4 -6 -8 125°C -10 VIN = 14.0V No Load on VOUT1 45 4 Load Regulation (mV) Output Voltage -40°C 25°C 125°C 120 450 Dropout Voltage (mV) VIN = 11.0V No Load on VOUT2 140 125°C 550 40 35 125°C -40°C 25°C 30 25 20 15 10 -12 5 -14 0 0 -16 25 50 75 100 125 150 Output Current (mA) -18 0 25 50 75 100 125 150 175 200 225 250 Output Current (mA) 4 175 200 225 250 CS8161 Typical Performance Characteristics: continued Dropout Voltage vs. Output Current for VOUT2 Quiescent Current vs. Output Current @ Dropout for VOUT2 800 60 VIN = 4.0V No Load on VOUT1 750 700 55 50 650 600 550 500 450 350 300 125°C 45 -40°C Quiescent Current (mA) Dropout Voltage (mV) -40°C VIN = 4.0V 125°C 25°C 250 200 40 35 25°C 30 25 20 15 150 10 100 50 5 0 0 0 25 50 75 125 100 150 175 200 225 25 0 250 50 75 Output Current (mA) Enable Threshold Voltage vs. Temperature Cursor ( 1.8500V, 253.9nA.) Marker ( 1.8500V, 253.9nA.) VIN = 14.0V 200 175 225 250 12mA ENABLE Current vs. ENABLE Voltage ENABLE Current vs. ENABLE Voltage 1.305 5.0 100 4.0 1.300 1.295 1.290 I ENABLE 80 IENABLE ENABLE Voltage 125 150 100 Output Current (mA) 60 3.0 2.0 40 1.0 20 1.285 -40 -20 0 20 40 60 80 Temperature (Deg. C) 100 120 140 0 0.0 0.0 0 1 2 3 4 5 5 10 15 20 25 VENABLE VENABLE (V) Definition of Terms Load Regulation: The change in output voltage for a change in load current at constant chip temperature. Dropout Voltage: The input-output voltage differential at which the circuit ceases to regulate against further reduction in input voltage. Measured when the output voltage has dropped 100mV from the nominal value obtained at 14V input, dropout voltage is dependent upon load current and junction temperature. Long Term Stability: Output voltage stability under accelerated life-test conditions after 1000 hours with maximum rated voltage and junction temperature. Input Voltage: The DC voltage applied to the input terminals with respect to ground. Output Noise Voltage: The rms AC voltage at the output, with constant load and no input ripple, measured over a specified frequency range. Input Output Differential: The voltage difference between the unregulated input voltage and the regulated output voltage for which the regulator will operate. Quiescent Current: The part of the positive input current that does not contribute to the positive load current. i.e., the regulator ground lead current. Ripple Rejection: The ratio of the peak-to-peak input ripple voltage to the peak-to-peak output ripple voltage. Line Regulation: The change in output voltage for a change in the input voltage. The measurement is made under conditions of low dissipation or by using pulse techniques such that the average chip temperature is not significantly affected. Temperature Stability of VOUT: The percentage change in output voltage for a thermal variation from room temperature to either temperature extreme. 5 CS8161 Typical Circuit Waveform 60V VIN 14V ENABLE 2.0V 0.8V 26V 31V 14V 3V 12V 12V 12V 12V 12V 2.4V 0V VOUT1 0V VOUT2 0V 5V 0V 0V 5V 5V 2.4V 0V System Condition Turn On Load Dump Low VIN Line Noise, Etc. VOUT1 Short Circuit VOUT2 Short Circuit 0V Thermal Shutdown VOUT1 Turn Off Application Diagram C1 * 0.1 mF Display VIN VOUT1 + C2** 22mF CS8161 ENABLE Gnd VOUT2 Tuner + C3** 22mF NOTES: * C1 required if regulator is located far from power supply filter. ** C2, C3 required for stability, value may be increased. Capacitor must operate at minimum temperature expected. Application Notes Since both outputs are controlled by the same ENABLE, the CS8161 is ideal for applications where a sleep mode is required. Using the CS8161, a section of circuitry such as a display and nonessential 5V circuits can be shut down under microprocessor control to conserve energy. The capacitor value and type should be based on cost, availability, size and temperature constraints. A tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero ESR, can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (-25¡C to -40¡C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturers data sheet usually provide this information. The example in the Applications Diagram shows an automotive radio application where the display is powered by the 12V on VOUT1 and the Tuner IC is powered by the 5V on VOUT2. Neither output is required unless both the ignition and the Radio On/Off switch are on. The values for the output capacitors C2 and C3 shown in the Applications Circuit should work for most applications, however it is not necessarily the best solution. Stability Considerations To determine an acceptable value for C2 and C3 for a particular application, start with tantalum capacitors of the recommended value on each output and work towards less expensive alternative parts for each output in turn. The output compensation capacitor (Application diagram C2 and C3) helps determine three main characteristics of a linear regulator: start-up delay, load transient response and loop stability. 6 Step 1: Place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature and monitor the outputs on the oscilloscope. A decade box connected in series with the capacitor C2 will simulate the higher ESR of an aluminum capacitor. (Leave the decade box outside the chamber, the small resistance added by the longer leads is negligible) VOUT2(min) is the minimum output voltage from VOUT2, IOUT1(max) is the maximum output current, for the application IOUT2(max) is the maximum output current, for the application IQ is the quiescent current the regulator consumes at IOUT(max). Step 2: With the input voltage at its maximum value, increase the load current slowly from zero to full load while observing the output for any oscillations. If no oscillations are observed, the capacitor is large enough to ensure a stable design under steady state conditions. Once the value of PD(max) is known, the maximum permissible value of RQJA can be calculated: Step 3: Increase the ESR of the capacitor from zero using the decade box and vary the load current until oscillations appear. Record the values of load current and ESR that cause the greatest oscillation. This represents the worst case load conditions for the regulator at low temperature. RQJA = (2) The value of RQJA can then be compared with those in the package section of the data sheet. Those packages with RQJA's less than the calculated value in equation 2 will keep the die temperature below 150¡C. Step 4: Maintain the worst case load conditions set in step 3 and vary the input voltage until the oscillations increase. This point represents the worst case input voltage conditions. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. Step 5: If the capacitor C2 is adequate, repeat steps 3 and 4 with the next smaller valued capacitor. (A smaller capacitor will usually cost less and occupy less board space.) If the capacitor oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next larger standard capacitor value. IIN VIN Step 6: Test the load transient response by switching in various loads at several frequencies to simulate its real work environment. Vary the ESR to reduce ringing. Smart Regulator } Step 7: Remove the unit from the environmental chamber and heat the IC with a heat gun. Vary the load current as instructed in step 5 to test for any oscillations. IOUT1 VOUT1 IOUT2 VOUT2 Control Features IQ Once the minimum capacitor value with the maximum ESR is found, a safety factor should be added to allow for the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic capacitors have a tolerance of +/-20% so the minimum value found should be increased by at least 50% to allow for this tolerance plus the variation which will occur at low temperatures. The ESR of the capacitor should be less than 50% of the maximum allowable ESR found in step 3 above. Once the value for C2 is determined, repeat the steps to determine the appropriate value for C3. Figure 1: Dual output regulator with key performance parameters labeled. Heat Sinks A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RQJA. Calculating Power Dissipation in a Dual Output Linear Regulator RQJA = RQJC + RQCS + RQSA The maximum power dissipation for a dual output regulator (Figure 1) is PD(max) = {VIN(max)ÐVOUT1(min)}IOUT1(max)+ {VIN(max)ÐVOUT2(min)}IOUT2(max)+VIN(max)IQ 150¡C - TA PD (3) where RQJC = the junctionÐtoÐcase thermal resistance, RQCS = the caseÐtoÐheatsink thermal resistance, and RQSA = the heatsinkÐtoÐambient thermal resistance. RQJC appears in the package section of the data sheet. Like RQJA, it too is a function of package type. RQCS and RQSA are functions of the package type, heatsink and the interface between them. These values appear in heat sink data sheets of heat sink manufacturers. (1) Where VIN(max) is the maximum input voltage, VOUT1(min) is the minimum output voltage from VOUT1, 7 CS8161 Application Notes: continued CS8161 Package Specification PACKAGE THERMAL DATA PACKAGE DIMENSIONS IN mm(INCHES) D Lead Count Metric Max 10.50 16L SO Wide Thermal Data English Min 10.10 Max .413 RQJC RQJA Min .398 typ typ 5L TO-220 2.0 50 16L SO Wide 18 75 ûC/W ûC/W (internally fused leads) 5 Lead TO-220 (THA) Horizontal Surface Mount Wide Body (DW); 300 mil wide 4.83 (.190) 10.54 (.415) 9.78 (.385) 2.87 (.113) 2.62 (.103) 7.60 (.299) 7.40 (.291) 1.40 (.055) 10.65 (.419) 10.00 (.394) 14.99 (.590) 14.22 (.560) 6.55 (.258) 5.94 (.234) 0.51 (.020) 0.33 (.013) 4.06 (.160) 1.14 (.045) 3.96 (.156) 3.71 (.146) 2.77 (.109) 1.27 (.050) BSC 6.83 (.269) 2.49 (.098) 2.24 (.088) 1.27 (.050) 0.40 (.016) 2.65 (.104) 2.35 (.093) 1.68 (.066) TYP 1.70 (.067) 0.81(.032) 0.32 (.013) 0.23 (.009) 2.92 (.115) 2.29 (.090) 0.56 (.022) 0.36 (.014) 6.60 (.260) 5.84 (.230) 6.81(.268) D REF: JEDEC MS-013 0.30 (.012) 0.10 (.004) 5 Lead TO-220 (T) Straight 5 Lead TO-220 (TVA) Vertical 10.54 (.415) 9.78 (.385) 2.87 (.113) 6.55 (.258) 2.62 (.103) 5.94 (.234) 4.83 (.190) 4.06 (.160) 1.40 (.055) 1.14 (.045) 4.83 (.190) 4.06 (.160) 3.96 (.156) 3.71 (.146) 10.54 (.415) 9.78 (.385) 3.96 (.156) 3.71 (.146) 1.40 (.055) 1.14 (.045) 6.55 (.258) 5.94 (.234) 14.99 (.590) 14.22 (.560) 2.87 (.113) 2.62 (.103) 14.99 (.590) 14.22 (.560) 1.78 (.070) 14.22 (.560) 13.72 (.540) 2.92 (.115) 2.29 (.090) 8.64 (.340) 7.87 (.310) 1.02 (.040) 0.76 (.030) 4.34 (.171) 1.68 (.066) typ 1.70 (.067) 1.83(.072) 1.57(.062) 1.02(.040) 0.63(.025) 0.56 (.022) 0.36 (.014) 6.93(.273) 6.68(.263) 0.56 (.022) 0.36 (.014) 7.51 (.296) 6.80 (.268) .94 (.037) .69 (.027) 2.92 (.115) 2.29 (.090) Ordering Information Part Number CS8161YT5 CS8161YTVA5 CS8161YTHA5 CS8161YDWF16 CS8161YDWFR16 Rev. 4/5/99 Description 5L TO-220 Straight 5L TO-220 Vertical 5L TO-220 Horizontal 16L SO Wide 16L SO Wide (tape & reel) Cherry Semiconductor Corporation reserves the right to make changes to the specifications without notice. Please contact Cherry Semiconductor Corporation for the latest available information. 8 © 1999 Cherry Semiconductor Corporation