CS8271 CS8271 Adjustable Micropower Low Dropout Linear Regulator with ENABLE Features Description The CS8271 is an adjustable micropower voltage regulator with very low quiescent current (60µA typical at 100µA load). The output supplies 100mA of load current with a maximum dropout voltage of only 600mV. Control logic includes ENABLE . The combination of low quiescent current, outstanding regulator performance and control logic makes the CS8271 ideal for any battery operated equipment. The logic level compatible ENABLE pin allows the user to put the regu- lator into a shutdown mode where it draws only 50µA of quiescent current. The regulator is protected against reverse battery, short circuit, over voltage, and over temperature conditions. The device can withstand 60V load dump transients making it suitable for use in automotive environments. The CS8271 is pin compatible with the National Semiconductor LM2931. ■ Low Quiescent Current ■ Adjustable Output: 5V to 12V ■ ENABLE for Sleep Mode Control ■ 100mA Output Current Capability ■ Fault Protection +60V Load Dump -15V Reverse Voltage Short Circuit Thermal Shutdown ■ Low Reverse Current (Output to Input) Block Diagram VOUT VIN Current Source (Circuit Bias) Package Options Over Voltage Shutdown 8L SOIC & PDIP ENABLE Input Current Limit Sense VOUT Adj + Thermal Shutdown - Error VIN 1 Gnd NC NC NC Adj ENABLE Amplifier Bandgap Reference Gnd Other Packages: Consult factory for 16L SO Batwing, 5L TO-220 and D2PAK. Cherry Semiconductor Corporation 2000 South County Trail, East Greenwich, RI 02818 Tel: (401)885-3600 Fax: (401)885-5786 Email: [email protected] Web Site: www.cherry-semi.com Rev. 3/26/97 1 A ¨ Company CS8271 Absolute Maximum Ratings Power Dissipation.............................................................................................................................................Internally Limited Transient Input Voltage ..................................................................................................................................................-50V, 60V Reverse Battery..........................................................................................................................................................................-15V Output Current .................................................................................................................................................Internally Limited ESD Susceptibility (Human Body Model)..............................................................................................................................2kV Junction Temperature .............................................................................................................................................-40¡C to 150¡C Storage Temperature...............................................................................................................................................-55¡C to 150¡C Lead Temperature Soldering Wave Solder (through hole styles only) .....................................................................................10 sec. max, 260¡C peak Reflow (SMD styles only) ......................................................................................60 sec. max above 183¡C, 230¡C peak Adj and Enable Output ..................................................................................................................................................-0.3V, 10V ...........................................................................................................................................................................-0.3V, 20V VOUT Electrical Characteristics: VOUT + 1V ² VIN ² 30V, 5V ² VOUT ² 12V, IOUT = 10mA, -40¡ ² TA ² 125¡, -40¡ ² TJ ² 150¡, VENABLE = 0V; unless otherwise specified. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ■ Output Voltage Dropout Voltage IOUT = 100µA, VDROP = (VIN Ð VOUT) IOUT = 100mA, VDROP = (VIN Ð VOUT) 100 400 150 600 mV mV Load Regulation Measure VOUT when IOUT = 100µA, 100mA. LDREG = ABS (ÆVOUT) 0.1 1.0 %VOUT Line Regulation IOUT = 1mA. Measure VOUT when VIN = VOUT + 1V, 30V. LNREG = ABS (ÆVOUT) 0.1 0.5 %VOUT VIN = 6V, IOUT = 100µA, VOUT setup for 5V. IQ = IVIN - IOUT 55 120 µA VIN = 13V, IOUT = 100µA, VOUT setup for 12V. IQ = IVIN - 100µA 130 200 µA VIN = 30V, IOUT = 100µA, VOUT setup for 5V, IQ = IVIN - 100µA 150 450 µA VIN = 30V, IOUT = 100µA, VOUT setup for 12V, IQ = IVIN - 100µA 200 500 µA IOUT = 50mA, IQ = IVIN - 50mA 4 7 mA IOUT = 100mA, IQ = IVIN - 100mA 12 21 mA VIN = 6V, ENABLE = 2.5V, IQSLEEP = IVIN 20 50 µA VIN = 30V, ENABLE = 2.5V, IQSLEEP = IVIN 75 350 µA Quiescent Current, (IQ) Active Mode Quiescent Current, (IQ) Sleep Mode Ripple Rejection f=120Hz, (Note 1) 60 75 Current Limit VOUT = VOUT - 500mV, ILIM = IVOUT 105 200 300 mA Short Circuit Output Current VOUT=0V, ISHRT = IVOUT 15 100 215 mA Thermal Limit (Note 1) 150 180 210 ¡C Overvoltage Shutdown Adjust VIN from 28V to 40V until VOUT ² 1V 30 34 38 V Reverse Current VIN=0V, IREV = IVOUT, VOUT = 13.2V 100 200 µA 2 dB CS8271 Electrical Characteristics: VOUT + 1V ² VIN ² 30V, 5V ² VOUT ² 12V, IOUT = 10mA, -40¡ ² TA ² 125¡, -40¡ ² TJ ² 150¡, VENABLE = 0V; unless otherwise specified. PARAMETER TEST CONDITIONS MIN TYP MAX UNIT ■ ENABLE Enable Threshold 1.15 VENABLE = 2.6V VENABLE = 5V Enable Input Current ■ Adjustment Pin 2.0 2.6 V 10 35 20 50 µA µA R1: Feedback resistor between VOUT and Adjust, R2: Adjust resistor to ground. Reference Voltage 100µA ² IOU T² 100mA VREF (VOUT - VREF) IAdj = R2 R1 Adjustment Pin Current 1.246 1.272 1.297 V 20 500 nA Note 1: Guaranteed by design, not 100% tested in production. Package Pin Description PACKAGE PIN # PIN SYMBOL FUNCTION 8L SOIC & PDIP 1 VOUT 100mA output; adjustable from 5V to 12V. 2 Gnd Ground. 3, 6, 7 NC No Connection. 4 Adj Resistor divider from VOUT to Adj, sets output voltage. 5 ENABLE 8 VIN Logic level switch, when HIGH, regulator is in sleep mode. Input voltage. Circuit Description Output Voltage Adjustment The output voltage of the CS8271 is adjustable to any value between the reference voltage on the Adj pin, (1.272V Typ.) and the maximum input voltage minus the dropout voltage. To adjust the output voltage, a pair of external resistors R1 and R2 are connected as shown in Figure 1. The equation for the output voltage is VOUT = VREF x VOUT CS8271 VOUT R1 Adj VREF R2 ( ) R1 + R2 + IAdj x R1 R2 Figure 1: Output Voltage Adjustment. where Vref is the typical reference voltage and IAdj is the adjust pin bias current. This is usually 500nA maximum. 3 CS8271 Circuit Description: continued Should the junction temperature of the power device exceed 180ûC (typ) the power transistor is turned off. Thermal shutdown is an effective means to prevent die overheating since the power transistor is the principle heat source in the IC. Output Stage Protection The output stage is protected against overvoltage, short circuit and thermal runaway conditions (Figure 2). If the input voltage rises above 30V (e.g. load dump), the output shuts down. This response protects the internal circuitry and enables the IC to survive unexpected voltage transients up to 60V in magnitude. Short circuit protection limits the amount of current the output transistor can supply. In the case of a CS8271 under a short circuit condition, the output transistor current is limited to 100mA. ENABLE The ENABLE switches the output transistor. When the voltage on the ENABLE pin exceeds 2.0V typ, the output pass transistor turns off, leaving a high impedance facing the load. The IC will remain in Sleep mode, drawing only 20µA (typ), until the voltage on the ENABLE pin drops below the ENABLE threshold. > 30V VIN VOUT IOUT Load Dump Thermal Shutdown Short Circuit Figure 2: Typical Circuit Waveforms for Output Stage Protection. Application Notes To determine an acceptable value for COUT for a particular application, start with a tantalum capacitor of the recommended value and work towards a less expensive alternative part. Step 1: Place the completed circuit with a tantalum capacitor of the recommended value in an environmental chamber at the lowest specified operating temperature. Monitor the outputs on the oscilloscope. A decade box connected in series with the capacitor will simulate the higher ESR of an aluminum capacitor. (Leave the decade box outside the chamber, the small resistance added by the longer leads is negligible) Step 2: With the input voltage at its maximum value, increase the load current slowly from zero to full load while observing the output for any oscillations. If no oscillations are observed, the capacitor is large enough to ensure a stable design under steady state conditions. Step 3: Increase the ESR of the capacitor from zero using the decade box and vary the load current until oscillations appear. Record the values of load current and ESR that cause the greatest oscillation. This represents the worst case load conditions for the regulator at low temperature. Step 4: Maintain the worst case load conditions set in step 3 and vary the input voltage until the oscillations increase. This point represents the worst case input voltage conditions. Step 5: If the capacitor is adequate, repeat steps 3 and 4 with the next smaller valued capacitor. (A smaller capacitor will usually cost less and occupy less board space.) If the capacitor oscillates within the range of expected operating conditions, repeat steps 3 and 4 with the next larger standard capacitor value. Selecting the Right Capacitor Value The output compensation capacitor COUT, determines three main characteristics of a linear regulator: start-up delay, load transient response and loop stability. The selection of a capacitor value and type should be based on cost, availability, size and temperature constraints. A tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero ESR, can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (-25¡C to -40¡C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturers data sheet usually provide this information. The value for the output compensation capacitor COUT shown in Figure 3 should work for most applications, but it is not necessarily the least expensive or the optimal solution. VIN VOUT CIN 0.1mF CS8271 COUT 10mF RRST Adj ENABLE RL CAdj (optional) Figure 3: Test and application circuit showing an output compensation capacitor. 4 Step 6: Test the load transient response by switching in various loads at several frequencies to simulate its real work environment. Vary the ESR to reduce ringing. Step 7: Remove the unit from the environmental chamber and heat the IC with a heat gun. Vary the load current as instructed in step 5 to test for any oscillations. Once the minimum capacitor value with the maximum ESR is found, a safety factor should be added to allow for the tolerance of the capacitor and any variations in regulator performance. Most good quality aluminum electrolytic capacitors have a tolerance of ±20% so the minimum value found should be increased by at least 50% to allow for this tolerance plus the variation which will occur at low temperatures. The ESR of the capacitor should be less than 50% of the maximum allowable ESR found in step 3 above. Capacitance on the Adjust pin combined with the feedback resistors R1 and R2 can affect loop stability and should also be considered. The CS8271 internal circuitry produces about 5pF to Ground on the Adjust pin. This capacitance, plus any additional external capacitance on the Adjust pin will create a pole when combined with the resistive feedback network. The effect can be significant when using large values for the feedback resistors to minimize quiescent current. A capacitor connected from the Adjust pin to Ground provides additional means to compensate the regulator by creating a pole. Alternately, a capacitor can be connected from the Adjust pin to VOUT to create a zero. where VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current, for the application IQ is the quiescent current the regulator consumes at IOUT(max). IIN VIN IOUT Smart Regulator } VOUT Control Features IQ Figure 4: Single output regulator with key performance parameters labeled. Once the value of PD(max) is known, the maximum permissible value of RQJA can be calculated: RQJA = 150¡C - TA PD The value of RQJA can then be compared with those in the package section of the data sheet. Those packages with RQJA's less than the calculated value in equation 2 will keep the die temperature below 150¡C. Calculating Power Dissipation in a Single Output Linear Regulator The maximum power dissipation for a single output regulator (Figure 4) is PD(max)={VIN(max)ÐVOUT(min)}IOUT(max)+VIN(max)IQ (1) In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. Application Diagram VIN VOUT VOUT CS8271 C 1* 0.1mF (2) R1 ENABLE Adj C2** 10mF Vref Gnd R2 C1* Required if regulator is away from power supply filter. C2** Required for output stability. 5 VOUT = Vref x ( ) R1 + R2 + IAdj x R1 R2 CS8271 Application Notes: continued CS8271 Package Specification PACKAGE DIMENSIONS IN mm (INCHES) Lead Count 8L SOIC 8L PDIP Metric Max Min 5.00 4.80 10.16 9.02 PACKAGE THERMAL DATA D English Max Min .197 .189 .400 .355 Thermal Data RQJC RQJA 8L SOIC 45 165 typ typ 8L PDIP 52 100 ûC/W ûC/W Surface Mount Narrow Body (D); 150 mil wide 4.00 (.157) 3.80 (.150) 6.20 (.244) 5.80 (.228) 0.51 (.020) 0.33 (.013) 1.27 (.050) BSC 1.75 (.069) MAX 1.57 (.062) 1.37 (.054) 1.27 (.050) 0.40 (.016) 0.25 (.010) 0.19 (.008) 0.25 (0.10) 0.10 (.004) D REF: JEDEC MS-012 Plastic DIP (N); 300 mil wide 7.11 (.280) 6.10 (.240) 8.26 (.325) 7.62 (.300) 1.77 (.070) 1.14 (.045) 2.54 (.100) BSC 3.68 (.145) 2.92 (.115) .356 (.014) .203 (.008) 0.39 (.015) MIN. .558 (.022) .356 (.014) REF: JEDEC MS-001 D Some 8 and 16 lead packages may have 1/2 lead at the end of the package. All specs are the same. Ordering Information Part Number Description CS8271YD8 8L SOIC CS8271YDR8 8L SOIC (tape & reel) CS8271YN8 8L PDIP Rev. 3/26/97 Cherry Semiconductor Corporation reserves the right to make changes to the specifications without notice. Please contact Cherry Semiconductor Corporation for the latest available information. 6 © 1999 Cherry Semiconductor Corporation