1 DMC42C2008 4Bit Single Chip Microcontroller DESCRIPTION FEATURE The DMC42C2008 is a 4-bit single chip microcomputer with 8K bytes ROM, and is manufactured with CMOS silicon gate technology. The DMC42C2008 includes peripherals such as 8-bit Timer/Event Counters, 4-bit A/D Converter, 14-bit PWM, 8-bit PWM, 6-bit PWM, Watchdog Timer, 4-ch External Interrupts and OSD controller. It provides the hardware features, architectural enhancements and instructions that are necessary to make it a powerful and cost effective controller for applications requiring up to 64K bytes of programmable memory. Memory Mapped I/O Program Memory : 8192 x 10 bits Data Memory : 512 x 4 bits Instructions - Various Bit Manipulation - 8 bit Data Transfer, Compare, Arithmatic - 7 bit Relative Branch - 1 byte Absolute Call Instruction cycle times - Main ( XI = 4.19MHz ) . 15.3 us ( XI/64 = 65.5KHz ) . 1.91 us ( XI/8 = 524.0KHz ) . 0.95 us ( XI/4 = 1.05MHz ) PIN CONFIGURATION 4 Register Bank PC.0/PWM14 1 40 PC.1/PWM60 P8.3 2 39 PC.2/PWM61 P0.3/INT3 3 38 PC.3/PWM62 P0.2/INT2 4 37 PWMOTB/80 P0.1/INT1 5 PWMOTB/81 P0.0/INT0 6 36 35 XI 7 34 P3.0 XO 8 33 P3.1 RESETB 9 32 P3.2 P8.2 10 31 P3.3 VSS 11 30 P1.0 P8.1 12 29 P1.1 P8.0 13 28 P1.2 VDD 14 27 P1.3 P2.3 15 P2.2 16 P2.0 17 24 P6.1/VGPAD P2.1 18 23 P6.0/VRPAD OSCIN 19 22 VSYNCBP OSCOUT 20 21 HSYNCBP D M C 4 2 C 2 0 0 8 PWMOTB/82 26 VBLNKPAD 25 VBPAD General Register - 8 x 4 bit x 4 Banks Accumulator - Bit Accumulator (CY), 4 bit Accumulator (A), 8 bit Accumulator (XA) Multiple Vectored Interrupt Source - External Interrupts : 4 - Internal Interrupts : 3 - Vsync Interrupts : 1 Watch timer - fast mode : 3.91 msec - normal mode : 0.5 sec - buzzer output : 1, 2, 4 KHz Basic interval timer - 8 kinds of period - Used stabilization wait timer to wake up Stop mode Two 8-bit timer / event counters 2 DMC42C2008 4Bit Single Chip Microcontroller 4 Bit A/D Converter Programmable Comparator Input AFC Input Signal Detection Circuit PWM - 14 Bits PWM Output x 1Ch - 8 Bits PWM Output x 3Ch - 6 Bits PWM Output x 3Ch Power saving mode - STOP : Main clock, CPU clock stop - STBY : Only CPU clock stop Main clock operation Package : 40 DIP 29 I/O Pins - CMOS I/O Pins : 22 (Digital CMOS Levels Schmitt Triggered) - PWM Pins : 7 OSD CONTROLLER SPEC. Character ROM ; 12 x 16 x 96 bits Video RAM ; 120 x 10 Bits OSD Clock ; 4MHz ~ 7MHz Character Number ; 96 Display Capacity ; 20 Columns x 6 Lines (120 Character) Character Size ; 16 Kinds (4 x 4 Kinds) - Horizontal 1T, 2T, 3T, 4T/Dots - Vertical 1H, 2H, 3H, 4H/Dots Character Color ; 8 Colors Black, Blue, Green, Red, Magenta, Yellow, White, Cyan Display Mode ; 3 Modes Character, Fringe, Background Background Color ; 8 Colors - Character Background Area Mode - All TV Display Area Mode OSD Oscillator Control Modes ; (Always Oscillate, Oscillates Only in the Display Period LC Oscillator) Display Position ; 1'st line, 2'nd line Variable Structure of Character 12 (Width) x 16 (Height) dots Vsync Interrupt 3 DMC42C2008 4Bit Single Chip Microcontroller BLOCK DIAGRAM WATCH DOG TIMER BASIC INTERVAL TIMER IRQBT TI0/P0.0 TO0/P2.2 TIMER/ EVENT COUNTER 0 DMC42CORE PORT 0 P0.0P0.3 PORT 1 P1.0-P1.3 PORT 2 P2.0-P2.3 PORT 3 P3.0-P3.3 PORT 6 P6.0- PORT 8 P8.0-P8.3 PORTC PC.0- IRQTC0 TI1/P0.1 TO1/P2.3 TIMER/ EVENT COUNTER 1 IRQTC1 INT0/P0.0 INT1/P0.1 INT2/P0.2 INT3/P0.3 14BIT OUTPUT INTERRUPT CONTROL PWM 14 BIT 8BIT OUTPUT PWM 8 BIT 6BIT OUTPUT PWM 6 BIT AD0-AD4 4-BIT ADC PWMOT DATA MEMORY (512 x 4BITS) PROGRAM (8192 x 10BITS) PWMOT B RED GREEN BLUE F x /2n CPU CLOCK CLOCK CLOCK CLOCK OUTPUT GENERADIVIDER CONTROL TOR STAND -BY CONTROL OSD BLANK HSYNC VSYNC OSCIN OSCOUT VDD VSS P2.0/CLO RESETB TEST XI XO 4 4Bit Single Chip Microcontroller DMC42C2008 PROGRAM MEMORY (ROM) 0000H VECTOR ADDRESS CONTENTS VECTOR ADDRESS AREA 0000H 0002H 001FH 0020H 0004H ZERO-PAGE CALL AREA 0006H 0008H 002FH 000AH 0060H 000CH Prioty 0 1 2 3 4 5 6 INTERRUPT SUORCE Reset Signal RESET Basic Interval Timer IRQBT External interrupt 0 IRQ0 External interrupt 1 IRQ1 IRQTC0 Timer Event Counter 0 IRQTC1 Timer Event Counter 1 External interrupt 2 IRQ2 000EH 0010H 8 IRQ3 External interrupt 3 10 IRQAD 8 bit ADC 12 IRQWT Watch Timer 15 - reserved 0012H 0014H 8K Byte 0016H 0018H 001AH 001CH 1FFFH 001EH DATA MEMORY (RAM) DIRECT m INDIRECT STACK @HL @DE @DL $00 PAGE0 (256 Byte) $FF $00 PAGE1 (256 Byte) MB=0 BANK 0 $FF (1K) $00 PAGE2 (256 Byte) $FF $00 PAGE3 I/O (256 Byte)MEMORY $FF MB=0 MP=0 SPS=0 MP=1 SPS=1 GENERAL REGISTER RB=0 RB=1 RB=2 RB=4 200~27F OSD RAM MP=2 MP=3 SPS=2 ; Usable 5 4Bit Single Chip Microcontroller DMC42C2008 I/O ADDRESS MAP ADDRESS Hardware Module Name b3 318H 319H 31AH 31BH 31CH 31DH 320H 321H 322H 323H 324H 325H 326H 327H 328H 329H 32AH 32BH 332H 334H 335H 336H 337H 338H 339H 340H 342H 343H 344H 345H 346H 347H 348H 349H 34AH 34BH 34CH 34DH 354H 355H 358H 35AH 35BH b2 b1 R/W b0 Stack pointer low (SPL) Stack pointer high (SPH) SP3 SP2 SP1 SP0 SP5 SP4 AC IS1 IS0 CY Z OV T T/E counter mode register 0 (TMOD0) T/E counter register 0 (TMCNT0) T/E reference register 0 (TMREF0) T/E counter mode register 1 (TMOD1) T/E counter register 1 (TMCNT1) T/E reference register 1 (TMREF1) Basic Timer mode register(BMOD) Basic interval timer count register(BITCNT) Watch timer mode register (WMOD) Watch dog timer mode register (WDTM) WDTF Pwm mode register0(PWMOD0) Pwm0 data register high (PWMODH) Pwm0 data register low (PWMODL) Pwm channel start mode register (PWMSM) Pwm60 data register (PWMDR0) Addressing Unit 1 bit R/W R/W R/W R/W R/W O W 320H.3 4 bit 8bit O O O O O O REMARKS INITIAL VALUE R Stack pointer low stack pointer high Stack Page Select Low (SPSL) Stack Page Select High (SPSh) Psw low (PSWL) Psw high (PSWH) Clock source select. counter start (ch0) readable count value (ch0) 00 W count reference register (ch0) FF 00 R clock source select. counter start (ch1) readable count value (ch1) 00 W count reference register (ch1) FF R/W 332H.3 R clock select, Bit start readable count register 0 00 R/W 336H.3 clock/buzzer select. bit3 readable clock source sel. timer EN/DIS 00 00 0 0 00 W O 326H.3 W E F 0 0 0 0 00 R R/W W O WDT flag 6.14bit pwm counter EN/DIS 14bit pwm data register high W O 14bit pwm data register low 00 W O 6bit*6ch, 14bit pwm start EN/DIS 00 W O 6bit pwm channel 0 data register 00 Pwm61 data register (PWMDR1) W O 6bit pwm channel 1 data register 00 Pwm62 data register (PWMDR2) W O 6bit pwm channel 2 data register 00 PWM3 W O pwm output enable mode register (PWM0 = 14bit) 8bit pwm control 8bit pwm channel 0 data register 00 PWM2 PWM1 PWM0 PWM6 PWM5 PWM4 Pwm mode register 1 (PWMOD1) Pwm80 data register (PWMDR80) W W O O 00 6 4Bit Single Chip Microcontroller ADDRESS Hardware Module Name b3 35CH 35DH 35EH 35FH 360H 361H 362H 363H 364H 365H 366H 367H 368H 36AH 36BH 36CH 36DH 36EH 36FH 380H 381H 382H 3A0H 3A2H 3A4H 3B2H 3C2H 3C3H 3C4H 3C5H 3C6H 3C7H 3D8H 3D9H 3DAH 3DBH 3DCH 3DDH 3DEH b2 b1 DMC42C2008 R/W b0 Addressing Unit 1 bit 4 bit REMARKS 8bit INITIAL VALUE Pwm81 data register (PWMDR81) W O 8bit pwm channel 1 data register 00 Pwm82 data register (PWMDR82) W O 8bit pwm channel 2 data register 00 1'st line horizontal display mode register (HDPM1) 1'st line vertical display mode register (VDPM1) H/V character size mode register (HVSMOD) Display mode & background color register (DBCM) W O 00 W O W O W O 1'st line horizontal position set. 000000h-111111h 1'st line vertical position set. 000000h-111111h 1, 2, 3, 4Tc/dot 1, 2, 3, 4H/dot dspon, R/G/B control I/O polarity control register (POLCON) 2'nd line horizontal display mode register (HDPM2) 2'nd line vertical display mode register (VDPM2) Adc4 mode register (ADCM4) Adc4 output latch (ADCOL4) Power control register (PCON) Operating mode register (SCMOD) Clock output mode register (CLOMD) Power on flag (PONF) IME IPSR3 IPSR2 IPSR1 IPSR0 External interrupt mode register0 (IMOD0) External interrupt mode register1 (IMOD1) External interrupt mode register2 (IMOD2) External interrupt mode register3 (IMOD3) IE2 IRQ2 IEBT IRQBT IEWT IRQWT IETC1 IE1 IRQTC1 IETC0 IRQ1 IE0 IE3 IRQTC0 IRQ0 IRQ3 W W O 00 00 00 W O W O W O osd out enable Y(BLK), R/G/B output, H/Vsync control 2'nd line horizoncal position set. 000011h-111111h 2'nd line vertical position set. 000000h-111111h Reference voltage setting. start 0 00 O O conversion data system clock select, idle, stop mode main/sub system clock select cpu clock output select, clock out EN/DIS power on reset flag Interrupt priorty select, IME flag. external interrupt 0 edge detection external interrupt 1 edge detection external interrupt 2 edge detection external interrupt 3 edge detection Interrupt EN/IRQ flag Interrupt EN/IRQ flag Interrupt EN/IRQ flag Interrupt EN/IRQ flag Interrupt EN/IRQ flag Interrupt EN/IRQ flag Interrupt EN/IRQ flag 00 O R R/W R/W W O O O O P/W 3B2H.0 R/W 3C2H.3 W O W O W O W O R/W R/W R/W R/W R/W R/W R/W O O O O O O O O O O O O O O 0 00 00 00 00 0 00 0 00 00 00 00 0 0 0 0 0 0 0 7 4Bit Single Chip Microcontroller ADDRESS Hardware Module Name b3 3E0H 3E1H 3E2H 3E3H 3E6H 3E7H 3E8H 3E9H 3ECH 3EDH 3F0H 3F1H 3F2H 3F3H 3F6H 3F8H 3FCH b2 PW03 PW02 PW13 PW12 PW23 PW22 PW33 PW32 PW63 PW62 PW73 PW72 PW83 PW82 PW93 PW92 PWC3 PWC2 PWD3 PWD2 PORT0 (R0) PORT1 (R1) PORT2 (R2) PORT3 (R3) PORT6 (R6) PORT8 (R8) PORTC (RC) b1 PW01 PW11 PW21 PW31 PW61 PW71 PW81 PW91 PWC1 PWD1 DMC42C2008 R/W b0 PW00 PW10 PW20 PW30 PW60 PW70 PW80 PW90 PWC0 PWD0 Addressing Unit 1 bit 4 bit REMARKS 8bit INITIAL VALUE W O port 0, 1 mode register (PMGA) 00 W O port 2, 3 mode register (PMGB) 00 W O port 6, 7 mode register (PMGD) 00 W O port 8, 9 mode register (PMGE) 00 W O port c, d mode register (PMGG) 00 R0 Port Data Regiter R1 Port Data Regiter R2 Port Data Regiter R3 Port Data Regiter R6 Port Data Regiter R8 Port Data Regiter RC Port Data Regiter 0 0 0 0 0 0 0 R/W R/W R/W R/W R/W R/W R/W O O O O O O O O O O O O O O 8 4Bit Single Chip Microcontroller DMC42C2008 PIN DESCRIPTION PIN SYMBOL P0.0 P0.1 P0.2 P0.3 SHARED PIN INT0/TI0 EPA11 INT0/TI1 EPA12 INT2 EPA13 INT3 CEX I/O RESET PORT TYPE INPUT PUR(M.O) BPS * External Interrupt Input Port by means of The Rising/Falling Edge Detection I/O * Event Pulse Input Port for the Timer/Event Counter 1bit Data Input Port (EXCEPT ; INT2, INT3) (PORT0) EPA8--EPA10 I/O PWM14 EPA0 PWM6 O INPUT, PUR(M.O) BPS INPUT, PUR(M.O) BPS INPUT BPAS PUR(M.O) INPUT BPS PUR(M.O) * 4 bit I/O Port (PORT3) INPUT, PUR(M.O) BP-PDND * OSD Red, Green, Output Port (PORT6) INPUT BP-PDNDS PUR(M.O) * 4 bit I/O Port INPUT BPS PUR(M.O) PWM14 Output Port Push Pull (PORTC) HIGH LEVEL OP O PWM6 Output Port Open Drain (PORTC) HIGH LEVEL Only PWM8 Output Port Open Drain (PWMOTB) HIGH LEVEL O I I O O I O I O I OSD Horizontal Signal Input Port OSD Vertical Signal Input Port Video Blue Signal Output Port Video Blank Signal Output Port Main Oscillator Input Main Oscillator Output OSD Oscillator Input OSD Oscillator Output Reset Port INPUT INPUT HIGH LEVEL HIGH LEVEL P1.0-P1.3 P2.0 P2.1 EPD0---EPD3 P2.2 P2.3 P3.0-P3.3 P6.0 P6.1 P8.0-P8.2 P8.3 PC.0 ----- I/O EPA4---EPA7 I/O I/O PC.1-PC.3 FUNCTION CLO COMPIN --EPD4 I/O I/O I/O * 4 bit I/O Port (PORT1) * Clock Output Port (PORT2) * Compare Analog Input * 4 bit I/O Port (PORT2) * 4 bit I/O Port (PORT2) OD EPA1---EPA3 PWMOT80 PWM8 PWMOT81 PWM8 PWMOT82 PWM8 HSYNC --VSYNC VPPOEX VBPAD --VBLKPAD --XI --XO --OSCIN --OSCOUT --RESETB --- OD IP IP OP OP 9 DMC42C2008 4Bit Single Chip Microcontroller I/O CIRCUITS BPS OD VDD VDD OUTPUT ENABLE OU PUR (M.O DATA PA DATA OUTPUT DISABLE VSS VSS INTERNAL Schmitt Trigger BD BPAS VDD PUR (M.O) VDD VDD PUR (M.O) OUTPU T DATA PA PA DATA OUTPU T INTERNA L ANALOG VSS INPUT CONTROL VSS ANALOG INPUT INTERNA BP-PDNDS BP-PDND VD Output TR Disable OUTPU T VDD Output TR Disable PUR (M.O) DATA PA VDD VDD PUR (M.O) OUTPU T DATA PA Output TR Disable Output TR Disable VSS INTERNA NOTE) PUR : Pull-Up Resistor M.O : Mask Option VSS INTERNA 10 DMC42C2008 4Bit Single Chip Microcontroller OSC X-TAL SYSTOP OSCIN INTERNA XI VSS OSCOUT VSS INTERNA IP XI OP XO 11 4Bit Single Chip Microcontroller DMC42C2008 ABSOLUTE MAXIMUM RATINGS (TA = 0¡É to 70¡É, VDD = 5V ±10%, fX = 4.19MHz) PARAMETER SYMBOL CONDITION RATING UNIT VDD - -0.3 to +7.0 V Input Voltage VI All I/O ports -0.3 to VDD+0.3 V Output Voltage VO All I/O ports -0.3 to VDD+0.3 V Output Current High IOH One I/O port active -10 mA All I/O ports active -100 One I/O port active 20 All I/O ports active 200 Industrial -40 to +85 Commercial 0 to +70 - -55 to +125 Supply Voltage Output Current Low Operating Temperature Storage Temperature IOL TA Tstg mA ¡É ¡É * Exceeding beyond those listed values under "Absolute Maximum Ratings" may cause permanent damage to the device. 12 DMC42C2008 4Bit Single Chip Microcontroller DC ELECTRICAL CHARACTERISTICS (VSS = 0, VDD = 5V ±10%, TA = 25¡É, fX = 4.19MHz) PARAMETER SYMBOL TEST LIMIT CONDITION High Level VIH1 Port 0, 1, 2, 6, 8, HSYNC, VSYNC, RESETB Input Voltage Low Level (Schmitt Input) VIH2 XI, OSCIN VIH3 Port 3 VIL1 Port 0, 1, 2, 6, 8, HSYNC, VSYNC, RESETB Input Voltage High Level MIN. TYP. MAX. 0.8 V - VDD VDD 0.5 0.7 - VDD - VDD 0 - 0.2 V V (Schmitt Input) VIL2 XI, OSCIN 0 - 0.4 VIL3 Port 3 0 - 0.3 - - - - 0.4 - - 0.4 - - 2 All Pin Except XI, OSCIN - 1.2 3 XI, OSCIN - 5 15 All Pin Except XI, OSCIN - -1.2 -3 XI, OSCIN - -5 -15 Dynamic - - 10 VOH Port 0, 1, 2, 3, 6, 8, PC0, VBPAD, VBLKPADVDD - 0.4 V V (IOH = - 0.75mA) Output Voltage Low Level UNIT VOL Port 0, 1, 2, 3, 6, 8, PC0, VBPAD, VBLKPAD (IOL = 1mA) Output Voltage PC1, PC2, PC3, PWMOT8 (0 ~ 2) V (IOL = 0.75mA) Open Drain PC1, PC2, PC3, PWMOT8 (0 ~ 2) (IOL = 10mA) High Level Input IIH Leakage Current Low Level Input IIL Leakage Current Supply Current IDD1 Main Clock (XI) Mode = 4.19MHz Idle Mode VDD = 5V ±10% uA mA - - 5 13 DMC42C2008 4Bit Single Chip Microcontroller DC ELECTRICAL CHARACTERISTICS (VSS = 0, VDD = 5V ±10%, TA = 25¡É, fX = 4.19MHz) PARAMETER SYMBOL Supply Current TEST LIMIT UNIT CONDITION MIN. TYP. MAX. Dynamic - - 2 IDD2 Main Clock (XI) Mode = 2MHz VDD = 3V ±10% Idle mA - - 1 - - 5 Mode - - 3 All Ports - - 40 20 - 60 Mode IDD3 Main Clock (XI) = 4.19MHz Internal Pull-up RPU Resistor (M.O) Pull-up Resistor Stop VDD = 5V ±10% uA VI or VO = 0V, VDD = 5V RL1 VI = 0V, VDD = 5V ±10% RESETB Kohm 14 4Bit Single Chip Microcontroller DMC42C2008 AC ELECTRICAL CHARACTERISTICS (TA = -40 to +85¡É, VDD = 2.7 to 6.0V) PARAMETER SYMBOL TEST CONDITION MIN. TYP. MAX. UNIT tCY VDD = 4.5 to 6.0V 0.95 - 64 uS VDD = 2.7 to 3.3V 3.8 - 64 uS VDD = 4.5 to 6.0V 0 - 1 MHz VDD = 2.7 to 3.3V 0 - 275 KHz VDD = 4.5 to 6.0V 0.48 - - uS VDD = 2.7 to 3.3V 1.8 - - uS 5 - - uS 5 - - uS RESETB Low Level tINTH tINTL tRSL 5 - - uS Hsync Start to Vosc Stop TdHsOl 1TpC 2TpV Hsync End to Vosc Start TdHsOh Cycle Time TI Input Frequency TI Input High, Low Level Width INT 0 ~ 4 Input Level High, Low fTI tTIH tTIL 1TpV 15 4Bit Single Chip Microcontroller DMC42C2008 AC Timing Measurement Points (Except XI and XTI) Measurement Points 0.8VD 0.2VD 0.2VD 1/XI Clock Timing tXH tXL XI 0.8VD VDD0.4V 1/XTI tXT tXTL XTI VDD0.4V Timer Event Counter 1/fTI tTIL TI0 tTIH 0.8VD 0.2VD Interrupt Input Timing tINT INT0~3 tINT 0.8VD 0.2VD RESETB Input Timing tRS RESET 0.2VD HSYNC TdHsOl Internal/OSC2 On-Screen-Display TdHsOh 16 DMC42C2008 4Bit Single Chip Microcontroller RAM DATA RETENTION CHARACTERISTICS ( in STOP Mode ) (TA = -40 to +85¡É) PARAMETER SYMBOL Data Retention Supply Voltage VDDDR Data Retention Supply Current IDDDR Release Signal Set Time tSREL Oscillation Stabilization Wait Time tWAIT TEST CONDITION MIN. TYP. MAX. UNIT 2.0 - 6.0 V - 0.1 10 uA 0 - - uS When released by RESETB - 217/fx - mS When released by interrupt Signal - NOTE 1) - mS VDDDR = 2.0V NOTE 1) Depends on the setting of the basic interval timer mode register. (refer to the table below) ( fX = 4.19MHz ) BMOD2 BMOD1 BMOD0 Oscillation Stabilization 20 0 0 0 2 /fX (Approximately 250ms) 0 1 1 217/fX (Approximately 31.3ms) 1 0 0 215/fX (Approximately 7.82ms) 1 0 1 213/fX (Approximately 1.95ms) 17 4Bit Single Chip Microcontroller DMC42C2008 RAM DATA RETENTION TIMING When STOP mode is released by RESETB input Internal Reset Operation Stabilization Wait Time Operation Mode STOP Mode RAM Data retention VDD VDDDR STOP instruction execution tSREL RESET tWAI When STOP mode is released by interrupt signal Stabilization Wait Time Operation Mode STOP Mode RAM Data retention VDD VDDDR STOP instruction execution tSREL Interrupt Signal (Rising Edge) tWAI 18 DMC42P2008 4Bit Single Chip Microcontroller DMC42P2008 DESCRIPTION The DMC42P2008 is a system evaluation LSI having a build in One-Time-Programming circuit. A programming and verification for the internal EPROM is achieved by using a adaptor socket. The function of this device is exactly same as the DMC42C2008 with programming of internal EPROM. The DMC42P2008 is the OTP version of the DMC42C2008 with replacement of MASK to EPROM as as an internal ROM. PIN CONFIGURATIONS 1 40 PC.1/EPA1/PWM60 P8.3 2 39 PC.2/EPA2/PWM61 INT3 / P0.3 / CEX 3 38 PC.3/EPA3/PWM62 INT2 / P0.2 / EPA13 4 37 PWMOTB/80 INT1 / P0.1 / EPA12 5 36 PWMOTB/81 INT0 / P0.0 / EPA11 6 35 PWMOTB/82 34 P3.0 / EPA4 33 P3.1 / EPA5 P3.2 / EPA6 PC.0/EPA0/PWM1 XI 7 XO 8 RESETB 9 P8.2 / EPA10 10 VSS 11 P8.1 / EPA9 P8.0 / EPA8 12 VDD 14 P2.3 15 P2.2 16 P2.0 17 P2.1 13 D M C 4 2 P 2 0 0 8 32 31 30 29 28 P3.3 / EPA7 P1.0 / EPD0 P1.1 / EPD1 P1.2 / EPD2 27 P1.3 / EPD3 26 VBLNKPAD 25 24 VBPAD P6.1 / EPD4 / VGPAD 18 23 P6.0 / VRPAD OSCIN 19 22 VSYNCBP / VPP/OEX OSCOUT 20 21 HSYNCBP 19 DMC42P2008 4Bit Single Chip Microcontroller DEVICE OPERATION The operational modes of the DMC42P2008 are listed in Table 1. A single 5V power supply is required in the read mode. All inputs are TTL levels except for VPP / OEX. VPP = 12.5±0.5V PINS CEX VPP / OEX VDD OUTPU READ VIL VIL 5.0V DOUT PROGRAM VIL VPP 6.0V DIN VERIFY VIL VIL 6.0V DOUT PROGRAM INHIBIT VIH VPP 6.0V High Z MODE TABLE 1. Operating Modes MODE PIN NAME EPROM MODE USER MODE TEST VIL VIH RESETB VIL VIH VIL TABLE 2. The modes of DMC42P2008 DC PROGRAMMING CHARACTERISTICS PARAMETER SYMBO L LIMIT TEST CONDITION MIN. UNIT MAX. Input Low Voltage VIL -0.1 0.8 V Input High Voltage VIH 2.0 VDD V Output Low Voltage during Verify VOL IOL = 2.1mA - 0.45 V IOH = -400uA 2.4 - V Output High Voltage during Verify VOH Quick-pulse Programming VPP 12.5 13.0 V Quick-pulse Programming VDD 6.0 6.5 V 20 DMC42C/P2008 4Bit Single Chip Microcontroller PACKAGE DIMENSION [ UNIT : Millimeter ] 40 DIP 21 40 .620 RAD 13.85±0.35 1 2 52.3±0.2 15.50±0.2 0.4±0.1 15.9±0.10 1.7±0.2 3.32±0.08 0.65±0.15 3.49±0.31 1.86±0.34 2.54 0.44±0.06 1.26±0.24 STANDARD FORMAT (I) L S B M S B 0 0 0 1 1 1 2 10 20 30 40 50 60 70 80 90 A0 B0 C0 D0 E0 F0 ¤Ì 22 3 3 3 4 4 5 5 STANDARD FORMAT(II) B L S M S 00 10 20 30 40 50 60 70 80 90 A0 B0 C0 D0 E0 F0 0 1 2 3 4 5