ST49C101A-XX High Frequency Clock Multiplier January 1999 -3 APPLICATIONS FEATURES • Voltage Controlled Crystal Oscillator (VCXO) • Mask Programmable Analog Phase Locked Loop • Up to 200MHz Operation • Preprogrammed Multiplication Factors of 2, 3, 4, 5, 6, 8, 10 and 12X • System Clock Multiplication in: • Computer Systems • Telecommunications Systems • Set-top Boxes • Low Output Jitter • Replace Expensive High Frequency Oscillator • Crystal Oscillator Circuit On Chip • Low Power Single Supply 5V or 3.3V CMOS Technology • Small 8 Lead SOIC Package GENERAL DESCRIPTION The ST49C101A-XX is a mask programmable monolithic analog phase locked loop device, designed to replace existing high frequency crystal oscillator with a low frequency crystal. The high performance ST49C101A-XX provides low jitter clock output and operates up to 180 MHz. at 3.3 volts power supply. The ST49C101A-XX supports preprogrammed multiplication factors of 2,3,4,5,6,8,10 and 12X. ORDERING INFORMATION Part Number. Package Operating Temperature Range ST49C101ACF8-01 8 Lead 150 Mil Jedec SOIC 0oC to 70oC ST49C101ACF8-03 8 Lead 150 Mil Jedec SOIC 0oC to 70oC ST49C101ACF8-05 8 Lead 150 Mil Jedec SOIC 0oC to 70oC ST49C101ACF8-06 8 Lead 150 Mil Jedec SOIC 0oC to 70oC ST49C101ACF8-07 8 Lead 150 Mil Jedec SOIC 0oC to 70oC ST49C101ACF8-08 8 Lead 150 Mil Jedec SOIC 0oC to 70oC ST49C101ACF8-09 8 Lead 150 Mil Jedec SOIC 0oC to 70oC ST49C101ACF8-10 8 Lead 150 Mil Jedec SOIC 0oC to 70oC ST49C101ACF8-13 8 Lead 150 Mil Jedec SOIC 0oC to 70oC ST49C101ACF8-15 8 Lead 150 Mil Jedec SOIC 0oC to 70oC Consult Factory Die 0oC to 70oC Rev. 2.20 EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 • (510) 668-7000 • FAX (510) 668-7017 ST49C101A-XX XTAL1 XTAL2 Oscillator Circuit Programmable Counter B Phase Detector Charge Pump Loop Filter Programmable Counter A Voltage Controlled Oscillator Programmable Counter C Voltage Reference Circuit Output Buffer CLOCK VCC OE Figure 1. Block Diagram Rev. 2.20 2 ST49C101A-XX XTAL1 OE AGND DGND 1 8 2 3 7 6 4 5 XTAL2 AVCC DVCC CLOCK 8 Pin SOIC (Jedec, 0.150") PIN DESCRIPTION Pin # Symbol Type Description 1 XTAL1 I Crystal or External Clock Input. A crystal can be connected to this pin and XTAL2 pin to generate internal phase locked loop reference clock. For external clock, XTAL2 is left open or used as buffered clock output. 21 OE I Clock Output Enable (Active high). CLOCK output is three stated when this pin is low. Connect to DVCC for normal operation. 3 AGND O Analog Ground. 4 DGND O Digital Ground. 5 CLOCK O Programmed Output Clock. 6 DVCC I Positive Supply Voltage. Single +5 or 3.3 volts. 7 AVCC I Analog Supply Voltage. Single +5 or 3.3 volts. 8 XTAL2 O Crystal Output. Note: 1Has internal weak pull-up resistor Rev. 2.20 3 ST49C101A-XX MULTIPLICATION FACTOR AND OUTPUT FREQUENCY SELECTION Table 1. Preprogrammed Options The ST49C101A-XX contains an analog phase locked loop (PLL) circuit with digital closed loop dividers and a final output divider to achieve the desired dividing ratios for the clock output. The preprogrammed multiplication factor and output frequency are shown on Table 1. The accuracy of the output frequency produced by the ST49C101A-XX depends on its input frequency and multiplication factor. APPLICATIONS Two application examples are shown in Figure 2 and 3. Figure 2 shows a lower cost high frequency crystal oscillator circuit using the ST49C101-xx to increase the fundamental crystal frequency. The crystal Y1 is connected to XTAL1 and XTAL2 pins to use the internal oscillator circuit. The oscillator provides the reference clock to the PLL circuit for clock rate multiplication. Figure 3 shows a similar circuit using external clock input on XTAL1 pin instead. If a sinewave is used for external clock, it may be necessary to AC couple the signal with a 0.047uF capacitor to XTAL1 pin so that the internal circuitry can establish the proper bias. Also, keep the peak-topeak signal, at XTAL pin, above ground level (AGND) and below AVCC. As a general board layout rule, it is recommended to use two 0.01µF bypass capacitors on DVCC and AVCC power supply pins, and put them as closely as possible to the chip. ST49C101A-XX Factor Max. Output Frequency1 VCC1 ST49C101A-01 12 200 MHz 140 MHz 5.0 V 3.3 V ST49C101A-03 8 200 MHz 140 MHz 5.0 V 3.3 V ST49C101A-05 6 200 MHz 140 MHz 5.0 V 3.3 V ST49C101A-06 4 120 MHz 5.0 or 3.3 V ST49C101A-07 3 80 MHz 70 MHz 5.0 V 3.3 V ST49C101A-08 2 80 MHz 70 MHz 5.0 V 3.3 V ST49C101A-09 5 200 MHz 140 MHz 5.0 V 3.3 V ST49C101A-10 10 180 MHz 3.3 V ST49C101A-13 8 180 MHz 3.3 V ST49C101A-15 6 180 MHz 3.3 V Notes 1 See AC electrical characteristics for maximum operating frequency. Rev. 2.20 4 ST49C101A-XX AVCC DVCC C1 C2 0.01uF 0.01uF AGND U1 1 Parallel Cut Fundamental Resonance 20-30pF Load 7 AVCC XTAL1 DGND 6 DVCC Y1 ST49C101A-XX Crystal 8 2 DVCC XTAL2 5 CLOCK CLOCK= Xtal Freq. x Option OE AGND DGND 3 4 AGND DGND Figure 2. High Frequency Crystal Oscillator Using a Crystal for Reference. AVCC DVCC C2 C1 0.01uF 0.01uF DGND AGND U1 1 CLKin 7 6 AVCC DVCC XTAL1 ST49C101A-XX 8 5 XTAL2 DVCC 2 CLOCK OE AGND CLOCK = CLKin x Option DGND 3 4 AGND DGND Figure 3. High Frequency Clock Rate Multiplication Using External Clock. Rev. 2.20 5 ST49C101A-XX DC ELECTRICAL CHARACTERISTICS Test Conditions: TA = 25°C, VCC = 5.0V + 10%, Operating Temperature Range 0°C to 70°C Unless Otherwise Specified Symbol Parameter VIL Input Low Level VIH Input High Level VOL Output Low Level VOH Output High Level IIL Input Low Current IIH Input High Current ICC Operating Current RIN Input Pull-up Resistance Min. Typ. Max. Unit 0.8 V 2.0 V 0.5 V IOL = 8.0 mA V IOH = 8.0 mA -100 µA OE Pin only 1 µA VIN=VCC, OE Pin only 35 50 mA No Load. CLOCK=100MHz 110 155 kΩ 2.8 75 Conditions AC ELECTRICAL CHARACTERISTICS Test Conditions: TA = 25°C, VCC = 5.0V + 10%, Operating Temperature Range 0°C to 70°C Unless Otherwise Specified Symbol T1,T2 Parameter Min. CLOCK Rise/Fall Time Typ. Max. Unit Conditions 1.5 3 ns Load=30 pF, 0.2 VCC - 0.8 VCC T4 T4 + T5 Duty Cycle 45 50 55 % VCC/2 Switch Point Up To 100MHz, Load = 20pF T4 T4 + T5 Duty Cycle 40 50 60 % VCC/2 Switch Point 100-150MHz, 95Ω (AC Terminated) T3 Jitter 1 Sigma +0.4 +1 % Of Period T3 Jitter Absolute +1 +3 % Of Period TIN Input Reference Frequency 12 20 30 MHz TOUT Output Frequency 50 50 50 200 200 200 MHz MHz MHz ST49C101A-01 ST49C101A-03 ST49C101A-05 50 120 MHz ST49C101A-06 25 80 MHz ST49C101A-07 25 80 MHz ST49C101A-08 50 200 MHz ST49C101A-09 Rev. 2.20 6 ST49C101A-XX DC ELECTRICAL CHARACTERISTICS Test Conditions: TA = 25°C, VCC =3.3V +/- 10%, Operating Temperature Range 0°C to 70°C Unless Otherwise Specified Symbol Parameter VIL Input Low Level VIH Input High Level VOL Output Low Level VOH Output High Level IIL Input Low Current IIH Input High Current ICC Operating Current RIN Input Pull–up Resistance Min. Typ. Max. Unit 0.8 V 2.0 V 0.5 V IOL = 4.0mA V IOH = 4.0mA -100 µA OE Pin Only 2.0 75 Conditions 1 µA VIN=VCC, OE Pin only 22 40 mA No Load. CLOCK=100MHz 110 155 kΩ AC ELECTRICAL CHARACTERISTICS Test Conditions: TA = 25°C, VCC =3.3V +/- 10%, Operating Temperature Range 0°C to 70°C Unless Otherwise Specified Symbol Parameter T1, T2 CLOCK Rise/Fall Time T4 T4+T5 Duty Cycle Min. 45 Typ. Max. Unit Conditions 2 4 ns Load = 30 pF, 0.2 VCC - 0.8 VCC 50 55 % VCC/2 switch point up to 100MHz, Load = 30 pF T4 T4+T5 Duty Cycle 40 50 60 % VCC/2 switch point 100-150MHz, 95Ω (AC Terminated) T3 Jitter 1 Sigma + 0.4 +1 % Of Period T3 Jitter Absolute +1 +3 % Of Period TIN Input Reference Frequency 12 20 30 MHz TOUT Output Frequency 50 140 MHz ST49C101A-01 50 50 140 140 MHz MHz ST49C101A-03 ST49C101A-05 50 150 MHz ST49C101A-05 at VCC=3.13V min. 50 120 MHz ST49C101A-06 25 70 MHz ST49C101A-07 25 70 MHz ST49C101A-08 50 140 MHz ST49C101A-09 25 180 MHz ST49C101A-10 at VCC=3.13V min. 25 180 MHz ST49C101A-13 at VCC=3.13V min. 25 180 MHz ST49C101A-15 at VCC=3.13V min. Rev. 2.20 7 ST49C101A-XX ABSOLUTE MAXIMUM RATINGS Supply Range Voltage at Any Pin Operating Temperature ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ Storage Temperature Package Dissipation 7V GND-0.3V to VCC +0.3V 0°C to +70°C ○ ○ ○ ○ ○ ○ ○ ○ T2 ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ ○ T1 Output Clock T5 T4 Figure 4. Timing Diagram Rev. 2.20 8 T3 ○ ○ -40°C to +150°C 500mW ○ ○ ○ ○ ○ ST49C101A-XX Rev. 2.20 9 ST49C101A-XX NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained here in are only for illustration purposes and may vary depending upon a user’s specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for in accuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Copyright 1999 EXAR Corporation Datasheet January 1999 Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited. Rev. 2.20 10