TI SN74HC266NSR

 SCLS135F − DECEMBER 1982 − REVISED AUGUST 2003
D Wide Operating Voltage Range of 2 V to 6 V
D High-Current Inverting Outputs Drive Up To
10 LSTTL Loads
D Low Power Consumption, 20-µA Max ICC
D Typical tpd = 10 ns
D ±4-mA Output Drive at 5 V
D Low Input Current of 1 µA Max
1
14
2
13
3
12
4
11
5
10
6
9
7
8
VCC
4B
4A
4Y
3Y
3B
3A
1Y
NC
2Y
NC
2A
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
4A
NC
4Y
NC
3Y
2B
GND
NC
3A
3B
1A
1B
1Y
2Y
2A
2B
GND
SN54HC266 . . . FK PACKAGE
(TOP VIEW)
1B
1A
NC
VCC
4B
SN54HC266 . . . J OR W PACKAGE
SN74HC266 . . . D, N, OR NS PACKAGE
(TOP VIEW)
NC − No internal connection
description/ordering information
The ’HC266 devices have four independent 2-input exclusive-NOR gates and feature open-drain outputs. They
perform the Boolean function Y = A ⊗ B or Y = AB + AB in positive logic.
ORDERING INFORMATION
PACKAGE†
TA
PDIP − N
−40°C
−40
C to 85
85°C
C
−55°C
−55
C to 125
125°C
C
ORDERABLE
PART NUMBER
TOP-SIDE
MARKING
Tube of 25
SN74HC266N
Tube of 50
SN74HC266D
Reel of 2500
SN74HC266DR
Reel of 250
SN74HC266DT
SOP − NS
Reel of 2000
SN74HC266NSR
HC266
CDIP − J
Tube of 25
SNJ54HC266J
SNJ54HC266J
CFP − W
Tube of 150
SNJ54HC266W
SNJ54HC266W
SOIC − D
SN74HC266N
HC266
LCCC − FK
Tube of 55
SNJ54HC266FK
SNJ54HC266FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  2003, Texas Instruments Incorporated
!"#$%& "!&'& &(!)$'!& "#))%& ' !( *#+,"'!& '%- )!#" "!&(!)$ !
*%"("'!& *%) % %)$ !( %.' &)#$%& '&') /'))'&0)!#"!& *)!"%&1 !% &! &%"%'),0 &",#% %&1 !( ',,
*')'$%%)POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCLS135F − DECEMBER 1982 − REVISED AUGUST 2003
FUNCTION TABLE
INPUTS
B
OUTPUT
Y
L
L
H
L
H
L
H
L
L
H
H
H
A
logic diagram, each gate (positive logic)
A
Y
B
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±25 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): D package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 3)
SN54HC266
VCC
VIH
Supply voltage
High-level input voltage
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
VCC = 2 V
VIL
VI
VO
∆t/∆v
Low-level input voltage
MAX
2
5
6
MIN
NOM
MAX
2
5
6
1.5
1.5
3.15
3.15
4.2
4.2
0
Output voltage
Input transition rise/fall time
NOM
VCC = 4.5 V
VCC = 6 V
Input voltage
SN74HC266
MIN
0
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
0.5
0.5
1.35
1.8
1.8
0
0
V
V
1.35
VCC
VCC
UNIT
VCC
VCC
1000
1000
500
500
400
400
V
V
V
ns
TA
Operating free-air temperature
−55
125
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
&(!)$'!& "!&"%)& *)!#" & % (!)$'2% !)
%1& *'% !( %2%,!*$%&- ')'"%)" '' '& !%)
*%"("'!& ')% %1& 1!',- %.' &)#$%& )%%)2% % )1 !
"'&1% !) "!&&#% %% *)!#" /!# &!"%-
2
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• DALLAS, TEXAS 75265
SCLS135F − DECEMBER 1982 − REVISED AUGUST 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
IOH
VOL
II
ICC
TEST CONDITIONS
VI = VIH or VIL,
VCC
VO = VCC
TA = 25°C
TYP
MAX
SN54HC266
MIN
MAX
SN74HC266
MIN
MAX
UNIT
µA
6V
0.01
0.5
10
5
2V
0.002
0.1
0.1
0.1
IOL = 20 µA
4.5 V
0.001
0.1
0.1
0.1
6V
0.001
0.1
0.1
0.1
IOL = 4 mA
IOL = 5.2 mA
4.5 V
0.17
0.26
0.4
0.33
6V
0.15
0.26
0.4
0.33
6V
±0.1
±100
±1000
±1000
nA
2
40
20
µA
10
10
10
pF
VI = VIH or VIL
VI = VCC or 0
VI = VCC or 0,
MIN
IO = 0
6V
Ci
2 V to 6 V
3
V
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
tPLH
tPHL
FROM
(INPUT)
TO
(OUTPUT)
A or B
Y
A or B
Y
tt
Y
VCC
MIN
TA = 25°C
TYP
MAX
SN54HC266
MIN
MAX
SN74HC266
MIN
MAX
2V
60
125
190
155
4.5 V
13
25
38
31
6V
10
23
32
26
2V
60
100
150
125
4.5 V
13
20
30
25
6V
10
17
25
21
2V
28
75
110
95
4.5 V
8
15
22
19
6V
6
13
19
16
UNIT
ns
ns
ns
operating characteristics, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance per gate
No load
TYP
35
UNIT
pF
&(!)$'!& "!&"%)& *)!#" & % (!)$'2% !)
%1& *'% !( %2%,!*$%&- ')'"%)" '' '& !%)
*%"("'!& ')% %1& 1!',- %.' &)#$%& )%%)2% % )1 !
"'&1% !) "!&&#% %% *)!#" /!# &!"%-
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SCLS135F − DECEMBER 1982 − REVISED AUGUST 2003
PARAMETER MEASUREMENT INFORMATION
VCC
RL = 1 kΩ
From Output
Under Test
VCC
Test
Point
Input
50%
0V
CL = 50 pF
(see Note A)
tPLH
In-Phase
Output
LOAD CIRCUIT
Input
50%
10%
90%
VCC
50%
10% 0 V
90%
tr
50%
tPHL
90%
10%
tPHL
Out-of-Phase
Output
90%
tf
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
tPLH
50%
10%
10%
VOH
50%
10% V
OL
tf
VOH
VOL
tf
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
NOTES: A. CL includes probe and test-fixture capacitance.
B. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
C. The outputs are measured one at a time with one input transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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Copyright © 2007, Texas Instruments Incorporated
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
SN74HC266D
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HC266DE4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HC266DG4
ACTIVE
SOIC
D
14
50
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HC266DR
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HC266DRE4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HC266DRG4
ACTIVE
SOIC
D
14
2500 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HC266DT
ACTIVE
SOIC
D
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HC266DTE4
ACTIVE
SOIC
D
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HC266DTG4
ACTIVE
SOIC
D
14
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HC266N
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74HC266NE4
ACTIVE
PDIP
N
14
25
Pb-Free
(RoHS)
CU NIPDAU
N / A for Pkg Type
SN74HC266NSR
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HC266NSRE4
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74HC266NSRG4
ACTIVE
SO
NS
14
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Oct-2007
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SN74HC266DR
D
14
SITE 41
330
16
6.5
9.0
2.1
8
16
Q1
SN74HC266NSR
NS
14
SITE 41
330
16
8.2
10.5
2.5
12
16
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
Device
4-Oct-2007
Package
Pins
Site
Length (mm)
Width (mm)
Height (mm)
SN74HC266DR
D
14
SITE 41
346.0
346.0
33.0
SN74HC266NSR
NS
14
SITE 41
346.0
346.0
33.0
Pack Materials-Page 2