TI SN74AUP1G126DRLR

SCES596D – JULY 2004 – REVISED JUNE 2005
D Available in the Texas Instruments
D
D
D
D
D
D
D
D Wide Operating VCC Range of 0.8 V to 3.6 V
D Optimized for 3.3-V Operation
D 3.6-V I/O Tolerant to Support Mixed-Mode
NanoStar and NanoFree Packages
Low Static-Power Consumption
(ICC = 0.9 µA Max)
Low Dynamic-Power Consumption
(Cpd = 4 pF Typ at 3.3 V)
Low Input Capacitance (Ci = 1.5 pF Typ)
Low Noise − Overshoot and Undershoot
<10% of VCC
Input-Disable Feature Allows Floating Input
Conditions
Ioff Supports Partial-Power-Down Mode
Operation
Input Hysteresis Allows Slow Input
Transition and Better Switching Noise
Immunity at Input
1
OE
VCC
5
1
A
A
2
GND
3
D
D
DCK PACKAGE
(TOP VIEW)
DBV PACKAGE
(TOP VIEW)
OE
D
D
D
Signal Operation
tpd = 4.6 ns Max at 3.3 V
Suitable for Point-to-Point Applications
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Performance Tested Per JESD 22
− 2000-V Human-Body Model
(A114-B, Class II)
− 200-V Machine Model (A115-A)
− 1000-V Charged-Device Model (C101)
ESD Protection Exceeds ±5000 V With
Human-Body Model
5
DRL PACKAGE
(TOP VIEW)
VCC
OE
1
A
2
GND
4
VCC
5
3 4
GND
3
1 5
OE
Y
4
Y
2
A
2
GND
3
YEP OR YZP PACKAGE
(BOTTOM VIEW)
VCC
Y
Y
4
See mechanical drawings for dimensions.
description /ordering information
The AUP family is TI’s premier solution to the industry’s low-power needs in battery-powered portable
applications. This family ensures a very low static and dynamic power consumption across the entire VCC range
of 0.8 V to 3.6 V, resulting in an increased battery life. This product also maintains excellent signal integrity (see
Figures 1 and 2).
Static-Power Consumption
(µA)
Dynamic-Power Consumption
(pF)
100%
100%
80%
80%
40%
3
60%
3.3-V
Logic†
3.3-V
Logic
LVC †
40%
AUP
0%
2.5
Input
2
Output
1.5
1
0.5
20%
20%
0%
3.5
Voltage − V
60%
Switching Characteristics
at 25 MHz†
AUP
† Single, dual, and triple gates
0
−0.5
0
5
10
15
20 25 30
Time − ns
35
40
45
† AUP1G08 data at CL = 15 pF
Figure 1. AUP − The Lowest-Power Family
Figure 2. Excellent Signal Integrity
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar and NanoFree are trademarks of Texas Instruments.
Copyright  2005, Texas Instruments Incorporated
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"&#"0 !)) '!!&"&#+
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
1
SCES596D – JULY 2004 – REVISED JUNE 2005
description/ordering information (continued)
This bus buffer gate is a single line driver with a 3-state output. The output is disabled when the output-enable
(OE) input is low. This device has the input-disable feature, which allows floating input signals.
To ensure the high-impedance state during power up or power down, OE should be tied to GND through a
pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the
driver.
NanoStar and NanoFree package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
−40°C to 85°C
ORDERABLE
PART NUMBER
PACKAGE†
TA
NanoStar − WCSP (DSBGA)
0.23-mm Large Bump − YEP
Tape and reel
SN74AUP1G126YEPR
NanoFree − WCSP (DSBGA)
0.23-mm Large Bump − YZP (Pb-free)
Tape and reel
SN74AUP1G126YZPR
SOT (SOT-23) − DBV
Tape and reel
SN74AUP1G126DBVR
SOT (SC-70) − DCK
Tape and reel
SN74AUP1G126DCKR
SOT (SOT-553) − DRL
Reel of 4000
SN74AUP1G126DRLR
TOP-SIDE
MARKING‡
_ _ _HN_
†
H26_
HN_
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
‡ DBV/DCK/DRL: The actual top-side marking has one additional character that designates the assembly/test site.
YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition
(1 = SnPb, • = Pb-free).
FUNCTION TABLE
INPUTS
OE
A
OUTPUT
Y
H
H
H
H
L
X§
Z
L
L
§ Floating inputs allowed.
logic diagram (positive logic)
1
OE
A
2
2
POST OFFICE BOX 655303
4
• DALLAS, TEXAS 75265
Y
SCES596D – JULY 2004 – REVISED JUNE 2005
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Voltage range applied to any output in the high-impedance or power-off state, VO
(see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Output voltage range in the high or low state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA
Package thermal impedance, θJA (see Note 2): DBV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 206°C/W
DCK package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 252°C/W
DRL package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 142°C/W
YEP/YZP package . . . . . . . . . . . . . . . . . . . . . . . . . . . 132°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51-7.
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
3
SCES596D – JULY 2004 – REVISED JUNE 2005
recommended operating conditions (see Note 3)
VCC
VIH
VIL
VO
Supply voltage
VCC = 0.8 V
VCC = 1.1 V to 1.95 V
High-level input voltage
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 0.8 V
VCC = 1.1 V to 1.95 V
Low-level input voltage
Output voltage
High-level output current
∆t/∆v
Low-level output current
Input transition rise or fall rate
0.8
3.6
VCC
0.65 × VCC
3.6
1.6
3.6
2
3.6
UNIT
V
3.6
V
0
0
0.35 × VCC
0
0.7
0
0.9
Active state
0
3-state
0
VCC
3.6
V
−20
µA
V
−1.1
VCC = 1.4 V
VCC = 1.65
−1.7
VCC = 2.3 V
VCC = 3 V
−3.1
VCC = 0.8 V
VCC = 1.1 V
IOL
MAX
VCC = 2.3 V to 2.7 V
VCC = 3 V to 3.6 V
VCC = 0.8 V
VCC = 1.1 V
IOH
MIN
−1.9
mA
−4
20
µA
1.1
VCC = 1.4 V
VCC = 1.65 V
1.7
VCC = 2.3 V
VCC = 3 V
3.1
VCC = 0.8 V to 3.6 V
200
1.9
mA
4
ns/V
TA
Operating free-air temperature
−40
85
°C
NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
4
POST OFFICE BOX 655303
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SCES596D – JULY 2004 – REVISED JUNE 2005
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VOH
VOL
II
A or OE
input
TEST CONDITIONS
VCC
1.4 V
1.11
1.65 V
1.32
1.3
2.05
1.97
1.9
1.85
2.72
2.67
2.6
2.55
IOH = −2.3 mA
IOH = −3.1 mA
2.3 V
IOH = −2.7 mA
IOH = −4 mA
3V
All inputs
Ci
VCC − 0.1
0.75 × VCC
UNIT
VCC − 0.1
0.7 × VCC
1.03
V
IOL = 20 µA
IOL = 1.1 mA
0.8 V to 3.6 V
0.1
0.1
1.1 V
0.3 × VCC
0.3 × VCC
IOL = 1.7 mA
IOL = 1.9 mA
1.4 V
0.31
0.37
1.65 V
0.31
0.35
0.31
0.33
0.44
0.45
0.31
0.33
0.44
0.45
0 V to 3.6 V
0.1
0.5
µA
0V
0.2
0.6
µA
0 V to 0.2 V
0.2
0.6
µA
0.5
µA
0.9
µA
IOL = 2.3 mA
IOL = 3.1 mA
2.3 V
IOL = 2.7 mA
IOL = 4 mA
3V
VI = GND to 3.6 V
VO = VCC or GND
VI = GND or (VCC to 3.6 V),
OE = VCC, IO = 0
∆ICC
TA = −40°C TO 85°C
MIN
MAX
IOH = −1.7 mA
IOH = −1.9 mA
1.1 V
IOZ
OE input
MAX
0.8 V to 3.6 V
VI or VO = 0 V to 3.6 V
VI or VO = 0 V to 3.6 V
A input
TA = 25°C
TYP
IOH = −20 µA
IOH = −1.1 mA
Ioff
∆Ioff
ICC
MIN
VI = VCC − 0.6 V†, IO = 0
VI = GND to 3.6 V,
OE = GND‡
VI = VCC or GND
3.6 V
0.8 V to 3.6 V
0.5
3.3 V
0.8 V to 3.6 V
0V
1.5
3.6 V
1.5
Co
VO = VCC or GND
3.6 V
One input at VCC − 0.6 V, other input at VCC or GND
‡ To show ICC is very low when the input-disable feature is enabled
3
40
50
110
120
0
0
V
µA
pF
pF
†
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
5
SCES596D – JULY 2004 – REVISED JUNE 2005
switching characteristics over recommended operating free-air temperature range, CL = 5 pF
(unless otherwise noted) (see Figures 3 and 4)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
0.8 V
tpd
A
Y
OE
Y
6
OE
Y
POST OFFICE BOX 655303
UNIT
MAX
MIN
MAX
1.2 V ± 0.1 V
4.3
7.4
12.6
2.7
15.3
1.5 V ± 0.1 V
3.3
5.2
8.5
1
10.2
1.8 V ± 0.15 V
2.6
4.1
6.8
1.3
8.3
2.5 V ± 0.2 V
2
2.9
4.7
1.1
5.8
3.3 V ± 0.3 V
1.7
2.4
3.8
1
4.6
5.1
9.3
15.9
3.6
19.2
1.5 V ± 0.1 V
4.1
6.6
10.5
2.5
12.7
1.8 V ± 0.15 V
3.2
5.3
8.7
2.1
10.3
2.5 V ± 0.2 V
2.5
3.8
6
1.6
7.2
3.3 V ± 0.3 V
2.1
3.2
4.9
1.4
5.9
ns
12.1
1.2 V ± 0.1 V
2.4
4.1
6.9
2.2
7.7
1.5 V ± 0.1 V
1.8
2.9
4.5
1.7
5.1
1.8 V ± 0.15 V
1
2.9
4.3
1.5
4.7
2.5 V ± 0.2 V
1
1.8
2.7
1
3.3
3.3 V ± 0.3 V
1.2
2.2
3.2
1.1
4
• DALLAS, TEXAS 75265
ns
19.1
1.2 V ± 0.1 V
0.8 V
tdis
TYP
18.1
0.8 V
ten
TA = −40°C
TO 85°C
TA = 25°C
VCC
ns
SCES596D – JULY 2004 – REVISED JUNE 2005
switching characteristics over recommended operating free-air temperature range, CL = 10 pF
(unless otherwise noted) (see Figures 3 and 4)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
0.8 V
tpd
A or B
Y
OE
Y
OE
Y
POST OFFICE BOX 655303
MAX
MIN
MAX
1.2 V ± 0.1 V
4.6
8.4
13.7
3.6
16.6
1.5 V ± 0.1 V
3.5
5.9
9.3
2.4
11.1
1.8 V ± 0.15 V
3.9
4.7
7.5
1.3
9.1
2.5 V ± 0.2 V
2.3
3.4
5.3
1.6
6.4
3.3 V ± 0.3 V
2.1
2.8
4.3
1.4
5.2
4.9
10.2
16.8
4.4
20.2
1.5 V ± 0.1 V
3.9
7.3
11.2
3.3
13.5
1.8 V ± 0.15 V
3.4
5.8
9.2
2.7
11
2.5 V ± 0.2 V
2.5
4.3
6.4
2.1
7.8
3.3 V ± 0.3 V
2.1
3.7
5.4
1.9
6.4
ns
ns
13
1.2 V ± 0.1 V
3.8
6.6
11.7
1.2
14
1.5 V ± 0.1 V
2.2
4.7
7.9
1.3
9.3
1.8 V ± 0.15 V
2.4
4.4
6.4
2.2
7.5
2.5 V ± 0.2 V
1.3
3.1
4.9
1.2
5.4
3.3 V ± 0.3 V
1.9
3.4
5
1.9
5.6
• DALLAS, TEXAS 75265
UNIT
21.8
1.2 V ± 0.1 V
0.8 V
tdis
TYP
20.5
0.8 V
ten
TA = −40°C
TO 85°C
TA = 25°C
VCC
ns
7
SCES596D – JULY 2004 – REVISED JUNE 2005
switching characteristics over recommended operating free-air temperature range, CL = 15 pF
(unless otherwise noted) (see Figures 3 and 4)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
0.8 V
tpd
A or B
Y
OE
Y
8
OE
Y
POST OFFICE BOX 655303
UNIT
MAX
MIN
MAX
1.2 V ± 0.1 V
5.8
9.3
15.1
4.3
17.9
1.5 V ± 0.1 V
4.4
6.6
10.2
3
12.1
1.8 V ± 0.15 V
3.5
5.3
8.3
2.3
9.9
2.5 V ± 0.2 V
2.7
3.9
5.8
1.9
7
3.3 V ± 0.3 V
2.4
3.2
4.7
1.8
5.7
7
11.3
18.1
5.4
21.4
1.5 V ± 0.1 V
5.5
8.1
12.2
4.1
14.5
1.8 V ± 0.15 V
4.3
6.5
10.1
3.3
12
2.5 V ± 0.2 V
3.4
4.8
7.1
2.6
8.4
3.3 V ± 0.3 V
2.9
4.1
5.9
2.3
6.9
11
ns
14
1.2 V ± 0.1 V
3.7
5.8
8.2
3.3
1.5 V ± 0.1 V
5.5
3.9
5.9
2.1
8
1.8 V ± 0.15 V
3.3
4.5
6.6
2.9
7.4
2.5 V ± 0.2 V
2.3
3.2
4.3
1.8
5.1
3.3 V ± 0.3 V
2.4
4.8
6.2
3.1
6.7
• DALLAS, TEXAS 75265
ns
25.2
1.2 V ± 0.1 V
0.8 V
tdis
TYP
22.5
0.8 V
ten
TA = −40°C
TO 85°C
TA = 25°C
VCC
ns
SCES596D – JULY 2004 – REVISED JUNE 2005
switching characteristics over recommended operating free-air temperature range, CL = 30 pF
(unless otherwise noted) (see Figures 3 and 4)
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
MIN
0.8 V
tpd
Y
A or B
Y
OE
OE
Y
UNIT
MAX
MIN
MAX
1.2 V ± 0.1 V
7.4
12
18.7
6.6
21.4
1.5 V ± 0.1 V
5.7
8.6
12.5
4.9
14.7
1.8 V ± 0.15 V
4.8
6.9
10.1
3.1
12
2.5 V ± 0.2 V
3.9
5.1
7.2
3.3
8.7
3.3 V ± 0.3 V
3.5
4.8
6
3
7
ns
33.4
1.2 V ± 0.1 V
8.8
14.1
21.8
7.4
25.5
1.5 V ± 0.1 V
6.9
10.1
14.6
5.6
17.4
1.8 V ± 0.15 V
5.6
8.1
12
4.7
14.1
2.5 V ± 0.2 V
4.3
6.1
8.5
3.8
10
3.3 V ± 0.3 V
3.7
5.2
7.1
3.4
8.3
3.7
16
0.8 V
tdis
TYP
29
0.8 V
ten
TA = −40°C
TO 85°C
TA = 25°C
VCC
ns
17.7
1.2 V ± 0.1 V
5.8
10
16
1.5 V ± 0.1 V
5.7
7.7
10.9
1
10.7
1.8 V ± 0.15 V
4.5
7.7
9.8
4.4
12.5
2.5 V ± 0.2 V
3.9
5.6
7.4
3.2
9
3.3 V ± 0.3 V
3.3
8.4
10.7
6.6
10.8
ns
operating characteristics, TA = 25°C
PARAMETER
TEST CONDITIONS
Outputs enabled
Cpd
f = 10 MHz
Power dissipation capacitance
VCC
0.8 V
POST OFFICE BOX 655303
f = 10 MHz
• DALLAS, TEXAS 75265
UNIT
3.8
1.2 V ± 0.1 V
3.7
1.5 V ± 0.1 V
3.7
1.8 V ± 0.15 V
3.7
2.5 V ± 0.2 V
3.9
3.3 V ± 0.3 V
4
0.8 V
Outputs disabled
TYP
0
1.2 V ± 0.1 V
0
1.5 V ± 0.1 V
0
1.8 V ± 0.15 V
0
2.5 V ± 0.2 V
0
3.3 V ± 0.3 V
0
pF
9
SCES596D – JULY 2004 – REVISED JUNE 2005
PARAMETER MEASUREMENT INFORMATION
(Propagation Delays, Setup and Hold Times, and Pulse Width)
From Output
Under Test
CL
(see Note A)
1 MΩ
LOAD CIRCUIT
CL
VM
VI
VCC = 0.8 V
VCC = 1.2 V
± 0.1 V
VCC = 1.5 V
± 0.1 V
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
5, 10, 15, 30 pF
VCC/2
VCC
5, 10, 15, 30 pF
VCC/2
VCC
5, 10, 15, 30 pF
VCC/2
VCC
5, 10, 15, 30 pF
VCC/2
VCC
5, 10, 15, 30 pF
VCC/2
VCC
5, 10, 15, 30 pF
VCC/2
VCC
tw
VCC
Input
VCC/2
VCC/2
VI
VM
Input
0V
VM
VOLTAGE WAVEFORMS
PULSE DURATION
0V
tPHL
tPLH
VOH
VM
Output
VM
VOL
tPHL
VCC
Timing Input
0V
tPLH
tsu
VOH
VM
Output
VCC
Data Input
VCC/2
VCC/2
0V
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
CL includes probe and jig capacitance.
All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr/tf = 3 ns.
The outputs are measured one at a time, with one transition per measurement.
tPLH and tPHL are the same as tpd.
All parameters and waveforms are not applicable to all devices.
Figure 3. Load Circuit and Voltage Waveforms
10
th
VM
VOL
NOTES: A.
B.
C.
D.
E.
VCC/2
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCES596D – JULY 2004 – REVISED JUNE 2005
PARAMETER MEASUREMENT INFORMATION
(Enable and Disable Times)
2 × VCC
5 kΩ
From Output
Under Test
CL
(see Note A)
S1
GND
5 kΩ
TEST
S1
tPLZ/tPZL
tPHZ/tPZH
2 × VCC
GND
LOAD CIRCUIT
CL
VM
VI
V∆
VCC = 0.8 V
VCC = 1.2 V
± 0.1 V
VCC = 1.5 V
± 0.1 V
VCC = 1.8 V
± 0.15 V
VCC = 2.5 V
± 0.2 V
VCC = 3.3 V
± 0.3 V
5, 10, 15, 30 pF
VCC/2
VCC
0.1 V
5, 10, 15, 30 pF
VCC/2
VCC
0.1 V
5, 10, 15, 30 pF
VCC/2
VCC
0.1 V
5, 10, 15, 30 pF
VCC/2
VCC
0.15 V
5, 10, 15, 30 pF
VCC/2
VCC
0.15 V
5, 10, 15, 30 pF
VCC/2
VCC
0.3 V
VCC
Output
Control
Output
Waveform 1
S1 at 2 × VCC
(see Note B)
VCC/2
VCC/2
0V
tPLZ
tPZL
VCC
VCC/2
VOL
tPHZ
tPZH
Output
Waveform 2
S1 at GND
(see Note B)
VOL + V∆
VCC/2
VOH − V∆
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr/tf = 3 ns.
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. All parameters and waveforms are not applicable to all devices.
Figure 4. Load Circuit and Voltage Waveforms
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
11
PACKAGE OPTION ADDENDUM
www.ti.com
12-Sep-2005
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
74AUP1G126DBVRE4
ACTIVE
SOT-23
DBV
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AUP1G126DBVTE4
ACTIVE
SOT-23
DBV
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AUP1G126DCKRE4
ACTIVE
SC70
DCK
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74AUP1G126DCKTE4
ACTIVE
SC70
DCK
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AUP1G126DBVR
ACTIVE
SOT-23
DBV
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AUP1G126DBVT
ACTIVE
SOT-23
DBV
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AUP1G126DCKR
ACTIVE
SC70
DCK
5
3000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AUP1G126DCKT
ACTIVE
SC70
DCK
5
250
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AUP1G126DRLR
ACTIVE
SOP
DRL
5
4000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74AUP1G126YZPR
ACTIVE
WCSP
YZP
5
3000
SNAGCU
Level-1-260C-UNLIM
Pb-Free
(RoHS)
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MPDS025C – FEBRUARY 1997 – REVISED FEBRUARY 2002
DCK (R-PDSO-G5)
PLASTIC SMALL-OUTLINE PACKAGE
0,30
0,15
0,65
5
0,10 M
4
1,40
1,10
1
0,13 NOM
2,40
1,80
3
Gage Plane
2,15
1,85
0,15
0°–8°
0,46
0,26
Seating Plane
1,10
0,80
0,10
0,00
0,10
4093553-2/D 01/02
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion.
Falls within JEDEC MO-203
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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