HITACHI HA13532NT

HA13532NT
Three-Phase Stepping Motor Control IC
ADE-207-121A (Z)
2nd Edition
July 1996
Description
The HA13532NT is an IC for control a three-phase stepping motor.
Functions
•
•
•
•
•
PWM current control
Low-voltage inhibit (LVI)
Three-bit D/A converter for current programming
Motor on/off
Selectable 2-phase or 2-3-phase exciting
Features
• Wide operating voltage range
• Few external components
HA13532NT
Pin Arrangement
INSEL
1
24
EXSEL
CK2/DIR
2
23
V CC
CK1
3
22
U
Rt
4
21
U
NC
5
20
NC
Ct
6
19
V
GND
TAB
TAB
GND
V0
7
18
V
NC
8
17
NC
V1
9
16
W
V2
10
15
W
DAOUT
11
14
SENSE
VREG
12
13
OE
(Top view)
2
HA13532NT
Block Diagram
VCC
C101
23
VREG 12
REG
Ru
LVI
LVI
POR
22 U
18 V
CK1 3
16 W
CK2/DIR 2
Commutation
logic
Input select 1
INSEL
H: CK2
L: DIR
21 U
19 V
Excite select 24
EXSEL
H: 2ø
L: 2 — 3ø
15 W
OE 13
LVI
Rd
V2 10
PWM
control
3 bit
DAC
V1 9
14 SENSE
V0 7
5
8
17 20
11
TAB
4
6
DAOUT
Rt
LVI: Low-voltage inhibit circuit
POR: Power-on reset circuit
3
Ct
HA13532NT
Pin Description
Pin No.
Pin Name
Function
Pin Voltage
1
INSEL
Selects pin 2 input: CK2 if high; DIR if low (see VTH = 2.5 V typ
timing diagrams)
2
CK2/DIR
CK2 or DIR input (see timing diagrams)
VTH = 2.5 V typ
3
CK1
CK1 input (see timing diagrams)
VTH = 2.5 V typ
4
Rt
Reference value for 3-phase output current
and Ct charge/discharge current
4.8 V typ
5
NC
No connection
6
Ct
Time constant for PWM carrier frequency
7
V0
Voltage programming input to DAC (LSB)
8
NC
No connection
9
V1
Voltage programming input to DAC
VTH = 2.5 V typ
10
V2
Voltage programming input to DAC (MSB)
VTH = 2.5 V typ
11
DAOUT
DAC output
12
VREG
Regulated output
4.8 V typ (@I = 2 mA)
13
OE
Output enable: low enables PWM output
phases U, V, and W; high gives high
impedance
VTH = 2.5 V typ
14
SENSE
Current feedback
0 V min, 5.0 V max
15
W
Phase-W lower-arm output
16
W
Phase-W upper-arm output
17
NC
No connection
18
V
Phase-V upper-arm output
19
V
Phase-U lower-arm output
20
NC
No connection
21
U
Phase-U lower-arm output
22
U
Phase-U upper-arm output
23
VCC
Power supply
10 V min, 27.6 V max
24
EXSEL
Selects exciting mode: 2-phase if high; 2-3phase if low (see timing diagrams)
VTH = 2.5 V typ
4
VTH = 2.5 V typ
HA13532NT
Application Circuit
VCC
C101
23
CK1
3
22
CK2/DIR
2
18
D1
Q1
Q2
D2
Q3
D3
16
INSEL
1
15
EXSEL
24
19
OE
13
21
V2
10
V1
9
V0
7
C102
C103
C104
Q4
D4
Q5
14
R101
11
C105
Rnf
VR101
TAB
4
6
Rt
Ct
Notes: 1. Use high-speed diodes for D4, D5, and D6.
5
D5
Q6
D6 *1
HA13532NT
External Conponents
Symbol
Recommended Value
Purpose
Notes
Rnf
0.11 Ω ≤ Rnf ≤ 0.33 Ω
Current sensing
1
Rt
51 k Ω
Reference current programming
2
Ct
1000 pF
Time constant for PWM carrier frequency
3
C101
≥ 0.1 µF
Power supply decoupling
C102, C103, C104
0.01 µF
Penetration current control
C105
1000 pF
Current sensing filter
R101
750 Ω
VR 101
100 kΩ
4
Motor current little adjustment
Notes: 1. The maximum motor drive current is:
Vdac + Voffs
Imax ≈ ±
Rnf
(1)
where, Vdac: DAC output voltage (see electrical characteristics)
Voffs: Offset voltage (see electrical characteristics)
2. The output sink current Iosnk, output source current Iosrc, and Ct charge/discharge currents Ict+
and Ict– are calculated as follows:
where, set Rt to be 2.5kΩ or higher.
50Vrt
Vbe
Iosnk ≈
–
Rt
Ru
(2)
Iosrc ≈
50Vrt
Vbe
–
Rt
Rd
Ict+, Ict– ≈
Vrt
Rt
(3)
(4)
where, Vrt: Rt voltage (see electrical characteristics)
Ru: pull-up resistance (see electrical characteristics)
Rd: pull-down resistance (see electrical characteristics)
Vbe: base-emitter voltage of driven transistor
3. The PWM carrier frequency fc is calculated as follows:
Ict
fc ≈
2Ct (Vcth – Vctl)
(5)
≈
Vrt
2CtRt (Vcth – Vctl)
(6)
where, Vcth: Ct high voltage (see electrical characteristics)
Vctl: Ct low voltage (see electrical characteristics)
4. Values of C 102, C103, C104, C105, R101 are different from using power transistor
6
HA13532NT
Timing Waveforms
Two Clock Pulse Inputs, Two-Phase Exciting (INSEL High, EXSEL High)
Clock pulse input
CK1
H
L
CK2
H
L
Output current *
U
+
0
V
+
0
W
+
0
U
0
–
V
0
–
W
0
–
0
1
2
3
4
5
6
7
8
9
10 11 12
11 10
9
8
7
6
9
8
7
6
Note: * Initialized with U and V on at power-up.
Two Clock Pulse Inputs, Two-Three-Phase Exciting (INSEL High, EXSEL Low)
Clock pulse input
CK1
H
L
CK2
H
L
Output current *
U
+
0
V
+
0
W
+
0
U
0
–
V
0
–
W
0
–
0
1
2
3
4
5
6
7
8
Note: * Initialized with U and V on at power-up.
7
9
10 11 12
11 10
HA13532NT
One Clock Pulse Input, Two-Three-Phase Exciting (INSEL Low, EXSEL Low)
Clock pulse input
CK1
H
L
DIR
H
L
Output current *
U
+
0
V
+
0
W
+
0
U
0
–
V
0
–
W
0
–
0
1
2
3
4
5
6
7
8
9
10 11 12
11 10
9
8
7
6
Note: * Initialized with U and V on at power-up.
One Clock Pulse Input, Two-Phase Exciting (INSEL Low, EXSEL High)
Clock pulse input
CK1
H
L
DIR
H
L
Output current *
U
0
1
2
3
4
5
6
7
8
+
0
V
+
0
W
+
0
U
0
–
V
0
–
W
0
–
Note: * Initialized with U and V on at power-up.
8
9
10 11 12
11 10
9
8
7
6
HA13532NT
PWM Control
Vcth
Ct
Vctl
1/fc
Imax
Im
Vdac
Rnf
0
Iosnk
Output current *
0
Note: * Only phase U is shown.
Absolute Maximum Ratings
Item
Symbol
Rating
Unit
Notes
Power supply voltage
VCC
30
V
1
Input voltage
Vin
7
V
2
Power dissipation
PT
910
mW
3
Operating temperature
Topr
–10 to +70
°C
Storage temperature
Tstg
–55 to +125
°C
Output current
Ireg
2
mA
Notes: 1. The operating power supply voltage range is V CC = 10 V to 27.6 V.
2. Applies to logic and DAC input pins.
3. Permitted at Ta = 70°C, if thermal resistance is as below:
θj – a ≤ 60°C/W (glass-epoxy board)
9
HA13532NT
Electrical Characteristics (Ta = 25°C, VCC = 24 V)
Item
Symbol Min
Current
consumption
I CCO
REG
Logic
DAC
Test
Conditions
Typ
Max
Unit
—
—
33
mA
VCC = 30 V, OE 23
=H
I CC
—
—
41
mA
VCC = 30 V, OE
=L
Output
voltage
Vreg
4.4
4.8
5.2
V
Ireg = 2 mA
Load
regulation
∆Vreg
—
—
±0.1
V
Ireg = 0 mA to
2 mA
Input current
lin
–10
—
1
µA
Vin = 0 V to 7
V
–1
—
10
µA
7, 9, 10
Low voltage Vil
level
—
—
1.35
V
1, 2, 3,
7, 9, 10,
13,
High
voltage
level
3.65
—
—
V
24
200
230
260
mV
(V2, V1, V0)
= (H, L, L)
116
146
176
mV
(V2, V1, V0)
= (L, H, L)
75
105
135
mV
(V2, V1, V0)
= (L, L, H)
33
63
93
mV
(V2, V1, V0)
= (L, L, L)
Isens
—
—
±2
µA
Vsens = 0 V to 14
5V
Offset voltage
Voffs
—
—
±10
mV
Rt voltage
Vrt
4.4
4.8
5.2
V
Rt = 51 kΩ
Ct change
current
Ict+
84
94
104
µA
Rt = 51 kΩ, Vct 6
= 3.75 V
Ct
discharge
current
Ict–
84
94
104
µA
Rt = 51 kΩ, Vct
= 3.75 V
Vih
Outout volt- Vdac
age
PWM control Input
current
10
Pins
Notes
1
12
1, 2, 3,
13, 24
11
2
4
HA13532NT
Electrical Characteristics (Ta = 25°C, VCC = 24 V) (Cont)
Item
Symbol
Min
Typ
Max
Vcth
4.3
4.8
5.3
V
Ct low
voltage
Vctl
2.3
2.78
3.3
V
Carrier
frequency
fc
18.6
23.3
28.0
kHz
PWM control Ct high
voltage
3-pahse
output
Test
Conditions
Pins
Notes
6
3
Rt = 51 kΩ,
Ct = 1000 pF
Output sink Iosnk
current
2.0
3.1
4.2
mA
VO = VCC – 1.5 16, 18,
V, Rt = 51 kΩ 22
Output
source
current
2.0
3.1
4.2
mA
VO = 1.5 V,
Rt = 51 kΩ
15, 19,
21
—
—
±10
µA
VCC = 30 V,
VO = VCC
16, 18,
22
—
—
±10
µA
VCC = 30 V,
VO = 0 V
15, 19,
21
Iosrc
Output leak- Ioff
age current
LVI
Unit
Pull-up
resistance
Ru
700
950
1200
Ω
16, 18,
22
Pull-down
resistance
Rd
700
950
1200
Ω
15, 19,
21
Transient
response
time
t phl
—
—
6.0
µs
15, 16,
18, 19,
21, 22
t plh
—
—
6.0
µs
Operating
voltage
Vlvi
8.0
—
10
V
Hysteresis
Vhys
—
0.3
—
V
Notes: 1. Measured with pins 12, 15, 16, 18, 19, 21, and 22 open.
2. Offset between pins 11 and 14.
3. See timing diagrams.
11
23
HA13532NT
Reference Data
5.2
Output voltage Vreg (V)
Current consumption I CC *1 , I CCO *2 (mA)
40
30
Icc
Icco
20
5.0
4.8
10
0
10
15
20
25
30
0
Supply voltage VCC (V)
0.4
2.0
(V2, V1, V0) = (H, H, H)
Output voltage Vdac (mV)
DAC Output voltage Vdac (mV)
1.6
400
(V2, V1, V0) = (H, H, H)
(V2, V1, V0) = (H, H, L)
300
(V2, V1, V0) = (H, L, H)
(V2, V1, V0) = (H, L, L)
(V2, V1, V0) = (L, H, H)
200
(V2, V1, V0) = (L, H, L)
(V2, V1, V0) = (H, H, L)
300
(V2, V1, V0) = (H, L, H)
(V2, V1, V0) = (H, L, L)
(V2, V1, V0) = (L, H, H)
200
(V2, V1, V0) = (L, H, L)
(V2, V1, V0) = (L, L, H)
(V2, V1, V0) = (L, L, H)
100
100
(V2, V1, V0) = (L, L, L)
0
-10 0
(V2, V1, V0) = (L, L, L)
0
10
10 20 30 40 50 60 70
Ambient temperature Ta
1.
1.2
Output current Ireg (mA)
400
Notes:
0.8
(°C)
15
20
25
Supply voltage VCC (V)
Iosnk + Iosrc is the current during three-channel output.
2.Iosnk is the current during two-channel output.
12
30
HA13532NT
3.3
Output source current Iosrc (mA)
Output sink current Iosnk (mA)
3.3
3.2
3.1
3.0
2.9
2.8
3.2
3.1
3.0
2.9
2.8
-10 0
10 20 30 40 50 60 70
Ambient temperature Ta
-10 0
10 20 30 40 50 60 70
Ambient temperature Ta
(°C)
13
(°C)
HA13532NT
In-Circuit Waweform Characteristics
Ct
(2 V/div)
GND
Rnf
(200 mV/div)
GND
VCC
Phase-U output
(2 V/div)
t (20 µs/div)
CK1
(2 V/div)
GND
VCC
Phase-U output
(1 V/div)
t (5 ms/div)
14
HA13532NT
Package Dimensions
Unit: mm
27.10
28.10 Max
1
10.0 Max
13
8.8
24
12
1.0
0.48 ± 0.10
5.08 Max
2.54 Min
4.036
0.51 Min
0.76
1.778 ± 0.250
10.16
+ 0.11
0.25 – 0.05
0° – 15°
Hitachi code
EIAJ code
JEDEC code
15
DP-24TS
—
—
Cautions
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contact Hitachi’s sales office before using the product in an application that demands especially high
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