HD74LV74A Dual D–type Flip Flops with Preset and Clear ADE-205-244 (Z) 1st Edition March 1999 Description The HD74LV74A has independent data, preset, clear, and clock inputs Q and Q outputs in a 14 pin package. The input data is transferred to the output at the rising edge of clock pulse CLK. Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook computers), and the low-power consumption extends the battery life. Features • • • • • • VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C) Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V) HD74LV74A Function Table Inputs Outputs PRE CLR CLK D Q Q L H X X H L H L X X L H 1 H*1 L L X X H* H H ↑ H H L H H ↑ L L H H H ↓ X Q0 Q0 Note: H: High level L: Low level X: Immaterial ↑: Low to high transition ↓: High to low transition Q0:The level of Q immediately before the input conditions shown in the above table are determined. 1.: Q and Q will remain HIGH as long as Preset and Clear are Low, but Q and Q are unpredictable, if Preset and Clear go HIGH simultaneously. Pin Arrangement 1CLR 1 14 VCC 1D 2 13 2CLR 1CLK 3 12 2D 1PRE 4 11 2CLK 1Q 5 10 2PRE 1Q 6 9 2Q GND 7 8 2Q (Top view) 2 HD74LV74A Absolute Maximum Ratings Item Supply voltage range Input voltage range* 1 Output voltage range* 1, 2 Symbol Ratings Unit VCC –0.5 to 7.0 V VI –0.5 to 7.0 V VO –0.5 to VCC + 0.5 V –0.5 to 7.0 Conditions Output: H or L VCC: OFF Input clamp current I IK –20 mA VI < 0 Output clamp current I OK ±50 mA VO < 0 or VO > VCC Continuous output current IO ±25 mA VO = 0 to VCC Continuous current through VCC or GND I CC or IGND ±50 mA Maximum power dissipation at Ta = 25°C (in still air)*3 PT 785 mW 500 Storage temperature Tstg –65 to 150 SOP TSSOP °C Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The maximum package power dissipation was calculated using a junction temperature of 150°C. 3 HD74LV74A Recommended Operating Conditions Item Symbol Min Max Unit Supply voltage range VCC 2.0 5.5 V Input voltage range VI 0 5.5 V Output voltage range VO 0 VCC V Output current I OH — –50 µA VCC = 2.0 V — –2 mA VCC = 2.3 to 2.7 V — –6 VCC = 3.0 to 3.6 V — –12 VCC = 4.5 to 5.5 V — 50 µA VCC = 2.0 V — 2 mA VCC = 2.3 to 2.7 V — 6 VCC = 3.0 to 3.6 V — 12 VCC = 4.5 to 5.5 V 0 200 0 100 VCC = 3.0 to 3.6 V 0 20 VCC = 4.5 to 5.5 V –40 85 I OL Input transition rise or fall rate Operating free-air temperature ∆t /∆v Ta Note: Unused or floating inputs must be held high or low. 4 ns/V °C Conditions VCC = 2.3 to 2.7 V HD74LV74A Logic Diagram PRE C CLK C C Q TG D C C TG TG TG C C C C C Q CLR 5 HD74LV74A DC Electrical Characteristics • Ta = –40 to 85°C Item Symbol VCC (V)* Min Typ Max Unit Input voltage VIH 2.0 1.5 — — V 2.3 to 2.7 VCC × 0.8 — — 3.0 to 3.6 VCC × 0.8 — — 4.5 to 5.5 VCC × 0.8 — — 2.0 — — 0.3 2.3 to 2.7 — — VCC × 0.2 3.0 to 3.6 — — VCC × 0.2 4.5 to 5.5 — — VCC × 0.2 Min to Max VCC – 0.1 — — 2.3 2.0 — — IOL = –2 mA 3.0 2.48 — — IOL = –6 mA 4.5 3.8 — — IOL = –12 mA Min to Max — — 0.1 2.3 — — 0.4 IOL = 2 mA 3.0 — — 0.44 IOL = 6 mA 4.5 — — 0.55 IOL = 12 mA VIL Output voltage VOH VOL V V Test Conditions IOL = –50 µA IOL = 50 µA Input current IIN 0 to 5.5 — — ±1 µA VIN = 5.5 V or GND Quiescent supply current ICC 5.5 — — 20 µA VIN = VCC or GND, IO = 0 Output leakage current IOFF 0 — — 5 µA VO = 5.5 V Input capacitance CIN 3.3 — 2.0 — pF VI = VCC or GND Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions. 6 HD74LV74A Switching Characteristics • VCC = 2.5 ± 0.2 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions Maximum clock frequency tmax 50 100 — 40 — MHz CL = 15 pF 30 70 — 25 — — 9.8 14.8 1.0 17.0 — 11.1 16.4 1.0 19.0 — 13.0 17.4 1.0 20.0 — 14.2 20.0 1.0 23.0 8.0 — — 9.0 — 7.0 — — 7.0 — Propagation delay time Setup time tPLH tPHL tsu FROM (Input) TO (Output) PRE/CLR Q or Q CL = 50 pF ns CL = 15 pF CLK CL = 50 pF PRE/CLR Q or Q CLK ns Data PRE or CLR inactive Hold time th 0.5 — — 0.5 — ns Pulse width tw 8.0 — — 9.0 — ns 8.0 — — 9.0 — PRE or CLR “L” CLK “H” or “L” 7 HD74LV74A Switching Characteristics (cont) • VCC = 3.3 ± 0.3 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions Maximum clock frequency tmax 80 140 — 70 — MHz CL = 15 pF 50 90 — 45 — — 6.9 12.3 1.0 14.5 — 7.9 11.9 1.0 14.0 — 9.2 15.8 1.0 18.0 — 10.2 15.4 1.0 17.5 6.0 — — 7.0 — 5.0 — — 5.0 — Propagation delay time Setup time tPLH tPHL tsu TO (Output) PRE/CLR Q or Q CL = 50 pF ns CL = 15 pF CLK CL = 50 pF PRE/CLR Q or Q CLK ns Data PRE or CLR inactive Hold time th 0.5 — — 0.5 — ns Pulse width tw 6.0 — — 7.0 — ns 6.0 — — 7.0 — 8 FROM (Input) PRE or CLR “L” CLK “H” or “L” HD74LV74A Switching Characteristics (cont) • VCC = 5.0 ± 0.5 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions Maximum clock frequency tmax 130 180 — 110 — MHz CL = 15 pF 90 140 — 75 — — 5.0 7.7 1.0 9.0 — 5.6 7.3 1.0 8.5 — 6.6 9.7 1.0 11.0 — 7.2 9.3 1.0 10.5 5.0 — — 5.0 — 3.0 — — 3.0 — Propagation delay time Setup time tPLH tPHL tsu FROM (Input) TO (Output) PRE/CLR Q or Q CL = 50 pF ns CL = 15 pF CLK CL = 50 pF PRE/CLR Q or Q CLK ns Data PRE or CLR inactive Hold time th 0.5 — — 0.5 — ns Pulse width tw 5.0 — — 5.0 — ns 5.0 — — 5.0 — PRE or CLR “L” CLK “H” or “L” 9 HD74LV74A Operating Characteristics • CL = 50 pF Ta = 25°C Item Symbol VCC (V) Min Typ Max Unit Test Conditions Power dissipation capacitance CPD 3.3 — 21.0 — pF f = 10 MHz 5.0 — 23.0 — Test Conditions Noise Characteristics • CL = 50 pF Ta = 25°C Item Symbol VCC (V) Min Typ Max Unit Quiet output, maximum dynamic VOL VOL (P) 3.3 — 0.1 0.8 V Quiet output, minimum dynamic VOL VOL (V) 3.3 — 0 –0.8 Quiet output, minimum dynamic VOH VOH (V) 3.3 — 3.2 — High-level dynamic input voltage VIH (D) 3.3 2.31 — — Low-level dynamic inout voltage VIL (D) 3.3 — — 0.99 10 V HD74LV74A Test Circuit Measurement point C L* Note: C L includes the probe and jig capacitance. 11 HD74LV74A • Waveform – 1 tr tf 90% 50% VCC Timming input 10% t su VCC 90% 50% VCC 10% th 0V VCC Data input 50% VCC 50% VCC 0V tw VCC Input 50% VCC 50% VCC 0V • Waveform – 2 tr tf 90% 50% VCC Input VCC 90% 50% VCC 10% 10% t PHL t PLH 0V VOH Same-phase output 50% VCC 50% VCC VOL t PHL t PLH VOH Opposite-phase output 50% VCC 50% VCC VOL Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns 2. The output are measured one at a time with one transition per measurement. 12 HD74LV74A Package Dimensions Unit: mm 10.06 10.5 Max 8 5.5 14 1 0.10 ± 0.10 1.42 Max 1.27 0.42 ± 0.08 0.40 ± 0.06 0.22 ± 0.05 0.20 ± 0.04 2.20 Max 7 + 0.20 7.80 – 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-14DA — Conforms 0.23 g 13 HD74LV74A Unit: mm 8.65 9.05 Max 8 1 7 *0.22 ± 0.03 0.20 ± 0.03 0.635 Max 1.75 Max 3.95 14 0.10 6.10 +– 0.30 1.08 *0.42 ± 0.08 0.40 ± 0.06 0.11 0.14 +– 0.04 0° – 8° 1.27 0.67 0.60 +– 0.20 0.15 0.25 M *Dimension including the plating thickness Base material dimension 14 Hitachi Code JEDEC EIAJ Weight (reference value) FP-14DN Conforms Conforms 0.13 g HD74LV74A Unit: mm 4.40 5.00 5.30 Max 14 8 1 7 0.65 0.22 0.20 ± 0.06 1.0 0.13 M 6.40 ± 0.20 0.10 Dimension including the plating thickness Base material dimension 0.17 ± 0.05 0.15 ± 0.04 1.10 Max 0.83 Max 0.07 +0.03 –0.04 +0.08 –0.07 0° – 8° 0.50 ± 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) TTP-14D — — 0.05 g 15 Cautions 1. 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