HD74HC595 8-bit Shift Register/Latch (with 3-state outputs) Description This device each contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. The storage register has parallel 3-state outputs. Separate clocks are provided for both the shift register and the storage register. The shift register has a direct-overriding clear, serial input, and serial output pins for cascading. Both the shift register and storage register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the shift register state will always be one clock pulse ahead of the storage register. Features • • • • • High Speed Operation: tpd (RCK to Q) = 17 ns typ (C L = 50 pF) High Output Current: Fanout of 15 LSTTL Loads (QA to QH outputs) Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table RCK SCK SCLR G Function X X X H QA to QH high impedance X X L X Shift register cleared QH ’ = L H X Shift register clocked Qn = Qn – 1, QA = SER H X Contents of shift register transferred to output latches X X HD74HC595 Pin Arrangement QB 1 16 VCC QC 2 15 QA QD 3 14 SER QE 4 13 G QF 5 12 RCK QG 6 11 SCK QH 7 10 SCLR GND 8 9 QH' (Top view) Absolute Maximum Ratings Item Symbol Rating Unit Supply voltage range VCC –0.5 to +7.0 V Input voltage VIN –0.5 to VCC + 0.5 V Output voltage VOUT –0.5 to VCC + 0.5 V Output current I OUT ±35 mA DC current drain per VCC, GND I CC, I GND ±75 mA DC input diode current I IK ±20 mA DC output diode current I OK ±20 mA Power dissipation per package PT 500 mW Storage Temperature Tstg –65 to +150 °C 2 HD74HC595 Logic Diagram G RCK SER D Q D QA D QB D QC D QD D QE D QF D QG D QH R D Q R D Q R D Q R D Q R D Q R D Q R D Q SCK R SCLR QH' 3 HD74HC595 DC Characteristics Ta = –40 to +85°C Ta = 25°C Item Symbol VCC (V) Min Typ Max Min Max Unit Input voltage VIH 2.0 1.5 — — 1.5 — V 4.5 3.15 — — 3.15 — 6.0 4.2 — — 4.2 — 2.0 — — 0.5 — 0.5 4.5 — — 1.35 — 1.35 6.0 — — 1.8 — 1.8 2.0 1.9 2.0 — 1.9 — 4.5 4.4 4.5 — 4.4 — 6.0 5.9 6.0 — 5.9 — 4.5 4.18 — — 4.13 — I OH = –6 mA 6.0 5.68 — — 5.63 — I OH = –7.8 mA 2.0 — 0.0 0.1 — 0.1 4.5 — 0.0 0.1 — 0.1 6.0 — 0.0 0.1 — 0.1 4.5 — — 0.26 — 0.33 I OL = 6 mA 6.0 — — 0.26 — 0.33 I OL = 7.8 mA 2.0 1.9 2.0 — 1.9 — 4.5 4.4 4.5 — 4.4 — 6.0 5.9 6.0 — 5.9 — 4.5 4.18 — — 4.13 — I OH = –4 mA 6.0 5.68 — — 5.63 — I OH = –5.2 mA 2.0 — 0.0 0.1 — 0.1 4.5 — 0.0 0.1 — 0.1 6.0 — 0.0 0.1 — 0.1 4.5 — — 0.26 — 0.33 I OL = 4 mA 6.0 — — 0.26 — 0.33 I OL = 5.2 mA VIL Output voltage VOH VOL Output voltage VOH VOL Test Conditions V V QA to QH I OH = –20 µA Vin = VIH or VIL V QA to QH I OL = 20 µA Vin = VIH or VIL V Q’H I OH = –20 µA Vin = VIH or VIL V Q’H I OL = 20 µA Vin = VIH or VIL Off-state output current I OZ 6.0 — — ±0.5 — ±5.0 µA Vin = VIH or VIL, Vout = VCC or GND Input current Iin 6.0 — — ±0.1 — ±1.0 µA Vin = VCC or GND Quiescent supply current I CC 6.0 — — 4.0 40 µA Vin = VCC or GND, Iout = 0 µA 4 — HD74HC595 AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) Ta = –40 to +85°C Ta = 25°C Item Symbol VCC (V) Min Typ Max Min Max Unit Maximum clock f max 2.0 — — 5 — 4 MHz 4.5 — — 27 — 21 6.0 — — 31 — 24 Propagation delay t PLH 2.0 — — 115 — 145 time 4.5 — 12 23 — 29 6.0 — — 20 — 25 t PLH 2.0 — — 150 — 190 t PHL 4.5 — 17 30 — 38 6.0 — — 26 — 33 2.0 — — 175 — 220 4.5 — 20 35 — 44 6.0 — — 30 — 37 frequency t PHL t PLH Output enable t ZL 2.0 — — 150 — 190 time t ZH 4.5 — 13 30 — 38 6.0 — — 26 — 33 Output disable t LZ 2.0 — — 150 — 190 time t HZ 4.5 — 15 30 — 38 6.0 — — 26 — 33 2.0 100 — — 125 — 4.5 20 1 — 25 — 6.0 17 — — 21 — 2.0 200 — — 250 — 4.5 40 8 — 50 — 6.0 34 — — 43 — 2.0 80 — — 100 — 4.5 16 8 — 20 — 6.0 14 — — 17 — 2.0 100 — — 125 — 4.5 20 — — 25 — 6.0 17 — — 21 — Setup time Pulse width Removal time t su tw t rem Test Conditions ns SCK to QH ’ ns RCK to Q ns SCLR to Q H ’ ns ns ns SER to SCK ns SCK to RCK ns ns 5 HD74HC595 AC Characteristics (CL = 50 pF, Input tr = tf = 6 ns) (cont) Ta = –40 to +85°C Ta = 25°C Item Symbol VCC (V) Min Typ Max Min Max Unit Hold time th 2.0 5 — — 5 — ns 4.5 5 1 — 5 — 6.0 5 — — 5 — Output rise/fall t TLH 2.0 — — 75 — 95 time t THL 4.5 — 5 15 — 19 6.0 — — 13 — 16 2.0 — — 60 — 75 4.5 — 4 12 — 15 6.0 — — 10 — 13 — — 5 10 — 5 Input capacitance 6 Cin Test Conditions ns QH ’ ns Q pF Unit: mm 19.20 20.00 Max 1 7.40 Max 9 6.30 16 8 1.3 0.48 ± 0.10 2.54 Min 5.06 Max 2.54 ± 0.25 0.51 Min 1.11 Max 7.62 + 0.13 0.25 – 0.05 0° – 15° Hitachi Code JEDEC EIAJ Weight (reference value) DP-16 Conforms Conforms 1.07 g Unit: mm 10.06 10.5 Max 9 1 8 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0.80 Max *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 5.5 16 0.20 7.80 +– 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DA — Conforms 0.24 g Unit: mm 9.9 10.3 Max 9 1 8 0.635 Max *0.42 ± 0.08 0.40 ± 0.06 0.15 *0.22 ± 0.03 0.20 ± 0.03 1.27 0.11 0.14 +– 0.04 1.75 Max 3.95 16 0.10 6.10 +– 0.30 1.08 0° – 8° 0.67 0.60 +– 0.20 0.25 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-16DN Conforms Conforms 0.15 g Cautions 1. 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