HD74LV240A Octal Buffers / Drivers with 3-state Outputs ADE-205-272 (Z) 1st Edition April 1999 Description The HD74V240A has eight inverter drivers with three-state outputs in a 20-pin package. Four inverters are included in one circuit. Each circuit can be independently controlled by the enable signal 1OE or 2OE, which enables outputs when receiving a low-level signal. Low-voltage operation is suitable for batterypowered products (e.g., notebook computers), and the low-power consumption extends the battery life. Features • • • • • • VCC = 2.0 V to 5.5 V operation All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V) All outputs VO (Max.) = 5.5 V (@VCC = 0 V) Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C) Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C) Output current ±8 mA (@VCC = 3.0 V to 3.6 V), ±16 mA (@VCC = 4.5 V to 5.5 V) Function Table Inputs OE A Output Y L H L L L H H X Z Note: H: L: X: Z: High level Low level Immaterial High impedance HD74LV240A Pin Arrangement 1OE 1 20 VCC 1A1 2 19 2OE 2Y4 3 18 1Y1 1A2 4 17 2A4 2Y3 5 16 1Y2 1A3 6 15 2A3 2Y2 7 14 1Y3 1A4 8 13 2A2 2Y1 9 12 1Y4 GND 10 11 2A1 (Top view) 2 HD74LV240A Absolute Maximum Ratings Item Supply voltage range Input voltage range* 1 Output voltage range* 1, 2 Symbol Ratings Unit VCC –0.5 to 7.0 V VI –0.5 to 7.0 V VO –0.5 to VCC + 0.5 V –0.5 to 7.0 Conditions Output: H or L VCC: OFF or Output: Z Input clamp current I IK –20 mA VI < 0 Output clamp current I OK ±50 mA VO < 0 or VO > VCC Continuous output current IO ±35 mA VO = 0 to VCC Continuous current through VCC or GND I CC or IGND ±70 mA Maximum power dissipation at Ta = 25°C (in still air)*3 PT 835 mW 757 Storage temperature Tstg –65 to 150 SOP TSSOP °C Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore, no two of which may be realized at the same time. 1. The input and output voltage ratings may be exceeded even if the input and output clamp-current ratings are observed. 2. This value is limited to 5.5 V maximum. 3. The maximum package power dissipation was calculated using a junction temperature of 150°C. 3 HD74LV240A Recommended Operating Conditions Item Symbol Min Max Unit Supply voltage range VCC 2.0 5.5 V Input voltage range VI 0 5.5 V Output voltage range VO 0 VCC V 0 5.5 — –50 µA VCC = 2.0 V — –2 mA VCC = 2.3 to 2.7 V — –8 VCC = 3.0 to 3.6 V — –12 VCC = 4.5 to 5.5 V — 50 µA VCC = 2.0 V — 2 mA VCC = 2.3 to 2.7 V — 8 VCC = 3.0 to 3.6 V — 12 VCC = 4.5 to 5.5 V 0 200 0 100 VCC = 3.0 to 3.6 V 0 20 VCC = 4.5 to 5.5 V –40 85 Output current I OH I OL Input transition rise or fall rate Operating free-air temperature ∆t /∆v Ta Conditions H or L High impedance state ns/V VCC = 2.3 to 2.7 V °C Note: Unused or floating inputs must be held high or low. Logic Diagram 1OE 1A1 1A2 1A3 1A4 4 1 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 HD74LV240A DC Electrical Characteristics • Ta = –40 to 85°C Item Symbol VCC (V)* Min Typ Max Unit Input voltage VIH 2.0 1.5 — — V 2.3 to 2.7 VCC × 0.7 — — 3.0 to 3.6 VCC × 0.7 — — 4.5 to 5.5 VCC × 0.7 — — 2.0 — — 0.5 2.3 to 2.7 — — VCC × 0.3 3.0 to 3.6 — — VCC × 0.3 4.5 to 5.5 — — VCC × 0.3 Min to Max VCC – 0.1 — — 2.3 2.0 — — IOH = –2 mA 3.0 2.48 — — IOH = –8 mA 4.5 3.8 — — IOH = –16 mA Min to Max — — 0.1 IOL = 50 µA 2.3 — — 0.4 IOL = 2 mA 3.0 — — 0.44 IOL = 8 mA 4.5 — — 0.55 IOL = 16 mA VIL Output voltage VOH VOL V Test Conditions IOH = –50 µA Input current IIN 0 to 5.5 — — ±1 µA VIN = 5.5 V or GND Off-state output current IOZ 5.5 — — ±5 µA VO = VCC or GND Quiescent supply current ICC 5.5 — — 20 µA VIN = VCC or GND, IO = 0 Output leakage current IOFF 0 — — 5 µA VO = 5.5 V Input capacitance CIN 3.3 — 2.3 — pF VI = VCC or GND Note: For conditions shown as Min or Max, use the appropriate values under recommended operating conditions. 5 HD74LV240A Switching Characteristics • VCC = 2.5 ± 0.2 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions FROM (Input) TO (Output) Propagation delay time tPLH tPHL — 6.3 11.6 1.0 14.0 ns CL = 15 pF A Y — 8.2 14.4 1.0 17.0 — 8.5 14.6 1.0 17.0 OE Y — 10.3 17.8 1.0 21.0 — 9.7 14.1 1.0 16.0 OE Y — 14.2 19.2 1.0 21.0 Enable time Disable time tZH tZL tHZ tLZ CL = 50 pF ns CL = 15 pF CL = 50 pF ns CL = 15 pF CL = 50 pF • VCC = 3.3 ± 0.3 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions FROM (Input) TO (Output) Propagation delay time tPLH tPHL — 4.6 7.5 1.0 9.0 ns CL = 15 pF A Y — 5.9 11.0 1.0 12.5 — 6.2 10.6 1.0 12.5 OE Y — 7.5 14.1 1.0 16.0 — 8.3 12.5 1.0 13.5 OE Y — 11.8 15.0 1.0 17.0 Enable time Disable time 6 tZH tZL tHZ tLZ CL = 50 pF ns CL = 15 pF CL = 50 pF ns CL = 15 pF CL = 50 pF HD74LV240A Switching Characteristics (cont) • VCC = 5.0 ± 0.5 V Ta = 25°C Ta = –40 to 85°C Item Symbol Min Typ Max Min Max Unit Test Conditions FROM (Input) TO (Output) Propagation delay time tPLH tPHL — 3.4 5.5 1.0 6.5 ns CL = 15 pF A Y — 4.4 7.5 1.0 8.5 — 4.6 7.3 1.0 8.5 OE Y — 5.6 9.3 1.0 10.5 — 7.4 12.2 1.0 13.5 OE Y — 9.7 14.2 1.0 15.5 Enable time Disable time tZH tZL tHZ tLZ CL = 50 pF ns CL = 15 pF CL = 50 pF ns CL = 15 pF CL = 50 pF 7 HD74LV240A Output-skew Characteristics • CL = 50 pF Ta = 25°C Ta = –40 to 85°C Item Symbol VCC (V) Min Max Min Max Unit Output skew t sk (O) 2.3 to 2.7 — 2.0 — 2.0 ns 3.0 to 3.6 — 1.5 — 1.5 4.5 to 5.5 — 1.0 — 1.0 Note: Skew between any outputs of the same package switching in the same direction. This parameter is warranted but not production tested. Operating Characteristics • CL = 50 pF Ta = 25°C Item Symbol VCC (V) Min Typ Max Unit Test Conditions Power dissipation capacitance CPD 3.3 — 14.0 — pF f = 10 MHz 5.0 — 16.4 — Noise Characteristics • CL = 50 pF Ta = 25°C Item Symbol VCC (V) Min Typ Max Unit Quiet output, maximum dynamic VOL VOL (P) 3.3 — 0.6 0.8 V Quiet output, minimum dynamic VOL VOL (V) 3.3 — –0.5 –0.8 Quiet output, minimum dynamic VOH VOH (V) 3.3 — 2.8 — High-level dynamic input voltage VIH (D) 3.3 2.31 — — Low-level dynamic inout voltage VIL (D) 3.3 — — 0.99 8 V Test Conditions HD74LV240A Test Circuit VCC VCC Input Pulse generator Zout = 50 Ω See Function Table 1OE, 2OE Output 1 kΩ 1Y1 to 2Y4 S1 OPEN GND 1A1 to 2A4 CL * VCC TEST t PLH /t PHL S1 OPEN t ZH/t HZ t ZL /t LZ GND VCC Note: CL includes the probe and jig capacitance. 9 HD74LV240A • Waveform – 1 tf 90% 50% VCC Input A tr 10% t PLH 10% 90% 50% VCC t PHL VCC 0V VOH Output Y 50% VCC 50% VCC VOL • Waveform – 2 tf tr 90% Input OE 50% VCC 10% t ZL VCC 90% 50% VCC 10% 0V t LZ VCC 50% VCC Waveform – A t ZH Waveform – B VOL + 0.3 V t HZ 50% VCC VOH – 0.3 V VOL VOH 0V Notes: 1. Input waveform: PRR ≤ 1 MHz, Zo = 50 Ω, tr ≤ 3 ns, tf ≤ 3 ns 2. Waveform-A is for an output with internal conditions such that the output is low except when disabled by the output control. 3. Waveform-B is for an output with internal conditions such that the output is high except when disabled by the output control. 4. The output are measured one at a time with one transition per measurement. 10 HD74LV240A Package Dimensions Unit: mm 12.6 13 Max 11 1 10 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.10 ± 0.10 0.80 Max *0.22 ± 0.05 0.20 ± 0.04 2.20 Max 5.5 20 0.20 7.80 +– 0.30 1.15 0° – 8° 0.70 ± 0.20 0.15 0.12 M *Dimension including the plating thickness Base material dimension Hitachi Code JEDEC EIAJ Weight (reference value) FP-20DA — Conforms 0.31 g 11 HD74LV240A Unit: mm 12.8 13.2 Max 11 1 10 0.20 ± 0.10 0.935 Max 1.27 *0.42 ± 0.08 0.40 ± 0.06 0.25 10.40 +– 0.40 1.45 0° – 8° 0.57 0.70 +– 0.30 0.15 0.12 M *Dimension including the plating thickness Base material dimension 12 *0.27 ± 0.05 0.25 ± 0.04 2.65 Max 7.50 20 Hitachi Code JEDEC EIAJ Weight (reference value) FP-20DB Conforms — 0.52 g HD74LV240A Unit: mm 6.50 6.80 Max 11 1 10 4.40 20 0.65 +0.08 –0.07 *0.22 0.20 ± 0.06 1.0 0.13 M 6.40 ± 0.20 *Dimension including the plating thickness Base material dimension 0.07 +0.03 –0.04 0.10 *0.17 ± 0.05 0.15 ± 0.04 1.10 Max 0.65 Max 0° – 8° 0.50 ± 0.10 Hitachi Code JEDEC EIAJ Weight (reference value) TTP-20DA — — 0.07 g 13 Cautions 1. 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Even within the guaranteed ranges, consider normally foreseeable failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other consequential damage due to operation of the Hitachi product. 5. This product is not designed to be radiation resistant. 6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without written approval from Hitachi. 7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor products. Hitachi, Ltd. Semiconductor & Integrated Circuits. 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