HITACHI HD74LV393A

HD74LV393A
Dual 4-bit Binary Counters
ADE-205-276 (Z)
1st Edition
April 1999
Description
The HD74LV393A contain two 4-bit ripple carry binary counters, which can be cascaded to create a single
divide-by-256 counter.
The HD74LV393A is incremented on the high to low transition (negative edge) of the clock input, and
each has an independent clear input. When clear is set high all four bits of each counter are set to a low
level. This enables count trucation and allows the implementation of divide-by-N counter configurations.
Low-voltage and high-speed operation is suitable for the battery-powered products (e.g., notebook
computers), and the low-power consumption extends the battery life.
Features
•
•
•
•
•
•
VCC = 2.0 V to 5.5 V operation
All inputs VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs VO (Max.) = 5.5 V (@VCC = 0 V)
Typical VOL ground bounce < 0.8 V (@VCC = 3.3 V, Ta = 25°C)
Typical VOH undershoot > 2.3 V (@VCC = 3.3 V, Ta = 25°C)
Output current ±6 mA (@VCC = 3.0 V to 3.6 V), ±12 mA (@VCC = 4.5 V to 5.5 V)
HD74LV393A
Function Table
Inputs
CLK
CLR
Output
X
H
L
H
L
No change
L
L
No change
↑
L
No change
↓
L
Count up
Note: H:
L:
X:
↑:
↓:
High level
Low level
Immaterial
Low to high transition
High to low transition
Pin Arrangement
1CLK 1
14 VCC
1CLR 2
13 2CLK
1QA 3
12 2CLR
1QB 4
11 2QA
1QC 5
10 2QB
1QD 6
9 2QC
GND 7
8 2QD
(Top view)
2
HD74LV393A
Absolute Maximum Ratings
Item
Supply voltage range
Input voltage range*
1
Output voltage range*
1, 2
Symbol
Ratings
Unit
VCC
–0.5 to 7.0
V
VI
–0.5 to 7.0
V
VO
–0.5 to VCC + 0.5
V
–0.5 to 7.0
Conditions
Output: H or L
VCC: OFF
Input clamp current
I IK
–20
mA
VI < 0
Output clamp current
I OK
±50
mA
VO < 0 or VO > VCC
Continuous output current
IO
±25
mA
VO = 0 to VCC
Continuous current through
VCC or GND
I CC or IGND
±70
mA
Maximum power dissipation
at Ta = 25°C (in still air)*3
PT
785
mW
500
Storage temperature
Tstg
–65 to 150
SOP
TSSOP
°C
Notes: The absolute maximum ratings are values which must not individually be exceeded, and furthermore,
no two of which may be realized at the same time.
1. The input and output voltage ratings may be exceeded if the input and output clamp-current
ratings are observed.
2. This value is limited to 5.5 V maximum.
3. The maximum package power dissipation was calculated using a junction temperature of 150°C.
3
HD74LV393A
Recommended Operating Conditions
Item
Symbol
Min
Max
Unit
Supply voltage range
VCC
2.0
5.5
V
Input voltage range
VI
0
5.5
V
Output voltage range
VO
0
VCC
V
H or L
Output current
I OH
—
–50
µA
VCC = 2.0 V
—
–2
mA
VCC = 2.3 to 2.7 V
—
–6
VCC = 3.0 to 3.6 V
—
–12
VCC = 4.5 to 5.5 V
—
50
µA
VCC = 2.0 V
—
2
mA
VCC = 2.3 to 2.7 V
—
6
VCC = 3.0 to 3.6 V
—
12
VCC = 4.5 to 5.5 V
0
200
0
100
VCC = 3.0 to 3.6 V
0
20
VCC = 4.5 to 5.5 V
–40
85
I OL
Input transition rise or fall rate
Operating free-air temperature
∆t /∆v
Ta
Conditions
ns/V
VCC = 2.3 to 2.7 V
°C
Note: Unused or floating inputs must be held high or low.
Logic Diagram
CLK
Q
CK
Q
CK
R
Q
CK
R
Q
CK
R
R
CLR
QA
4
QB
QC
QD
HD74LV393A
Timing Diagram
CLK
CLR
QA
QB
QC
QD
5
HD74LV393A
DC Electrical Characteristics
• Ta = –40 to 85°C
Item
Symbol
VCC (V)*
Min
Typ
Max
Unit
Input voltage
VIH
2.0
1.5
—
—
V
2.3 to 2.7
VCC × 0.7
—
—
3.0 to 3.6
VCC × 0.7
—
—
4.5 to 5.5
VCC × 0.7
—
—
2.0
—
—
0.5
2.3 to 2.7
—
—
VCC × 0.3
3.0 to 3.6
—
—
VCC × 0.3
4.5 to 5.5
—
—
VCC × 0.3
Min to
Max
VCC – 0.1
—
—
2.3
2.0
—
—
IOL = –2 mA
3.0
2.48
—
—
IOL = –6 mA
4.5
3.8
—
—
IOL = –12 mA
Min to
Max
—
—
0.1
2.3
—
—
0.4
IOL = 2 mA
3.0
—
—
0.44
IOL = 6 mA
4.5
—
—
0.55
IOL = 12 mA
VIL
Output voltage
VOH
VOL
V
V
Test Conditions
IOL = –50 µA
IOL = 50 µA
Input current
IIN
0 to 5.5
—
—
±1
µA
VIN = 5.5 V or GND
Quiescent
supply current
ICC
5.5
—
—
20
µA
VIN = VCC or GND, IO = 0
Output leakage
current
IOFF
0
—
—
5
µA
VI, or VO = 0 V to 5.5 V
Input
capacitance
CIN
3.3
—
1.7
—
pF
VI = VCC or GND
Note: For conditions shown as Min or Max, use the appropriate values under recommended operating
conditions.
6
HD74LV393A
Switching Characteristics
• VCC = 2.5 ± 0.2 V
Ta = 25°C
Ta = –40 to 85°C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test Conditions
Maximum
clock
frequency
fmax
50
90
—
40
—
MHz
CL = 15 pF
30
60
—
25
—
—
11.8
17.7
1.0
20.5
—
15.1
21.3
1.0
24.5
CL = 50 pF
—
13.4
20.3
1.0
23.5
CL = 15 pF
—
16.7
23.9
1.0
27.5
CL = 50 pF
—
14.9
22.5
1.0
26.0
CL = 15 pF
—
18.2
26.1
1.0
30.0
CL = 50 pF
—
16.2
24.2
1.0
28.0
CL = 15 pF
—
19.5
27.8
1.0
32.0
CL = 50 pF
—
10.8
14.8
1.0
17.0
CL = 15 pF
—
14.2
17.4
1.0
20.0
CL = 50 pF
Propagation
delay time
tPLH/. /tPHL
tPHL
FROM
(Input)
TO
(Output)
CLK
QA
CL = 50 pF
ns
CL = 15 pF
QB
QC
QD
CLR
Qn
Setup time
tsu
6.0
—
—
6.0
—
ns
CLR L before CLK ↓
Pulse
width
tw
5.0
—
—
5.0
—
ns
CLR H
5.0
—
—
5.0
—
CLK H or L
7
HD74LV393A
Switching Characteristics (cont)
• VCC = 3.3 ± 0.3 V
Ta = 25°C
Ta = –40 to 85°C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test Conditions
Maximum
clock
frequency
fmax
75
120
—
65
—
MHz
CL = 15 pF
45
65
—
35
—
—
8.6
13.2
1.0
15.5
—
11.1
16.7
1.0
19.0
CL = 50 pF
—
10.2
15.8
1.0
18.5
CL = 15 pF
—
12.7
19.3
1.0
22.0
CL = 50 pF
—
11.7
18.0
1.0
21.0
CL = 15 pF
—
14.2
21.5
1.0
24.5
CL = 50 pF
—
13.0
19.7
1.0
23.0
CL = 15 pF
—
15.5
23.2
1.0
26.5
CL = 50 pF
—
7.9
12.3
1.0
14.5
CL = 15 pF
—
10.4
15.8
1.0
18.0
CL = 50 pF
Propagation
delay time
tPLH/. /tPHL
tPHL
FROM
(Input)
TO
(Output)
CLK
QA
CL = 50 pF
ns
CL = 15 pF
QB
QC
QD
CLR
Qn
Setup time
tsu
5.0
—
—
5.0
—
ns
CLR L before CLK ↓
Pulse
width
tw
5.0
—
—
5.0
—
ns
CLR H
5.0
—
—
5.0
—
8
CLK H or L
HD74LV393A
Switching Characteristics (cont)
• VCC = 5.0 ± 0.5 V
Ta = 25°C
Ta = –40 to 85°C
Item
Symbol
Min
Typ
Max
Min
Max
Unit
Test Conditions
Maximum
clock
frequency
fmax
125
170
—
105
—
MHz
CL = 15 pF
85
115
—
75
—
—
5.8
8.5
1.0
10.0
—
7.3
10.5
1.0
12.0
CL = 50 pF
—
6.8
9.8
1.0
11.5
CL = 15 pF
—
8.3
11.8
1.0
13.5
CL = 50 pF
—
7.7
11.2
1.0
13.0
CL = 15 pF
—
9.2
13.2
1.0
15.0
CL = 50 pF
—
8.5
12.5
1.0
14.5
CL = 15 pF
—
10.0
14.5
1.0
16.5
CL = 50 pF
—
5.4
8.1
1.0
9.5
CL = 15 pF
—
6.9
10.1
1.0
11.5
CL = 50 pF
Propagation
delay time
tPLH/. /tPHL
tPHL
FROM
(Input)
TO
(Output)
CLK
QA
CL = 50 pF
ns
CL = 15 pF
QB
QC
QD
CLR
Qn
Setup time
tsu
4.0
—
—
4.0
—
ns
CLR L before CLK ↓
Pulse
width
tw
5.0
—
—
5.0
—
ns
CLR H
5.0
—
—
5.0
—
CLK H or L
9
HD74LV393A
Operating Characteristics
•
CL = 50 pF
Ta = 25°C
Item
Symbol
VCC (V)
Min
Typ
Max
Unit
Test Conditions
Power
dissipation
capacitance
CPD
3.3
—
12.0
—
pF
f = 10 MHz
5.0
—
15.0
—
Test Circuit
Measurement point
CL*
Note: C L includes the probe and jig capacitance.
10
HD74LV393A
• Waveforms – 1
tr
tf
90 %
50 % V CC
CLR
10 %
tw
VCC
10 %
90 %
50 % V CC
CLK
0V
tf
t su
tr
10 %
VCC
90 %
50 % V CC
0V
tw
t PLH
tw
t PHL
VOH
Qn
50 % V CC
50 % V CC
VOL
• Waveforms – 2
CLR
10 %
tr
tf
VCC
90 %
50 % V CC
CLK
0V
90 %
50 % V CC
VCC
10 %
t PHL
0V
VOH
Qn
50 % V CC
VOL
t PHL
t PLH
VOH
Qn
50 % V CC
VOH
Qn
50 % V CC
VOL
VOL
Notes: 1. Input waveform: PRR ≤ 10 MHz, Zo = 50 Ω, t r ≤ 3 ns, t f ≤ 3 ns
2. The output are measured one at a time with one transition per measurement.
11
HD74LV393A
Package Dimensions
10.06
10.5 Max
8
5.5
14
1
0.10 ± 0.10
1.42 Max
1.27
0.42 ± 0.08
0.40 ± 0.06
0.20
7.80 +– 0.30
1.15
0° – 8°
0.70 ± 0.20
0.15
0.12 M
Dimension including the plating thickness
Base material dimension
12
0.22 ± 0.05
0.20 ± 0.04
2.20 Max
7
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
FP-14DA
—
Conforms
0.23 g
HD74LV393A
Unit: mm
8.65
9.05 Max
8
1
7
*0.22 ± 0.03
0.20 ± 0.03
0.635 Max
1.75 Max
3.95
14
0.10
6.10 +– 0.30
1.08
*0.42 ± 0.08
0.40 ± 0.06
0.11
0.14 +– 0.04
0° – 8°
1.27
0.67
0.60 +– 0.20
0.15
0.25 M
*Dimension including the plating thickness
Base material dimension
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
FP-14DN
Conforms
Conforms
0.13 g
13
HD74LV393A
4.40
5.00
5.30 Max
14
8
1
7
0.65
1.0
0.13 M
6.40 ± 0.20
0.10
Dimension including the plating thickness
Base material dimension
14
0.17 ± 0.05
0.15 ± 0.04
1.10 Max
0.83 Max
0.07 +0.03
–0.04
0.22 +0.08
–0.07
0.20 ± 0.06
0° – 8°
0.50 ± 0.10
Hitachi Code
JEDEC
EIAJ
Weight (reference value)
TTP-14D
—
—
0.05 g
Cautions
1. Hitachi neither warrants nor grants licenses of any rights of Hitachi’s or any third party’s patent,
copyright, trademark, or other intellectual property rights for information contained in this document.
Hitachi bears no responsibility for problems that may arise with third party’s rights, including
intellectual property rights, in connection with use of the information contained in this document.
2. Products and product specifications may be subject to change without notice. Confirm that you have
received the latest product standards or specifications before final design, purchase or use.
3. Hitachi makes every attempt to ensure that its products are of high quality and reliability. However,
contact Hitachi’s sales office before using the product in an application that demands especially high
quality and reliability or where its failure or malfunction may directly threaten human life or cause risk
of bodily injury, such as aerospace, aeronautics, nuclear power, combustion control, transportation,
traffic, safety equipment or medical equipment for life support.
4. Design your application so that the product is used within the ranges guaranteed by Hitachi particularly
for maximum rating, operating supply voltage range, heat radiation characteristics, installation
conditions and other characteristics. Hitachi bears no responsibility for failure or damage when used
beyond the guaranteed ranges. Even within the guaranteed ranges, consider normally foreseeable
failure rates or failure modes in semiconductor devices and employ systemic measures such as failsafes, so that the equipment incorporating Hitachi product does not cause bodily injury, fire or other
consequential damage due to operation of the Hitachi product.
5. This product is not designed to be radiation resistant.
6. No one is permitted to reproduce or duplicate, in any form, the whole or part of this document without
written approval from Hitachi.
7. Contact Hitachi’s sales office for any questions regarding this document or Hitachi semiconductor
products.
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Copyright ' Hitachi, Ltd., 1999. All rights reserved. Printed in Japan.