TRS232E www.ti.com ................................................................................................................................................. SLLS791C – JUNE 2007 – REVISED SEPTEMBER 2008 DUAL RS-232 DRIVER/RECEIVER WITH IEC61000-4-2 PROTECTION FEATURES 1 • Meets or Exceeds TIA/RS-232-F and ITU Recommendation V.28 • Operates From a Single 5-V Power Supply With 1.0-µF Charge-Pump Capacitors • Operates up to 250 kbit/s • Two Drivers and Two Receivers • ±30-V Input Levels • Low Supply Current . . . 8 mA Typical • ESD Protection for RS-232 Bus Pins – ±15-kV Human-Body Model (HBM) – ±8-kV IEC61000-4-2, Contact Discharge – ±15-kV IEC61000-4-2, Air-Gap Discharge 2 D, DW, N, NS, OR PW PACKAGE (TOP VIEW) C1+ VS+ C1− C2+ C2− VS− DOUT2 RIN2 1 16 2 15 3 14 4 13 5 12 6 7 11 10 8 9 VCC GND DOUT1 RIN1 ROUT1 DIN1 DIN2 ROUT2 APPLICATIONS • • • • • TIA/RS-232-F Battery-Powered Systems Terminals Modems Computers DESCRIPTION/ORDERING INFORMATION The TRS232E is a dual driver/receiver that includes a capacitive voltage generator to supply TIA/RS-232-F voltage levels from a single 5-V supply. Each receiver converts TIA/RS-232-F inputs to 5-V TTL/CMOS levels. This receiver has a typical threshold of 1.3 V, a typical hysteresis of 0.5 V, and can accept ±30-V inputs. Each driver converts TTL/CMOS input levels into TIA/RS-232-F levels. The driver, receiver, and voltage-generator functions are available as cells in the Texas Instruments LinASIC™ library. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. LinASIC is a trademark of Texas Instruments. UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2007–2008, Texas Instruments Incorporated TRS232E SLLS791C – JUNE 2007 – REVISED SEPTEMBER 2008 ................................................................................................................................................. www.ti.com ORDERING INFORMATION TA PACKAGE PDIP – N SOIC – D 0°C to 70°C SOIC – DW SOP – NS TSSOP – PW PDIP – N SOIC – D –40°C to 85°C SOIC – DW SOP – NS TSSOP – PW (1) (2) (1) (2) ORDERABLE PART NUMBER Tube of 25 TRS232ECN Tube of 40 TRS232ECD Reel of 2500 TRS232ECDR Tube of 40 TRS232ECDW Reel of 2000 TRS232ECDWR Reel of 2000 TRS232ECNSR Tube of 25 TRS232ECPW Reel of 2000 TRS232ECPWR Tube of 25 TRS232EIN Tube of 40 TRS232EID Reel of 2500 TRS232EIDR Tube of 40 TRS232EIDW Reel of 2000 TRS232EIDWR Reel of 2000 TRS232EINSR Tube of 25 TRS232EIPW Reel of 2000 TRS232EIPWR TOP-SIDE MARKING TRS232ECN TRS232EC TRS232EC PREVIEW RU32EC TRS232EIN TRS232EI TRS232EI PREVIEW RU32EI Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI website at www.ti.com. FUNCTION TABLES ABC Each Driver (1) (1) INPUT DIN OUTPUT DOUT L H H L H = high level, L = low level Each Receiver (1) (1) INPUT RIN OUTPUT ROUT L H H L H = high level, L = low level LOGIC DIAGRAM (POSITIVE LOGIC) 11 14 DIN1 DOUT1 10 7 DIN2 DOUT2 12 13 ROUT1 RIN1 9 8 ROUT2 2 RIN2 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232E TRS232E www.ti.com ................................................................................................................................................. SLLS791C – JUNE 2007 – REVISED SEPTEMBER 2008 Absolute Maximum Ratings (1) over operating free-air temperature range (unless otherwise noted) VCC Input supply voltage range (2) VS+ Positive output supply voltage range VS– Negative output supply voltage range VI Input voltage range VO Output voltage range Driver Operating virtual junction temperature Tstg Storage temperature range (1) (2) (3) (4) 6 V VCC – 0.3 15 V –0.3 –15 V –0.3 VCC + 0.3 UNIT V ±30 DOUT VS– – 0.3 VS+ + 0.3 ROUT –0.3 VCC + 0.3 DOUT Package thermal impedance (3) (4) TJ MAX Receiver Short-circuit duration θJA MIN –0.3 V Unlimited D package 73 DW package 57 N package 67 NS package 64 PW package 108 –65 °C/W 150 °C 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. All voltages are with respect to network GND. Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient temperature is PD = (TJ(max) – TA)/θJA. Operating at the absolute maximum TJ of 150°C can affect reliability. The package thermal impedance is calculated in accordance with JESD 51-7. Recommended Operating Conditions MIN NOM MAX 4.5 5 5.5 UNIT VCC Supply voltage VIH High-level input voltage (DIN1, DIN2) VIL Low-level input voltage (DIN1, DIN2) 0.8 V Receiver input voltage (RIN1, RIN2) ±30 V TA V 2 TRS232EC Operating free-air temperature TRS232EI V 0 70 –40 85 °C Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature (unless otherwise noted) (see Figure 4) PARAMETER ICC (1) (2) TEST CONDITIONS Supply current VCC = 5.5 V, MIN All outputs open, TA = 25°C TYP (2) MAX 8 10 UNIT mA Test conditions are C1–C4 = 1 µF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 5 V and TA = 25°C. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232E 3 TRS232E SLLS791C – JUNE 2007 – REVISED SEPTEMBER 2008 ................................................................................................................................................. www.ti.com DRIVER SECTION abc Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature range PARAMETER TEST CONDITIONS VOH High-level output voltage DOUT RL = 3 kΩ to GND VOL Low-level output voltage (3) DOUT RL = 3 kΩ to GND ro Output resistance DOUT VS+ = VS– = 0, VO = ±2 V IOS (4) Short-circuit output current DOUT VCC = 5.5 V, VO = 0 IIS DIN VI = 0 (1) (2) (3) (4) Short-circuit input current MIN 5 TYP (2) MAX 7 –7 UNIT V –5 V Ω 300 ±10 mA 200 µA Test conditions are C1–C4 = 1 µF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 5 V and TA = 25°C. The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for logic voltage levels only. Not more than one output should be shorted at a time. Switching Characteristics (1) VCC = 5 V, TA = 25°C (see Note 4) PARAMETER TEST CONDITIONS SR Driver slew rate RL = 3 kΩ to 7 kΩ, See Figure 2 SR(t) Driver transition region slew rate See Figure 3 Data rate One DOUT switching (1) MIN TYP MAX UNIT 30 V/µs 3 V/µs 250 kbit/s Test conditions are C1–C4 = 1 µF at VCC = 5 V ± 0.5 V. ESD protection PARAMETER DOUT, RIN 4 TYP UNIT HBM TEST CONDITIONS ±15 kV IEC61000-4-2, Air-Gap Discharge ±15 kV IEC61000-4-2, Contact Discharge ±8 kV Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232E TRS232E www.ti.com ................................................................................................................................................. SLLS791C – JUNE 2007 – REVISED SEPTEMBER 2008 RECEIVER SECTION abc Electrical Characteristics (1) over recommended ranges of supply voltage and operating free-air temperature range PARAMETER TEST CONDITIONS VOH High-level output voltage ROUT IOH = –1 mA VOL Low-level output voltage (3) ROUT IOL = 3.2 mA VIT+ Receiver positive-going input threshold voltage RIN VCC = 5 V, TA = 25°C VIT– Receiver negative-going input threshold voltage RIN VCC = 5 V, TA = 25°C Vhys Input hysteresis voltage RIN VCC = 5 V ri Receiver input resistance RIN VCC = 5 V, (1) (2) (3) MIN TYP (2) MAX 3.5 TA = 25°C UNIT V 1.7 0.4 V 2.4 V 0.8 1.2 0.2 0.5 1 V V 3 5 7 kΩ Test conditions are C1–C4 = 1 µF at VCC = 5 V ± 0.5 V. All typical values are at VCC = 5 V and TA = 25°C. The algebraic convention, in which the least-positive (most negative) value is designated minimum, is used in this data sheet for logic voltage levels only. Switching Characteristics (1) VCC = 5 V, TA = 25°C (see Figure 1) TYP UNIT tPLH(R) Receiver propagation delay time, low- to high-level output PARAMETER 500 ns tPHL(R) Receiver propagation delay time, high- to low-level output 500 ns (1) Test conditions are C1–C4 = 1 µF at VCC = 5 V ± 0.5 V. Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232E 5 TRS232E SLLS791C – JUNE 2007 – REVISED SEPTEMBER 2008 ................................................................................................................................................. www.ti.com PARAMETER MEASUREMENT INFORMATION VCC RL = 1.3 kΩ Pulse Generator (see Note A) See Note C ROUT RIN CL = 50 pF (see Note B) TEST CIRCUIT ≤10 ns Input 10% ≤10 ns 90% 50% 90% 50% 3V 10% 0V 500 ns tPLH tPHL VOH Output 1.5 V 1.5 V VOL WAVEFORMS A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%. B. CL includes probe and jig capacitance. C. All diodes are 1N3064 or equivalent. Figure 1. Receiver Test Circuit and Waveforms for tPHL and tPLH Measurements 6 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232E TRS232E www.ti.com ................................................................................................................................................. SLLS791C – JUNE 2007 – REVISED SEPTEMBER 2008 PARAMETER MEASUREMENT INFORMATION (continued) Pulse Generator (see Note A) DIN DOUT RS-232 Output CL = 10 pF (see Note B) RL TEST CIRCUIT ≤10 ns ≤10 ns 90% 50% Input 10% 3V 90% 50% 10% 0V 5 µs tPLH tPHL 90% Output 90% 10% 10% VOH VOL tTLH tTHL 0.8 (V SR + –V ) 0.8 (V –V ) OH OL OL OH or t t TLH THL WAVEFORMS A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%. B. CL includes probe and jig capacitance. Figure 2. Driver Test Circuit and Waveforms for tPHL and tPLH Measurements (5-µs Input) Pulse Generator (see Note A) DIN DOUT RS-232 Output 3 kΩ CL = 2.5 nF TEST CIRCUIT ≤10 ns ≤10 ns Input 90% 1.5 V 10% 90% 1.5 V 10% 20 µs tTLH tTHL Output 3V 3V −3 V −3 V SR + VOH VOL 6V tTHL or t TLH WAVEFORMS A. The pulse generator has the following characteristics: ZO = 50 Ω, duty cycle ≤ 50%. Figure 3. Test Circuit and Waveforms for tTHL and tTLH Measurements (20-µs Input) Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232E 7 TRS232E SLLS791C – JUNE 2007 – REVISED SEPTEMBER 2008 ................................................................................................................................................. www.ti.com APPLICATION INFORMATION 5V CBYPASS = 1 µF + − 16 1 C1 C1+ 1 µF 3 1 µF 5 From CMOS or TTL To CMOS or TTL 8.5 V VS+ 6 VS− C2+ 1 µF 2 C1− 4 C2 C3† VCC −8.5 V C4 + C2− 11 14 10 7 12 13 9 8 0V 1 µF RS-232 Output RS-232 Output RS-232 Input RS-232 Input 15 GND † C3 can be connected to VCC or GND. A. Resistor values shown are nominal. B. Nonpolarized ceramic capacitors are acceptable. If polarized tantalum or electrolytic capacitors are used, they should be connected as shown. In addition to the 1-µF capacitors shown, the TRS202E can operate with 0.1-µF capacitors. Figure 4. Typical Operating Circuit 8 Submit Documentation Feedback Copyright © 2007–2008, Texas Instruments Incorporated Product Folder Link(s): TRS232E PACKAGE OPTION ADDENDUM www.ti.com 22-Sep-2008 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TRS232ECD ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232ECDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232ECDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232ECDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232ECDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232ECDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232ECDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232ECDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232ECN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TRS232ECNE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TRS232ECPW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232ECPWG4 ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232ECPWR ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232ECPWRG4 ACTIVE TSSOP PW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232EID ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232EIDG4 ACTIVE SOIC D 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232EIDR ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232EIDRG4 ACTIVE SOIC D 16 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232EIDW ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232EIDWG4 ACTIVE SOIC DW 16 40 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232EIDWR ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232EIDWRG4 ACTIVE SOIC DW 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM TRS232EIN ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TRS232EINE4 ACTIVE PDIP N 16 25 Pb-Free (RoHS) CU NIPDAU N / A for Pkg Type TRS232EIPW ACTIVE TSSOP PW 16 90 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM Addendum-Page 1 Lead/Ball Finish MSL Peak Temp (3) PACKAGE OPTION ADDENDUM www.ti.com 22-Sep-2008 Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty TRS232EIPWG4 ACTIVE TSSOP PW 16 TRS232EIPWR ACTIVE TSSOP PW TRS232EIPWRG4 ACTIVE TSSOP PW 90 Lead/Ball Finish MSL Peak Temp (3) Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM 16 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 30-Jul-2010 TAPE AND REEL INFORMATION *All dimensions are nominal Device Package Package Pins Type Drawing TRS232ECDR SOIC SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) D 16 2500 330.0 16.4 B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant 6.5 10.3 2.1 8.0 16.0 Q1 TRS232ECDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 TRS232ECDWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 TRS232ECPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TRS232EIDR SOIC D 16 2500 330.0 16.4 6.5 10.3 2.1 8.0 16.0 Q1 TRS232EIDWR SOIC DW 16 2000 330.0 16.4 10.75 10.7 2.7 12.0 16.0 Q1 TRS232EIPWR TSSOP PW 16 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 30-Jul-2010 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TRS232ECDR SOIC D 16 2500 333.2 345.9 28.6 TRS232ECDR SOIC D 16 2500 346.0 346.0 33.0 TRS232ECDWR SOIC DW 16 2000 346.0 346.0 33.0 TRS232ECPWR TSSOP PW 16 2000 346.0 346.0 29.0 TRS232EIDR SOIC D 16 2500 346.0 346.0 33.0 TRS232EIDWR SOIC DW 16 2000 346.0 346.0 33.0 TRS232EIPWR TSSOP PW 16 2000 346.0 346.0 29.0 Pack Materials-Page 2 MECHANICAL DATA MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999 PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PINS SHOWN 0,30 0,19 0,65 14 0,10 M 8 0,15 NOM 4,50 4,30 6,60 6,20 Gage Plane 0,25 1 7 0°– 8° A 0,75 0,50 Seating Plane 0,15 0,05 1,20 MAX PINS ** 0,10 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064/F 01/97 NOTES: A. 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