HT9320 Series 22-Memory Tone/Pulse Dialer Features · · · · · · · · · · · · Patent Number: 64097, 86474, 113235(R.O.C.), 5424740(U.S.A.) Universal specification Operating voltag0e: 2.0V~5.5V Low standby current Lowmemoryretentioncurrent:0.1mA(typ.) Tone/pulse switchable Interface with LCD driver 32 digits for redialing 32 digits for the SA memory dialing One-key redialing Pause and P®T key for PBX 3.58MHz crystal or ceramic resonator Hand-free control · · · · · · · Hold-line control Pause, P®T can be saved for redialing On-hook store function Keytone function Lock function Resistor options - M/B ratio - Flash function and flash time - Pause and P®T duration - Pulse number - Inter-digit pause time for 10pps Memory number: 22 memories General Description The HT9320 series tone/pulse dialers are CMOS LSI for telecommunication systems. They are designed to meet various dialing specifications through resistor option matrix. LCD interface function and IDD lock function. The six versions also supply the hold-line and hand-free functions, which are suitable for feature phone applications. The HT9320 series are offered in six different versions. The different functions of the six versions are listed in the selection table. The HT9320A, HT9320H versions provide the on-hook store function; the HT9320B version provides the LCD interface function; the HT9320K version provides the keytone function; the HT9320L version provides both the HT9320 series provide SA, Redial and 20 one-touch/two-touch memory dialing. If the keyboard includes M1~M20 keys it can be used as one-touch memory dialing. Otherwise, it works as two-touch (PAGE®M1~M10) or three-touch(A®PAGE®0~9) memory dialing for speed dialing in either pulse or tone mode. 1 July 21, 1999 HT9320 Selection Table Function Flash Time (ms) Part No. Memory Hold- HandLCD Flash Dialing Line Free Interface Function HT9320A SA, R M1~M20 Ö Ö ¾ HT9320B SA, R M1~M20 Ö Ö Ö HT9320C SA, R M1~M20 ¾ ¾ ¾ HT9320H SA, R M1~M20 Ö Ö ¾ HT9320K SA, R M1~M20 Ö Ö ¾ HT9320L SA, R M1~M20 Ö Ö Ö Control 600 Digit 600/300/98 Control 600 Digit 600/300/98 Pulse No. Tone Duration (ms) InterTonePause (ms) M/B Pin IDD Lock N, N+1 10-N 82.5 85.5 Ö ¾ ¾ Ö 28 DIP N, N+1 10-N 82.5 85.5 ¾ ¾ ¾ ¾ 28 DIP KeyOnTone Hook Package Output Store Control 600 Digit 600/300/98 N, N+1 10-N 82.5 85.5 ¾ ¾ ¾ ¾ 22SKDIP Digit 600/100 N 82.5 82.5 Ö ¾ ¾ Ö 28 DIP Control 600 Digit 600/300/98 N, N+1 10-N 82.5 85.5 ¾ ¾ Ö ¾ 28 DIP N, N+1 10-N 82.5 85.5 ¾ Ö ¾ ¾ 28 DIP Control 600 Digit 600/300/98 HT9320L-X The same as HT9320L, but the voltage polarity of the row group and the column group are reversed. Pin Assignment C 8 1 2 8 C 7 C 8 1 2 8 C 7 C 8 1 2 8 C 7 H S T 2 2 7 C 6 D O U T 2 2 7 C 6 K T 2 2 7 C 6 R 1 3 2 6 C 5 R 1 3 2 6 C 5 R 1 3 2 6 C 5 R 2 4 2 5 C 4 R 2 4 2 5 C 4 C 8 1 2 2 C 7 R 2 4 2 5 C 4 R 3 5 2 4 C 3 R 3 5 2 4 C 3 R 1 2 2 1 C 6 R 3 5 2 4 C 3 R 4 6 2 3 C 2 R 4 6 2 3 C 2 R 2 3 2 0 C 5 R 4 6 2 3 C 2 R 5 7 2 2 C 1 R 5 7 2 2 C 1 R 3 4 1 9 C 4 R 5 7 2 2 C 1 H K S 8 2 1 P O H K S 8 2 1 P O R 4 5 1 8 C 3 H K S 8 2 1 P O M /B 9 2 0 H F O C L O C K 9 2 0 H F O R 5 6 1 7 C 2 N C 9 2 0 H F O H F I 1 0 1 9 X M U T E 1 0 1 9 X M U T E H K S 7 1 6 C 1 H F I 1 0 1 9 X M U T E M O D E 1 1 1 8 D T M F M O D E 1 1 1 8 D T M F M O D E 8 1 5 P O M O D E 1 1 1 8 D T M F X 1 1 2 1 7 H D I X 1 1 2 1 7 H D I X 1 9 1 4 X M U T E X 1 1 2 1 7 H D I X 2 1 3 1 6 H D O X 2 1 3 1 6 H D O X 2 1 0 1 3 D T M F X 2 1 3 1 6 H D O V D D 1 4 1 5 V S S V D D 1 4 1 5 V S S V D D 1 1 1 2 V S S V D D 1 4 1 5 V S S H T 9 3 2 0 A /H 2 8 D IP H F I H T 9 3 2 0 B /L /L -X 2 8 D IP H T 9 3 2 0 C 2 2 S K D IP 2 H T 9 3 2 0 K 2 8 D IP July 21, 1999 HT9320 Block Diagram H S T F S M C 1 C o n tro l D O U T C h e c k C L O C K K e y C o lu m n C 8 K e y F u n c tio n E n c o d e r W R M C o u n te r S R A M A D D R L R 1 K e y R o w R 5 T o n e E n c o d e r T o n e O u t C o n v e rte r P u ls e O u t D T M F P O X M U T E E n c o d e r D e b o u n c e F la s h K e y to n e C ir c u it M o d e In H D /H F H K S H F I H D I H D O X 1 X 2 D iv id e r C lo c k G e n e ra to r M /B M /B T im e r H F O M O D E K T 3 July 21, 1999 HT9320 Keyboard Information HT9320A/B/C/K/L HT9320H · O n e -to u c h m e m o r y k e y b o a r d · O n e -to u c h m e m o r y k e y b o a r d C 1 C 2 C 3 R 1 S A R 2 1 2 3 R 3 4 5 6 R 4 7 8 9 R 5 C 4 C 5 P S T # 0 * /T F R C 6 C 7 C 1 C 8 C 2 C 3 R 1 S A R 2 1 2 3 R 3 4 5 6 P C 4 P A G E F R 4 7 8 9 S T R 5 * /T 0 # R C 2 C 3 R 1 S A P P A G E R 2 1 2 C 6 C 7 C 8 M 1 M 6 M 1 1 M 1 6 F M 2 M 7 M 1 2 M 1 7 M 3 M 8 M 1 3 M 1 8 M 1 6 M 2 M 7 M 1 2 M 1 7 R 2 1 2 3 M 3 M 8 M 1 3 M 1 8 R 3 4 5 6 M 4 M 9 M 1 4 M 1 9 R 4 7 8 9 S T M 4 M 9 M 1 4 M 1 9 0 # R /P M 5 M 1 0 M 1 5 M 2 0 M 1 0 M 1 5 * R 5 M 2 0 · T w o -to u c h m e m o r y k e y b o a r d C 5 M 1 / M 1 M 2 / M 1 M 3 / M 1 M 4 / M 1 M 5 / M 1 C 1 C 6 1 2 3 4 5 M 6 / M 1 6 M 7 / M 1 7 M 8 / M 1 8 M 9 / M 1 9 M 1 0 / M 2 0 C 2 C 3 C 4 C 5 C 6 M 1 / M 1 1 M 2 / M 1 2 M 3 / M 1 3 M 4 / M 1 4 M 5 / M 1 5 M 6 / M 1 6 M 7 / M 1 7 M 8 / M 1 8 M 9 / M 1 9 M 1 0 / M 2 0 R 1 S A 2 P A G E P ® T R 2 1 5 3 F R 3 4 8 6 A R 4 7 0 9 S T # R /P * R 5 · T h r e e -to u c h m e m o r y k e y b o a r d C 1 C 2 C 3 C 4 R 1 S A 2 P A G E P ® T R 2 1 5 3 4 8 6 A 7 0 9 S T # R /P C 4 3 C 5 M 1 1 · T h r e e -to u c h m e m o r y k e y b o a r d C 1 C 4 P ® T M 6 · T w o -to u c h m e m o r y k e y b o a r d C 1 C 3 M 1 M 5 S A C 2 R 1 F R 3 4 5 6 A R 3 R 4 7 8 9 S T R 4 R 5 * /T 0 # R R 5 * F Memory dialing vs. keyboard form table Dialing Output One-Touch Memory Keyboard M1~M10 M1 ~ M10 M11~M20 M11 ~ M20 Two-Touch Memory Keyboard A Three-Touch Memory Keyboard a (a=1~9, 0) PAGE Ma (Ma=M1~M10) 4 A PAGE a (a=1~9, 0) July 21, 1999 HT9320 Pin Description Pin Name C1~C8 R1~R5 I/O I/O X1 I X2 O XMUTE HKS PO O I O Internal Connection Description CMOS IN/OUT These pins form a 5´8 keyboard matrix which can perform keyboard input detection and dialing specification setting functions. When on-hook (HKS=high) all the pins are set high. While off-hook the column group (C1~C8) remains low and the row group (R1~R5) is set high for key input detection. For the HT9320L-X, the column group remains high and the row group is set low for key input detection. An inexpensive single contact 5´8 keyboard can be used as an input device. Pressing a key connects a single column to a single row, and actuates the system oscillator that results in a dialing signal output. If more than two keys are pressed at the same time, no response occurs. The key-in debounce time is 20ms. Refer to the keyboard information for keyboard arrangement and to the functional description for dialing specification selection. The system oscillator consists of an inverter, a bias resistor and the necessary load capacitor on chip. Connecting a standard 3.579545MHz crystal or ceramic resonator to the X1 and OSCILLATOR X2 terminals can implement the oscillator function. The oscillator is turned off in the standby mode, and is actuated whenever a keyboard entry is detected. NMOS OUT XMUTE is an NMOS open drain structure pulled to VSS during dialing signal transmission. Otherwise, it is an open circuit. XMUTE is used to mute the speech circuit when transmitting the dial signal. CMOS IN This pin is used to monitor the status of the hook-switch and its combination with HFI/HDI can control the PO pin output to makeorbreaktheline. HKS=VDD:On-hookstate(PO=low).ExceptforHFI/HDI (hand-free/hold-lineco ntrolinput),other functionsarealldisabled. HKS=VSS:Off-hookstate(PO=high).The chipisinthestandbymodeandreadytoreceivethekeyinput. CMOS OUT This pin is a CMOS output structure which by receiving the HKS and HFO/HDO signals, control the dialer to connect or disconnect the telephone line. PO outputs a low to break line when HKS is high (on-hook) and HFO/HDO is low. PO outputs a high to make line when HKS is low (off-hook) or HFO is high or HDO is high. During the off-hook state, this pin also outputs the dialing pulse train in pulse mode dialing. While in the tone mode, this pin is always high. 5 July 21, 1999 HT9320 Pin Name MODE DTMF HDI HDO HFI HFO DOUT I/O I/O O I O I O O Internal Connection Description CMOS IN/OUT This is a three-state input/output pin, used for dialing mode selection, either Tone mode or Pulse mode, 10pps/20pps MODE=VDD: Pulse mode, 10pps MODE=OPEN: Pulse mode, 20pps MODE=VSS: Tone mode During the pulse mode dialing, switching this pin to the tone mode changes the subsequent digit entry to the tone mode. When the chips are in tone mode, switching to the pulse mode will also be recognized. CMOS OUT This pin is active only when the chip transmits tone dialing signals. Otherwise, it always outputs a low. The pin outputs tone signals to drive the external transmitter amplifier circuit. The load resistor should not be less than 5kW. CMOS IN Pull-high This pin is a schmitt trigger input structure. Active low. Applying a negative going pulse to this pin can toggle the HDO output once. An external RC network is recommended for input debouncing. The pull-high resistance is 200kW typ. CMOS OUT The HDO is a CMOS output structure. Its output is toggle- controlled by a negative transition on HDI. When HDO is toggled high, PO keeps high to hold the line. The hold function can be released by setting HFO high or by an on-off hook operation or by another HDI input. The HDO pin can directly drive the HT3810 series melody generator to produce a hold-line background melody. Refer to the functional description for the hold-line function. CMOS IN Pull-low This pin is a schmitt trigger input structure. Active high. Applying a positive going pulse to HFI can toggle the HFO once and hence control the hand-free function. An external RC network is recommended for input debouncing. The pull-low resistance of HFI is 200kW typ. CMOS OUT The HFO is a CMOS output structure. Its output is togglecontrolled by a positive transition on the HFI pin. When HFO is high, the hand-free function is enabled and PO outputs a high to connect the line. The hand-free function can be released by an on-off-hook operation or by another HFI input or by setting HDO high. Refer to the functional description for the hand-free function operation. NMOS OUT NMOS open drain output pin. It outputs the BCD code of the dialing digits to the LCD driver chip (HT16XX series) or mC for dialing number display. Refer to the functional description for the detailed timing. 6 July 21, 1999 HT9320 I/O Internal Connection Description CLOCK O NMOS OUT NMOS open drain output. When dialing, it outputs a series of pulse trains for DOUT data synchronization. DOUT data is valid at the falling edge of clock. VDD I ¾ Positive power supply, 2.0V~5.5V for normal operation VSS I ¾ Negative power supply Pin Name HST I CMOS IN Pull-low (HT9320A) CMOS IN (HT9320H) I M/B CMOS IN Pull-high (HT9320A) CMOS IN (HT9320H) KT O CMOS OUT On-hook store enable input HST=VDD: On-hook store (HT9320A/H) HST=Floating: Off-hook store (HT9320A) HST=VSS: Off-hook store (HT9320H) The Pull-low resistance is 200kW typ. Make/Break ratio selection M/B=VSS: 33.3/66.6 (HT9320A) M/B=Floating: 40/60 (HT9320A) M/B=VDD: 33.3/66.6 (HT9320H) M/B=VSS: 40/60 (HT9320H) The pull-high resistance is 200kW typ. Keytone output pin. Outputs a 1.2kHz tone carrier for 34ms each time a key is pressed in the pulse mode. Approximate internal connection circuits C M O S IN /O U T N M O S O U T C M O S IN V D D V D D C M O S IN P u ll- lo w C M O S O U T C M O S IN P u ll- h ig h O S C IL L A T O R X 1 2 0 p F X 2 1 0 M 1 0 p F E N 7 July 21, 1999 HT9320 Absolute Maximum Ratings Supply Voltage ................................-0.3V to 6V Storage Temperature ................-50°C to 125°C Input Voltage .................. VSS-0.3 to VDD+0.3V Operating Temperature .............-20°C to 75°C Note: These are stress ratings only. Stresses exceeding the range specified under ²Absolute Maximum Ratings² may cause substantial damage to the device. Functional operation of this device at other conditions beyond those listed in the specification is not implied and prolonged exposure to extreme conditions may affect device reliability. Electrical Characteristics Symbol Parameter fOSC=3.5795MHz, Ta=25°C Test Conditions VDD Conditions Min. Typ. Max. Unit VDD Operating Voltage ¾ ¾ 2 ¾ 5.5 V IDD Operating Current 2.5V Pulse Off-hook Keypad entry Tone No load ¾ 0.2 1 mA ¾ 0.6 2 mA ISTB Standby Current 1V ¾ ¾ 1 mA VR Memory Retention Voltage ¾ ¾ 1 ¾ 5.5 V IR Memory Retention Current 1V ¾ 0.1 0.2 mA VIL Input Low Voltage ¾ ¾ VSS ¾ 0.2VDD V VIH Input High Voltage ¾ ¾ 0.8VDD ¾ VDD V IXMO XMUTE Leakage Current ¾ VXMUTE=12V No entry ¾ ¾ 1 mA IOLXM ¾ ¾ mA On-hook, no load No entry On-hook XMUTE Sink Current 2.5V VXMUTE=0.5V 1 IHKS HKS Pin Input Current 2.5V VHKS=2.5V ¾ ¾ 0.1 mA RHFI HFI Pull-low Resistance 2.5V VHFI=2.5V ¾ 200 ¾ kW RHDI HDI Pull-high Resistance 2.5V VHDI=0V ¾ 200 ¾ kW RM/B M/B Pull-high Resistance 2.5V VM/B=0V ¾ 200 ¾ kW RHST HST Pull-low Resistance 2.5V VHST=2.5V ¾ 200 ¾ kW IOH1 Keypad Pin Source Current 2.5V VOH=0V -4 ¾ -40 mA IOL1 Keypad Pin Sink Current 2.5V VOL=2.5V 200 400 ¾ mA IOH2 HFO Pin Source Current 2.5V VOH=2V -1 ¾ ¾ mA IOL2 HFO Pin Sink Current 2.5V VOL=0.5V 1 ¾ ¾ mA IOH3 HDO Pin Source Current 2.5V VOH=2V -1 ¾ ¾ mA IOL3 HDO Pin Sink Current 2.5V VOL=0.5V 1 ¾ ¾ mA IOH4 KT Pin Source Current 2.5V VOH=2V -1 ¾ ¾ mA IOL4 KT Pin Sink Current 2.5V VOL=0.5V 1 ¾ ¾ mA 8 July 21, 1999 HT9320 Symbol Test Conditions Parameter Conditions VDD ¾ 0.2 ¾ s ¾ 1 ¾ s One-key redialing ¾ 1 ¾ s ¾ 20 ¾ ms ¾ 1.2 ¾ s ¾ TRP Pause Time for One-key Redialing ¾ TDB Key-in Debounce Time ¾ TBRK Break Time for One-key Redialing ¾ One-key redialing fOSC System Frequency ¾ Crystal=3.5795MHz ¾ Pulse Mode Electrical Characteristics 3.5759 3.5795 3.5831 MHz fOSC=3.5795MHz, Ta=25°C Test Conditions VDD Max. Unit Control key Pause Time After Flash Parameter Typ. Digit key TFP Symbol Min. Conditions Min. Typ. Max. Unit IPOH PO Output Source 2.5V VOH=2V Current -0.2 ¾ ¾ mA IPOL PO Output Sink Current 0.2 0.6 ¾ mA PR Pulse Rate MODE pin is connected to VDD ¾ 10 ¾ MODE pin is opened ¾ 20 ¾ ¾ 33:66 ¾ 2.5V VOL=0.5V ¾ A resistor is linked between R2 and C1 (HT9320B/C/K/L) M/B=VSS (HT9320A) M/B Make/Break Ratio ¾ M/B=VDD (HT9320H) No resistor is linked between R2 and C1 (HT9320B/C/K/L) % ¾ 40:60 ¾ M/B ratio=40:60 ¾ 40 (10pps) 20 (20pps) ¾ M/B ratio=33:66 ¾ 33 (10pps) 17 (20pps) ¾ M/B=Floating (HT9320A) pps M/B=VSS (HT9320H) TPDP Pre-digit-pause Time ¾ 9 ms July 21, 1999 HT9320 Symbol Parameter Test Conditions VDD Conditions Pulse rate=10pps. No resistor is linked between R1 and C5 (HT9320A/B/C/K) TIDP Inter-digit-pause Time ¾ ¾ ¾ 800 Max. Unit ¾ ms Pulse rate=10pps. A resistor is linked between R1 and C5 (HT9320A/B/C/K) ¾ 400 ¾ Pulse rate=20pps ¾ 500 ¾ ¾ 33 (10pps) 17 (20pps) ¾ M/B=VSS (HT9320A) Pulse Make Duration Typ. Pulse rate=10pps (HT9320H/L) A resistor is linked between R2 and C1 (HT9320B/C/K/L) TM Min. M/B=VDD (HT9320H) No resistor is linked between R2 and C1 (HT9320B/C/K/L) M/B=Floating (HT9320A) ms ¾ 40 (10pps) 20 (20pps) ¾ ¾ 66 (10pps) 33 (20pps) ¾ M/B=VSS (HT9320H) A resistor is linked between R2 and C1 (HT9320B/C/K/L) M/B=VSS (HT9320A) TB pulse Break Duration ¾ M/B=VDD (HT9320H) No resistor is linked between R2 and C1 (HT9320B/C/K/L) M/B=Floating (HT9320A) ms ¾ 60 (10pps) 30 (20pps) ¾ M/B=VSS (HT9320H) TKT Keytone Duration ¾ Pulse mode (HT9320K) ¾ 34 ¾ ms FKTC Keytone Carrier ¾ Pulse mode (HT9320K) ¾ 1.2 ¾ kHz Tone Mode Electrical Characteristics Symbol Parameter fOSC=3.5795MHz, Ta=25°C Test Conditions VDD Conditions ¾ ¾ Min. Typ. Max. Unit 0.45VDD ¾ 0.7VDD V 0.1 ¾ ¾ mA 0.12 0.155 0.18 Vrms VTDC DTMF Output DC Level ITOL DTMF Sink Current VTAC DTMF Output AC Level RL DTMF Output Load 2.5V THD£-23dB 5 ¾ ¾ kW ACR Column Pre-emphasis 2.5V Row group=0dB 1 2 3 dB 2.5V VDTMF=0.5V ¾ Row group, RL=5kW 10 July 21, 1999 HT9320 Symbol Test Conditions Parameter Conditions VDD Min. Typ. Max. Unit ¾ -30 -23 dB THD Tone Signal Distortion 2.5V RL=5kW TTMIN Minimum Tone Duration ¾ Auto-redial ¾ 82.5 ¾ ms TITPM Minimum Inter-tone Pause ¾ Auto-redial ¾ 85.5 ¾ ms THD (Distortion) (dB) = 20 log ( V12 + V22 + K Vn 2 / Vi2 + Vh 2 ) Vi, Vh: Row group and column group signals V1, V2, ... Vn: Harmonic signals (BW=300Hz~3500Hz) Functional Description C 1 Keyboard matrix C1~C8 and R1~R5 form a keyboard matrix. Together with a standard 5´8 keyboard, the keyboard matrix is used for dialing entries. In addition, the keyboard matrix also provides resistor options for different dialing specification selections. The keyboard arrangement for the HT9320 series are shown in the Keyboard Information. Output Frequency (Hz) Specified Actual 697 699 +0.29% R3 770 766 -0.52% R4 852 847 -0.59% R5 941 948 +0.74% C1 1209 1215 +0.50% C2 1336 1332 -0.30% C3 1477 1472 -0.34% R C 4 C 5 C 6 C 7 R 4 K 2 1 R K 3 1 R K 4 1 R K 5 1 R K 6 1 R K 7 1 K 1 2 R 3 R K 1 3 R K 1 4 All the resistors are 330kW. The resistor option functions and the default specifications (withoutoptionresistors)arelistedbelow(HT9320A/ B/C/K/L). Option Resistor % Error R2 C 3 R R 2 Tone frequency Tone Name C 2 R 1 Option Function RK12 (HT9320B/ Ratio Selection C/K/L) RK13 RK14 RK21 Note: %Errordoesnotcontainthecrystalfrequency drift RK31 40:60 Flash= control Flash Function function /Time Selection Flash time= 600ms Pause & P®T Duration Selection TP= 3.6s TP®T= 3.6s Pulse Number Selection N Dialing specification selection RK41 Various dialing specifications can be selected by adding resistors across keyboard matrix pins. The allowable option resistor connections are shown on the table. RK51 Inter-digit(HT9320A Pause Time for /B/C/K) 10pps 11 Default (No Resistor) 800ms July 21, 1999 HT9320 Option Resistor Option Function Pause and P®T duration selection table Default (No Resistor) RK51 International RK61 Direct Dialing RK71 Lock Selection (HT9320L) · HT9320A/B/C/K/L Normal dialing (unlock) M/B ratio selection table RK21 TP (sec) TP®T (sec) No 3.6 3.6 Yes 2 1 · HT9320H · HT9320A M/B Pin M/B Ratio (%) VSS 33.3:66.6 Floating 40:60 TP (sec) TP®T (sec) 3.6 3.6 Pulse number selection table · HT9320A/B/C/K/L · HT9320B/C/K/L RK12 M/B Ratio (%) RK31 RK41 Pulse Number No 40:60 No No N Yes 33.3:66.6 No Yes N+1 Yes No 10-N Yes Yes ¾ · HT9320H M/B Pin M/B Ratio (%) VDD 33.3:66.6 VSS 40:60 · HT9320H Pulse Number N Flash function/time (duration) selection table · HT9320A/B/C/K/L Inter-digit-pause time for 10pps RK13 RK14 Flash Function Flash Time (TF) No No Control 600ms RK51 Inter-digit pause time No Yes Digit 600ms No 800ms Yes No Digit 98ms Yes 400ms Yes Yes Digit 300ms · HT9320A/B/C/K · HT9320H/L · HT9320H Inter-digit pause time M/B Pin Flash Function Flash Time (TF) VSS Digit 600ms VDD Digit 100ms 800ms 12 July 21, 1999 HT9320 On/Off hook store selection table Pulse number table Keypad Output Pulse Number HST Pin Hook Store Mode On-hook store Digit Key N 10-N N+1 VDD (HT9320A/H) 1 1 9 2 Floating (HT9320A) Off-hook store VSS (HT9320H) Off-hook store 2 2 8 3 3 3 7 4 4 4 6 5 5 5 5 6 6 6 4 7 7 7 3 8 8 8 2 9 9 9 1 10 0 10 10 1 */T P®T P®T P®T # Ignored Ignored Ignored Lock function (HT932L) This function aims to detect lock dialing numbers to prevent from an unauthorized long distance call. The dialing output of this chip is disabled if the first input key after on-off hook is the lock number when the lock function is enabled. International direct dialing lock (IDD lock) selection table RK51 RK61 RK71 Lock Function No No No Normal dialing without lock function DOUT BCD code No No Yes To lock 0 When dialing, the corresponding 4-bit BCD codes are serially presented on DOUT from MSB to LSB. The data of DOUT is valid at the falling edge of the CLOCK pin. The following table lists the BCD codes corresponding to the keyboard input. No Yes ¾ To lock 0, 9 Yes ¾ ¾ IDD lock operation by the telephone keyboard. (See keyboard operation) Note: ²¾² stands for ²don¢t care² Key-In BCD Code Key-In BCD Code 1 0001 8 1000 Hand-free function operation 2 0010 9 1001 · Hand-free function execution 3 0011 0 1010 4 0100 */T 1101 5 0101 # 1100 6 0110 F 1011 7 0111 P 1110 When HFO is low, a rising edge triggers the HFI, enabling the Hand-free function (HFO becomes high). · Reset Hand-free function When HFO is high, the Hand-free function is enabled and can be reset by: ¨ Off-hook On hook store (HT9320A/H) ¨ Applying a rising edge to HFI ¨ Changing the HDO pin from low to high When the external power supply (2V~5.5V) is used and the HST pin is connected to VDD, the user can store dialing numbers to the memories (M1~M20) during on-hook state. 13 July 21, 1999 HT9320 · Hand-free function table I n p u t C u r r e n t S t a t e H K S H F O H D O H D I H L X H H L X H H L X X H : L o g ic H I G H L : L o g ic L O W L H F O H F I H D I H K S H D O H F O A n L X L H A n L A n L H L X L H A n H L L H H L A n L A n L L L L H A n H A n L A n L H A n A n L A n X : D o n 't c a r e A n : U n c h a n g e d H L H A n L A n H L L L L X L H A n L A n L X L A n L A n L A n H H A n A n H A n L H H L X L L X X L H : L o g ic H I G H L : L o g ic L O W : R is in g e d g e : F a llin g e d g e L H L L L X X A n X H L L H X X H D O H A n L L H K S L X H L L N e x t S t a t e H D O H X L L H F O A n L L H K S I n p u t C u r r e n t S t a t e N e x t S t a t e A n H X H H F I L X H · Hold-line function table X : D o n 't c a r e A n : U n c h a n g e d Hold-line function operation Key definition · Hold-line function execution · 0,1,2,3,4,5,6,7,8,9 keys L H : R is in g e d g e : F a llin g e d g e These are dialing number input keys for both the pulse mode and the tone mode operations. When HDO is low, a falling edge triggers the HDI, enabling the Hold-line function (HDO becomes high). The XMUTE remains low when HDO is high. · */T This key executes the P®T function and wait a TP®T duration in the pulse mode. On the other hand, the */T key executes the * function in the tone mode. · Reset Hold-line function When HDO is high, the Hold-line function is enabled and can be reset by: ¨ Off-hook · * (HT9320H) ¨ Applying a falling edge to HDI ¨ Changing the HFO pin from low to high The * key executes the * tone output function in the tone mode. No response in the pulse mode. · P®T The key executes the P®T function in the pulse mode. No response in the tone mode. · # This is a dialing signal key for the tone mode only, no response in the pulse mode. 14 July 21, 1999 HT9320 · SA · ST Pressing this key can save the preceding dialing telephone numbers. The saved number is redialed if it is pressed again. SA will also redial the saved number if it is the first key pressed at the off-hook state. During the dialing signal transmission, the SA key is inhibited. Store key. The execution of this key actuates the store memory function with (or without) dialing output. During the dialing signal transmission, the ST key is inhibited. · A Auto key. When this key is pressed before pressing any one of the digital keys (0~9) it executes the two-touch/ three-touch memory dialing function. · F The flash key can be selected as a digit or as a control key by the option resistors RK13 & RK14. Pressing the flash key will force the PO pin to be ²low² for the TF duration and is then followed by TFP (sec). TF can also be selected by RK13, RK14. · PAGE M11~M20 are represented by pressing the PAGE key an.d the digital keys (0~9) or M1~M10. That is to say, A PAGE digit key (0~9) or PAGE®M1~M10 executes M11~M20 memorydialing. · P Pause key. The execution of this key can pause the output for the TP duration. TP can be selected by RK21. · M1~M20 One-touch memory dialing for speed-dialing in either pulse or tone mode. · R Redial key. Executes redialing as well as one-key redial function. · R/P Redial and pause function key. If it is pressed as the first key after off-hook, this key executes the redial function. Otherwise, it works as the pause key. 15 July 21, 1999 HT9320 Keyboard operation The following operations are described under an on-off-hook or on-hook condition with the hand-free active condition. N o r m a l d ia lin g · P u ls e m o d e - - ( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 D 2 D ia lin g o u tp u t: D 1 R M : D 1 T o n e m o d e ( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 ... D n D 2 ... D n D 2 ... D n R M : D 1 S A M : U n c h a n g e d ... D n D 2 ... D n D 2 ... D n S A M : U n c h a n g e d ( b ) w ith * /T K e y b o a r d in p u t: D 1 D 2 ... D n * /T D n + 1 ( b ) w ith * /T K e y b o a r d in p u t: ... D m D ia lin g o u tp u t: D 1 R M : D 1 D 2 D ia lin g o u tp u t: D 1 D 2 ... D n T P ® T P u ls e * /T D n + 1 ... D m D 2 ... D n D 1 D 2 ... D n * /T D n + 1 ... D m D ia lin g o u tp u t: D 1 D n + 1 ... D m T o n e R M : D 1 D 2 ... D n D 2 ... D n * D n + 1 ... D m * D n + 1 ... D m S A M : U n c h a n g e d S A M : U n c h a n g e d · N o te : T h e m a x im u m c a p a c ity o f th e R M m e m o r y is 3 2 d ig its . W h e n m o r e th a n 3 2 d ig its a r e e n te r e d , th e s ig n a l is tr a n s m itte d b u t th e r e d ia l fu n c tio n is in h ib ite d . R e d ia l - P u ls e m o d e - ( a ) w ith o u t * /T , P ® T R M c o n te n t: D 1 D 2 ... D n K e y b o a r d in p u t: R M R D ia lin g o u tp u t: D 1 D 2 ... D n R D 2 ... D n R M : U n c h a n g e d S A M : U n c h a n g e d ( b ) w ith * /T D 2 ... D n K e y b o a r d in p u t: [ R D ia lin g o u tp u t: D 1 R M : U n c h a n g e d D 2 ... D n D ia lin g o u tp u t: D 1 S A M : U n c h a n g e d S A M : U n c h a n g e d c o n te n t: D 1 K e y b o a r d in p u t: R M : U n c h a n g e d ( b ) w ith * /T R M c o n te n t: D 1 T o n e m o d e ( a ) w ith o u t * /T , P ® T * /T D n + 1 ... D m o r R /P ] D 2 ... D n P u ls e T R M c o n te n t: D 1 D 2 ... D n K e y b o a r d in p u t: [ R P ® T D n + 1 ... D m T o n e D ia lin g o u tp u t: D 1 * /T D n + 1 ... D m o r R /P ] D 2 ... D n * D n + 1 ... D m R M : U n c h a n g e d S A M : U n c h a n g e d N o te : If th e d ia lin g n u m b e r e x c e e d s 3 2 d ig its , r e d ia lin g is in h ib ite d a n d P O = V D D 16 July 21, 1999 HT9320 · O n e - k e y r e d ia l - P u ls e m o d e - ( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 D 2 ... D n D 2 ... D n T P u ls e D 1 D 2 ... D n P u ls e D 2 ... D n R D ia lin g o u tp u t: D 1 R M : D 1 T o n e m o d e ( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 T B R K D 2 ... D n D ia lin g o u tp u t: D 1 D 2 ... D n ... D n R M : D 1 D 2 ... D n R P R T T B R K R P D 1 D 2 S A M : U n c h a n g e d S A M : U n c h a n g e d ( b ) w ith * /T K e y b o a r d in p u t: D 1 D 2 D m R ... D n * /T ( b ) w ith * /T K e y b o a r d in p u t: D n + 1 ... D 2 R D ia lin g o u tp u t: D 1 D ia lin g o u tp u t: D 1 R M : D 1 D 1 D m D 2 ... D n T P ® T D n + 1 ... D m P u ls e T o n e T B R K T R P D 1 D 2 ... D n T P T P u ls e D n + 1 ... D m T o n e D 2 ... D n * /T D n + 1 ... D m T R M : D 1 ... D n D 2 ... D n B R K ... D m D 2 ... D n T R P * /T D n + 1 ... * D n + 1 ... D m D 1 D 2 ... D n * D n + 1 * D n + 1 ... D m S A M : U n c h a n g e d S A M : U n c h a n g e d N o te : If th e d ia lin g n u m b e r e x c e e d s 3 2 d ig its , r e d ia lin g is in h ib ite d a n d P O = V D D · P a u s e K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D 1 R M : D 1 D 2 ... D n D 2 ... D n D 2 ... D n P T [ P o r R /P ] D n + 1 ... D m D n + 1 ... D m P D n + 1 ... D m S A M : U n c h a n g e d · S A c o p y - P u ls e m o d e - ( a ) w ith o u t * /T K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D 1 R M : D 1 S A M : D 1 ... D n K e y b o a r d in p u t: D 1 S A D ia lin g o u tp u t: D 1 R M : D 1 D 2 ... D n S A M : D 1 D 1 D 2 D m S A D ia lin g o u tp u t: D 1 S A M : D 1 D 2 D 2 ... D n D 2 ... D n ( b ) w ith * /T K e y b o a r d in p u t: R M : D 1 T o n e m o d e ( a ) w ith o u t * /T D 2 ... D n D 2 ... D n ... D n * /T D 2 ... D n T P ® T P u ls e * /T D n + 1 ... D m * /T D n + 1 ... D m D n + 1 ... D n + 1 ... D m T o n e D 2 ... D n D 2 ... D n D 2 ... D n ( b ) w ith * /T K e y b o a r d in p u t: D 1 D 2 ... D n D m S A D ia lin g o u tp u t: D 1 D 2 ... D n R M : D 1 S A M : D 1 S A D 2 ... D n D 2 ... D n D 2 ... D n * /T * D n + 1 ... D n + 1 ... D m * D n + 1 ... D m * D n + 1 ... D m N o te : T h e m a x im u m c a p a c ity o f th e R M m e m o r y is 3 2 d ig its . W h e n m o r e th a n 3 2 d ig its p lu s th e " S A " k e y a r e e n te r e d , th e S A V E fu n c tio n w ill n o t b e e x e c u te d , a n d a ll th e e x is tin g d a ta in th e s a v e m e m o r y w ill n o t b e c h a n g e d . 17 July 21, 1999 HT9320 S A d ia lin g · P u ls e m o d e - T o n e m o d e - ( a ) w ith o u t * /T S A M c o n te n t: D 1 ( a ) w ith o u t * /T D 2 ... D n S A M K e y b o a r d in p u t: S A D ia lin g o u tp u t: D 1 D 2 ... D n S A M : U n c h a n g e d D 2 ... D n * /T ( b ) w ith * /T S A M c o n te n t: D 1 D n + 1 ... D m K e y b o a r d in p u t: S A R M : U n c h a n g e d D 2 ... D n P u ls e T P ® T D 2 ... D n * D n + 1 ... D m K e y b o a r d in p u t: S A D ia lin g o u tp u t: D 1 D 2 ... D n D n + 1 ... D m T o n e * D n + 1 ... D m R M : U n c h a n g e d S A M : U n c h a n g e d S A M : U n c h a n g e d · D 2 ... D n R M : U n c h a n g e d S A M : U n c h a n g e d D ia lin g o u tp u t: D 1 D 2 ... D n D ia lin g o u tp u t: D 1 R M : U n c h a n g e d ( b ) w ith * /T S A M c o n te n t: D 1 c o n te n t: D 1 K e y b o a r d in p u t: S A M e m o ry s to re O n e - to u c h m e m o r y s to r e w ith o u t d ia lin g o u tp u t - K e y b o a r d in p u t: S T D 1 D 2 ... D n S T O n e - to u c h m e m o r y s to r e w ith d ia lin g o u tp u t - M a K e y b o a r d in p u t: D 1 D ia lin g o u tp u t: D ia lin g o u tp u t: D 1 M a : D 1 D 2 ... D n M a : D 1 D 2 ... D n R M : D 1 D 2 ... D n R M : D 1 D 2 ... D n - S A M : U n c h a n g e d ... D n S T M a T w o - to u c h m e m o r y s to r e w ith d ia lin g o u tp u t (M 1 ~ M 1 0 ) - K e y b o a r d in p u t: D 1 [ (M 1 1 ~ M 2 0 ) (M 1 1 ~ M 2 0 ) ... D n S T o r M b ] D 2 ... D n o r M b b S T K e y b o a r d in p u t: D 1 D 2 ... D n S T S T P A G E [ b o r M b ] D ia lin g o u tp u t: D 1 M b : D 1 D 2 ... D n M b : D 1 D 2 ... D n M a : D 1 D 2 ... D n (a = b + 1 0 , M 1 0 = M 0 ) M a : D 1 D 2 ... D n (a = b + 1 0 , M 1 0 = M 0 ) R M : D 1 D 2 ... D n R M : D 1 D 2 ... D n S A M : U n c h a n g e d T h r e e - to u c h m e m o r y s to r e w ith o u t d ia lin g o u tp u t (M 1 1 ~ M 2 0 ) K e y b o a r d in p u t: S T D 1 D 2 ... D n S T P A G E [ b o r M b ] S T ] D ia lin g o u tp u t: D 2 ... D n - S A M : U n c h a n g e d T h r e e - to u c h m e m o r y s to r e w ith d ia lin g o u tp u t (M 1 1 ~ M 2 0 ) K e y b o a r d in p u t: D 1 D 2 ... D n S T S T P A G E [ b o r M b D ia lin g o u tp u t: D ia lin g o u tp u t: D 1 M a : D 1 D 2 ... D n (a = b + 1 0 , M 1 0 = M 0 ) M a : D 1 D 2 ... D n (a = b + 1 0 , M 1 0 = M 0 ) R M : D 1 D 2 ... D n R M : D 1 D 2 ... D n S A M : U n c h a n g e d S T S A M : U n c h a n g e d T w o - to u c h m e m o r y s to r e w ith o u t d ia lin g o u tp u t (M 1 ~ M 1 0 ) K e y b o a r d in p u t: S T D 1 D 2 ... D n S T [ b o r M b ] K e y b o a r d in p u t: S T D 1 D 2 P A G E [ b D 2 D 2 ... D n ] D 2 ... D n S A M : U n c h a n g e d N o te : If th e d ia lin g n u m b e r e x c e e d s 3 2 d ig its , th e m e m o r y s to r e is in h ib ite d . H o w e v e r , if th e d ia lin g n u m b e r is n o t m o r e th a n 3 2 d ig its th e m e m o r y w ill s to r e a m a x . o f 1 6 d ig its . M a = M 1 ~ M 2 0 , M b = M 1 ~ M 1 0 , a = 1 ~ 2 0 , b = 1 ~ 9 , 0 18 July 21, 1999 HT9320 M e m o r y d ia lin g · O n e - to u c h m e m o r y d ia lin g ( M 1 ~ M 2 0 ) - M a c o n te n t: D 1 T h r e e - to u c h m e m o r y d ia lin g ( M 1 1 ~ M 2 0 ) - D 2 ... D n K e y b o a r d in p u t: M 1 1 c o n te n t: D 1 M a D ia lin g o u tp u t: D 1 K e y b o a r d in p u t: D 2 ... D n D ia lin g o u tp u t: D 1 P A G E [ M b o r M a : U n c h a n g e d (a = b + 1 0 , M 1 0 = M 0 ) R M : D 1 R M : D 1 D 2 ... D n b ] D 2 ... D n M a : U n c h a n g e d S A M : U n c h a n g e d - D 2 ... D n A D 2 ... D n S A M : U n c h a n g e d T w o - to u c h m e m o r y d ia lin g ( M 1 ~ M 1 0 ) M b c o n te n t: D 1 D 2 ... D n K e y b o a r d in p u t: A [ b D ia lin g o u tp u t: D 1 o r M b ] D 2 ... D n M b : U n c h a n g e d R M : D 1 D 2 ... D n S A M : U n c h a n g e d N o te : a = 1 ~ 2 0 , M a = M 1 ~ M 2 0 M b = M 1 ~ M 1 0 , b = 1 ~ 9 , 0 C h a in d ia lin g · M 1 c o n te n t: D 1 D 2 ... D n M 2 c o n te n t: D n + 1 ... D m K e y b o a r d in p u t: D 1 D 2 D ia lin g o u tp u t: D 1 D 2 D 3 D 3 [ M 1 D 1 o r A D 2 ... D n 1 ] [ M 2 o r A 2 ] D n + 1 ... D m M 1 /M 2 : U n c h a n g e d R M : D 1 D 2 D 3 D 1 D 2 ... D n D n + 1 ... D m S A M : U n c h a n g e d N o te : If th e d ia lin g n u m b e r e x c e e d s 3 2 d ig its , r e d ia lin g is in h ib ite d a n d P O = V D D · F la s h F la s h a s a d ig ita l k e y - ( a ) T h e in te r v e n ie n t k e y K e y b o a r d in p u t: F la s h a s a c o n tr o l k e y K e y b o a r d in p u t: D 1 D m D 2 ... D n D ia lin g o u tp u t: D 1 D 2 ... D n D m R M : D 1 D 2 ... D n T F F T D n + 1 F P ... D n + 1 ... D 1 D m D 2 ... D n D ia lin g o u tp u t: D 1 D 2 ... D n D m R M : D n + 1 ... D m T F F T D n + 1 F P ... D n + 1 ... S A M : U n c h a n g e d S A M : U n c h a n g e d ( b ) T h e fir s t k e y K e y b o a r d in p u t: D ia lin g o u tp u t: T F F T D 1 F P D 2 D 1 ... D n D 2 N o te : T F : b r e a k a fla s h tim e D n R M : U n c h a n g e d S A M : U n c h a n g e d 19 July 21, 1999 HT9320 · ID D lo c k o p e r a tio n b y th e k e y b o a r d ( 2 lo c k n u m b e r s , 3 d ig its /n u m b e r a t m a x im u m ) ( A 3 3 0 k W r e s is to r is c o n n e c te d b e tw e e n C 5 a n d R 1 ) P e r s o n a l/L o c k N o .1 /L o c k N o .2 in p u t o p e r a tio n ( a ) P e r s o n a l c o d e d o e s n 't e x is t S to re s P e rs o n a l C o d e : S T D 1 D 2 D 3 S T S to re s L o c k N o .1 : S T D 4 D 5 D 6 S T * 1 S to re s L o c k N o .2 : S T D 7 D 8 D 9 S T * 2 * 0 ( b ) P e r s o n a l c o d e e x is t C h a n g e s P e rs o n a l C o d e : S T D 1 D 2 D 3 S T # S T ( O ld p e r s o n a l c o d e ) D 1 D 2 D 3 S T # S T C h a n g e s L o c k N o .1 : S T (P e rs o n a l c o d e ) C h a n g e s L o c k N o .2 : S T D 1 D 2 D 3 S T # D 4 D 5 D 6 S T * 0 (N e w p e rs o n a l c o d e ) D 4 D 5 D 6 S T * 1 (L o c k N o .1 ) D 7 D 8 D 9 S T S T * 2 (P e rs o n a l c o d e ) (L o c k N o .2 ) C h a n g e s P e r s o n a l C o d e , L o c k N o .1 a n d L o c k N o .2 a t o n e tim e S T D 1 D 2 D 3 S T # S T D 4 D 5 D 6 S T ( O ld p e r s o n a l c o d e ) (N e w p e rs o n a l c o d e ) S T D 7 D 8 D 9 S T * 1 S T D 1 0 D 1 1 D 1 2 (L o c k N o .1 ) - - * 0 ( c o n tin u e d ) S T * 2 (L o c k N o .2 ) P e r s o n a l/L o c k N o .1 /L o c k N o .2 c a n c e l o p e r a tio n C a n c e ls P e r s o n a l c o d e : S T D 1 D 2 D 3 C a n c e ls L o c k N o .1 : S T D 1 D 2 D 3 S T # S T S T # # S T 1 C a n c e ls L o c k N o .2 : S T D 1 D 2 D 3 S T # S T # 2 # 0 T e m p o r a r y r e le a s e b o th o f th e lo c k n u m b e r s ( L o c k N o .1 , L o c k N o .2 ) : S T D 1 D 2 D 3 S T # D m D m + 1 D m + 2 D l ... D n (P e rs o n a l c o d e ) · N o te : D 1 ~ D 1 2 = 0 ~ 9 D m D m + 1 D m + 2 = 0 ~ 9 D l ... D n = 0 ~ 9 , * , # N o te : R M : R e d ia l m e m o r y S A M : S a v e d ia lin g m e m o r y D 1 D 2 ... D n : 0 ~ 9 D n + 1 ... D m : 0 ~ 9 , * , # D m + 1 ... D I: 0 ~ 9 , * , # D I+ 1 ... D K : 0 ~ 9 , * , # 20 July 21, 1999 HT9320 Timing Diagrams Normal dialing · Pulse mode H ig h Im p e d a n c e H K S K E Y IN D 1 D 2 T R T D B T D B D B X M U T E T T P D P -T ID P T M ID P -T M T T P D P T ID P M P O T T B T M M D T M F 1 .2 k H z c a r r ie r K T T T K T T K T T K T ID P -T M X 2 2 0 m s 2 0 m s · Tone mode H ig h Im p e d a n c e H K S K E Y IN D 1 R T D 2 T D B T D B D B X M U T E P O T IT P M T T IT P M IT P M D T M F T T M IN T IT P M K T X 2 2 0 m s 2 0 m s 21 July 21, 1999 HT9320 Dialing with Pause key · Pulse mode H ig h Im p e d a n c e H K S K E Y IN T D 1 D 2 T D B D 3 P T D B D B T P + T T D B P D P X M U T E T T P D P T ID P T ID P M P O D T M F T ID P -T M 1 .2 k H z c a r r ie r K T T T K T K T X 2 2 0 m s · Tone mode H ig h Im p e d a n c e H K S K E Y IN D 1 D 2 T P D 3 T D B P X M U T E P O T T M IN T T IT P M IT P M D T M F T IT P M K T X 2 2 0 m s 22 July 21, 1999 HT9320 Flash key operation H ig h Im p e d a n c e H K S K E Y IN F T D B X M U T E P O T T F F P D T M F 1 .2 k H z c a r r ie r K T T K T X 2 2 0 m s Pulse ® Tone operation H ig h Im p e d a n c e H K S K E Y IN T D 1 * /T D 2 T D B T D 3 D B D B T T ID P P ® T X M U T E T P D P T ID P + T P D P P O T T M IN T IT P M D T M F 1 .2 k H z c a r r ie r K T T K T X 2 2 0 m s 23 July 21, 1999 HT9320 One key redial operation H ig h Im p e d a n c e H K S K E Y IN D 1 T D 2 T D B T X M U T E R T D B T IT P M T D B IT P M IT P M T R P (1 s e c ) P O T (1 .2 s e c s ) B R K T IT P M D T M F K T X 2 2 0 m s CLOCK & DOUT operating H ig h Im p e d a n c e H K S K E Y IN D 1 X M U T E T T D B T P D P B T M P O T (3 4 m s ) K T 1 .2 k H z C a r r ie r K T C L O C K F D O U T C L O C K = 2 .4 k H z D a ta X 2 2 0 m s N o te : D 1 = D 3 = 3 D 2 = 2 24 July 21, 1999 HT9320 Application Circuits Application circuit 1 T ip R in g M 3 / M 1 3 M 2 / M 1 2 M 1 / M 1 1 M 9 / M 1 9 M 8 / M 1 8 M 7 / M 1 7 M 6 / M 1 6 1 A b r id g e A M 4 / M 1 4 P A G E S T M 1 0 / M 2 0 P 3 6 9 M 5 / M 1 5 S A 2 5 8 R F 1 4 7 # ig n a l a l d e rs a re e e n 1 0 s e R k 1 0 0 k W r th e d ia lin g s to th e fu n c tio n ifie d tr a n s is to c a p a c ito r b e tw 3 8 1 X X (H T 3 8 0 is fo e fe r s p e c 1 m F e H T * /T * R k (R * U n * A * T h R 1 R 2 R 3 R 4 ) 1 0 4 7 k W 2 2 M W 2 2 0 k W 3 3 k W H a n d fre e 2 1 P O 1 7 0 .1 m F T o n e 1 N 4 1 4 8 1 m F 1 6 V 2 2 k W 2 .2 k W H K S 8 M /B 9 3 3 /6 6 4 0 /6 0 H S T X M U T E H F O D T M F 1 0 0 k W 2 7 0 k W 2 2 0 k W 1 N 4 1 4 8 1 N 4 1 4 8 0 .1 m F 1 3 X 2 1 4 1 2 3 9 p F 3 .5 8 M H z re s o n a to r X 1 V D D 1 0 0 m F 2 2 k W 3 9 p F 2 0 p p s V D D 1 0 p p s 5 .1 V 1 N 4 1 4 8 x 4 3 3 0 k W 4 .7 k W H D I 0 .1 m F V D D H o ld H T 3 8 1 X X 1 0 0 k W 1 m F 2 2 0 k W 1 0 k W 1 6 H D O 1 1 M O D E H T 9 3 2 0 A 2 8 D IP C 5 C 4 C 3 C 2 C 1 V S S 2 6 2 5 2 4 2 3 2 2 1 5 H F I 1 0 0 k W 2 7 1 0 p F ty p e a n d V S S ( G N D ) is r e c o m m e n d e d v id e s a m e lo d y d u r in g th e h o ld p e r io d C 6 1 0 m F 5 0 V n tio n 0 5 0 T E p ro R 5 O n -h o o k O ff-h o o k A 9 2 A 4 2 3 .3 k W 7 6 5 4 3 0 .0 2 m F R k o p tio s c r ip o f 8 X M U r ie s ) 1 m F 1 N 4 1 4 8 4 7 k W 1 8 2 0 1 9 2 1 .5 k W O n -h o o k s to re O ff-h o o k s to re 1 5 0 W 1 m F 1 N 4 1 4 8 S P E E C H N E T W O R K 3 ~ 5 V July 21, 1999 25 HT9320 Application circuit 2 T ip R in g 1 A b r id g e M 6 / M 1 6 F M 1 / M 1 1 6 3 M 7 / M 1 7 P A G E M 2 / M 1 2 M 8 / M 1 8 P M 3 / M 1 3 M 9 / M 1 9 S A A M 4 / M 1 4 2 S T M 1 0 / M 2 0 1 9 M 5 / M 1 5 5 8 R 4 7 # ig n a l a l d e rs a re e e n 1 0 s e R k 1 0 0 k W r th e d ia lin g s to th e fu n c tio n ifie d tr a n s is to c a p a c ito r b e tw 3 8 1 X X (H T 3 8 0 is fo e fe r s p e c 1 m F e H T * /T * R k (R * U n * A * T h R 1 R 2 R 3 R 4 ) 1 0 4 7 k W 2 2 M W 2 2 0 k W 3 3 k W H a n d fre e 2 1 P O 1 7 2 .2 k W 1 0 0 k W 2 7 0 k W 2 2 0 k W 1 N 4 1 4 8 1 N 4 1 4 8 0 .1 m F 8 D T M F 9 C L O C K H K S H F O 1 3 X 2 1 m F 1 N 4 1 4 8 4 7 k W 1 N 4 1 4 8 1 8 2 0 2 1 9 4 7 k W 1 .5 k W H T 1 6 X X L C D D R IV E R (s e e H T 1 6 X X d a ta ) D O U T X M U T E 1 2 3 9 p F 3 .5 8 M H z re s o n a to r X 1 V D D 1 4 1 0 0 m F 2 2 k W 2 2 k W 1 m F 1 6 V 1 N 4 1 4 8 V D D 5 .1 V 1 N 4 1 4 8 x 4 3 3 0 k W 0 .1 m F 4 .7 k W H D I 0 .1 m F V D D H o ld H T 3 8 1 X X 1 0 0 k W 1 m F 2 2 0 k W 1 0 k W 1 6 H D O 1 1 M O D E 1 0 p p s 3 9 p F 2 0 p p s T o n e H T 9 3 2 0 B /L 2 8 D IP C 5 C 4 C 3 C 2 C 1 V S S 2 6 2 5 2 4 2 3 2 2 1 5 H F I 1 0 0 k W 2 7 1 0 p F ty p e a n d V S S ( G N D ) is r e c o m m e n d e d v id e s a m e lo d y d u r in g th e h o ld p e r io d C 6 1 0 m F 5 0 V n tio n 0 5 0 T E p ro R 5 O n -h o o k O ff-h o o k A 9 2 A 4 2 3 .3 k W 7 6 5 4 3 0 .0 2 m F R k o p tio s c r ip o f 8 X M U r ie s ) 1 5 0 W 1 m F S P E E C H N E T W O R K July 21, 1999 26 HT9320 Application circuit 3 P A G E T ip R in g 1 A b r id g e M 6 / M 1 6 P M 1 / M 1 1 M 7 / M 1 7 S A M 2 / M 1 2 F M 8 / M 1 8 3 M 3 / M 1 3 M 9 / M 1 9 2 A M 4 / M 1 4 1 S T 6 9 M 1 0 / M 2 0 5 8 M 5 / M 1 5 4 7 R ig n a l a l d e rs a re e e n R k 1 0 0 k W d ia lin g s e fu n c tio n tr a n s is to c ito r b e tw # r th e to th ifie d c a p a 0 is fo e fe r s p e c 1 m F * /T * R k (R * U n * A 6 5 4 3 2 tio r ip f 8 U P O 2 2 M W V D D 0 .1 m F 1 0 0 k W 2 .2 k W 1 N 4 1 4 8 5 .1 V 1 0 0 m F 7 H K S 1 N 4 1 4 8 0 .1 m F V D D 1 1 8 M O D E 2 2 0 k W 9 2 7 0 k W X 1 1 0 0 k W V D D 1 0 p p s 3 9 p F 2 0 p p s T o n e H T 9 3 2 0 C 2 2 S K D IP C 5 C 4 C 3 C 2 C 1 V S S 2 0 1 9 1 8 1 7 1 6 1 2 4 7 k W 2 1 1 5 O n -h o o k O ff-h o o k C 6 1 0 p F n tio n ) 0 5 0 ty p e T E a n d V S S ( G N D ) is r e c o m m e n d e d R 5 R 4 R 3 R 2 R 1 A 9 2 A 4 2 3 .3 k W R k o p s c o X M D T M F 1 3 1 m F 1 N 4 1 4 8 1 .5 k W 1 0 X 2 3 .5 8 M H z re s o n a to r 3 9 p F 1 4 1 5 0 W X M U T E 1 m F S P E E C H N E T W O R K July 21, 1999 27 HT9320 Application circuit 4 T ip P A G E A F P ® T M 4 / M 1 4 M 3 / M 1 3 M 2 / M 1 2 M 1 / M 1 1 M 9 / M 1 9 M 8 / M 1 8 M 7 / M 1 7 M 6 / M 1 6 R in g 3 S T 1 A b r id g e 2 5 6 9 M 1 0 / M 2 0 S A 1 4 8 M 5 / M 1 5 7 R /P ig n a l a l d e rs a re e e n 1 0 s e R k 1 0 0 k W r th e d ia lin g s to th e fu n c tio n ifie d tr a n s is to c a p a c ito r b e tw 3 8 1 X X (H T 3 8 # is fo e fe r s p e c 1 m F e H T 0 * * R k (R * U n * A * T h R 1 R 2 R 3 R 4 ) 1 0 4 7 k W 2 2 M W 2 2 0 k W 3 3 k W H a n d fre e 2 1 P O 1 7 4 .7 k W 2 .2 k W 8 H K S M /B 9 4 0 /6 0 3 3 /6 6 H S T X M U T E H F O D T M F 1 0 0 k W 2 7 0 k W 2 2 0 k W 1 N 4 1 4 8 1 N 4 1 4 8 0 .1 m F 1 3 X 2 1 4 1 2 3 9 p F 3 .5 8 M H z re s o n a to r X 1 V D D 1 0 0 m F 2 2 k W 2 2 k W 1 m F 1 6 V 1 N 4 1 4 8 3 9 p F 2 0 p p s T o n e 1 0 p p s V D D 5 .1 V 1 N 4 1 4 8 x 4 3 3 0 k W 0 .1 m F H D I 0 .1 m F V D D H o ld H T 3 8 1 X X 1 0 0 k W 1 m F 2 2 0 k W 1 0 k W 1 6 H D O 1 1 M O D E H T 9 3 2 0 H 2 8 D IP C 5 C 4 C 3 C 2 C 1 V S S 2 6 2 5 2 4 2 3 2 2 1 5 H F I 1 0 0 k W 2 7 1 0 p F ty p e a n d V S S ( G N D ) is r e c o m m e n d e d v id e s a m e lo d y d u r in g th e h o ld p e r io d C 6 1 0 m F 5 0 V n tio n 0 5 0 T E p ro R 5 H o o k o n H o o k o ff A 9 2 A 4 2 3 .3 k W 7 6 5 4 3 0 .0 2 m F R k o p tio s c r ip o f 8 X M U r ie s ) 1 m F 1 N 4 1 4 8 4 7 k W 1 8 1 9 2 0 2 1 .5 k W O n -h o o k s to re O ff-h o o k s to re 1 5 0 W 1 m F 1 N 4 1 4 8 S P E E C H N E T W O R K 3 ~ 5 V July 21, 1999 28 HT9320 Application circuit 5 S A 1 4 7 * /T P 2 5 8 0 P A G E 3 6 T ip R in g M 3 / M 1 3 M 2 / M 1 2 M 1 / M 1 1 M 9 / M 1 9 M 8 / M 1 8 M 7 / M 1 7 M 6 / M 1 6 1 A b r id g e A M 4 / M 1 4 F S T 9 r th e d ia lin g s to th e fu n c tio n ifie d tr a n s is to c a p a c ito r b e tw 3 8 1 X X (H T 3 8 M 1 0 / M 2 0 R is fo e fe r s p e c 1 m F e H T M 5 / M 1 5 # * R k (R * U n * A * T h 1 0 0 k W R k ig n a l a l d e rs a re e e n 1 0 s e R 1 R 2 R 3 R 4 R 5 n tio n 0 5 0 T E p ro 1 0 2 2 M W 2 2 0 k W 3 3 k W H a n d fre e 2 1 P O 1 0 0 k W 1 7 4 .7 k W 1 N 4 1 4 8 1 m F 1 6 V 2 2 k W 2 .2 k W H K S 8 K T X M U T E H F O D T M F 1 0 0 k W 2 7 0 k W 2 2 0 k W 1 N 4 1 4 8 1 N 4 1 4 8 0 .1 m F 1 3 X 2 1 4 1 2 3 9 p F 3 .5 8 M H z re s o n a to r X 1 V D D 1 0 0 m F 2 2 k W 3 9 p F 2 0 p p s T o n e 1 0 p p s V D D 5 .1 V 1 N 4 1 4 8 x 4 3 3 0 k W 0 .1 m F H D I 0 .1 m F V D D H o ld H T 3 8 1 X X 1 m F 2 2 0 k W 1 0 k W 1 6 H D O 1 1 M O D E H T 9 3 2 0 K 2 8 D IP C 5 C 4 C 3 C 2 C 1 V S S 2 6 2 5 2 4 2 3 2 2 1 5 H F I 1 0 0 k W 2 7 1 0 p F ty p e a n d V S S ( G N D ) is r e c o m m e n d e d v id e s a m e lo d y d u r in g th e h o ld p e r io d C 6 1 0 m F 5 0 V ) 4 7 k W O n -h o o k O ff-h o o k A 9 2 A 4 2 3 .3 k W 7 6 5 4 3 0 .0 2 m F R k o p tio s c r ip o f 8 X M U r ie s ) 1 m F 1 N 4 1 4 8 4 7 k W 1 8 2 0 1 9 2 1 m F 1 .5 k W B u z z e r 1 5 0 W S P E E C H N E T W O R K July 21, 1999 29 HT9320 Holtek Semiconductor Inc. (Headquarters) No.3 Creation Rd. II, Science-based Industrial Park, Hsinchu, Taiwan, R.O.C. Tel: 886-3-563-1999 Fax: 886-3-563-1189 Holtek Semiconductor Inc. (Taipei Office) 5F, No.576, Sec.7 Chung Hsiao E. Rd., Taipei, Taiwan, R.O.C. Tel: 886-2-2782-9635 Fax: 886-2-2782-9636 Fax: 886-2-2782-7128 (International sales hotline) Holtek Microelectronics Enterprises Ltd. RM.711, Tower 2, Cheung Sha Wan Plaza, 833 Cheung Sha Wan Rd., Kowloon, Hong Kong Tel: 852-2-745-8288 Fax: 852-2-742-8657 Copyright ã 1999 by HOLTEK SEMICONDUCTOR INC. The information appearing in this Data Sheet is believed to be accurate at the time of publication. However, Holtek assumes no responsibility arising from the use of the specifications described. The applications mentioned herein are used solely for the purpose of illustration and Holtek makes no warranty or representation that such applications will be suitable without further modification, nor recommends the use of its products for application that may present a risk to human life due to malfunction or otherwise. Holtek reserves the right to alter its products without prior notification. For the most up-to-date information, please visit our web site at http://www.holtek.com.tw. 30 July 21, 1999