TI SN74HC623DW

SN54HC623, SN74HC623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS149B – DECEMBER 1982 – REVISED MAY 1997
D
Lock Bus-Latch Capability
True Logic
High-Current 3-State Outputs Can Drive up
to 15 LSTTL Loads
Package Options Include Plastic
Small-Outline (DW) and Ceramic Flat (W)
Packages, Ceramic Chip Carriers (FK), and
Standard Plastic (N) and Ceramic (J)
300-mil DIPs
SN54HC623 . . . J OR W PACKAGE
SN74HC623 . . . DW OR N PACKAGE
(TOP VIEW)
OEAB
A1
A2
A3
A4
A5
A6
A7
A8
GND
description
These octal bus transceivers are designed for
asynchronous two-way communication between
data buses. The control-function implementation
allows for maximum flexibility in timing.
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
OEBA
B1
B2
B3
B4
B5
B6
B7
B8
SN54HC623 . . . FK PACKAGE
(TOP VIEW)
A2
A1
OEAB
VCC
The ’HC623 allow data transmission from the
A bus to the B bus or from the B bus to the A bus,
depending upon the logic levels at the
output-enable (OEAB and OEBA) inputs.
A3
A4
A5
A6
A7
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
B1
B2
B3
B4
B5
A8
GND
B8
B7
B6
OEAB and OEBA disable the device so that the
buses are effectively isolated. The dual-enable
configuration gives the transceivers the capability
to store data by simultaneously enabling OEAB
and OEBA. Each output reinforces its input in this
transceiver configuration. When both OEAB and
OEBA are enabled and all other data sources to
the two sets of bus lines are in the high-impedance
state, both sets of bus lines (16 total) remain at
their last states. The 8-bit codes appearing on the
two sets of buses are identical.
OEBA
D
D
D
The SN54HC623 is characterized for operation over the full military temperature range of –55°C to 125°C. The
SN74HC623 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OPERATION
OEBA
OEAB
L
L
B data to A bus
H
H
A data to B bus
H
L
Isolation
H
B data to A bus,
A data to B bus
L
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright  1997, Texas Instruments Incorporated
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
POST OFFICE BOX 655303
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1
SN54HC623, SN74HC623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS149B – DECEMBER 1982 – REVISED MAY 1997
logic symbol†
19
OEBA
1
OEAB
2
A1
EN1
EN2
2
3
A2
A3
A4
A5
A6
A7
A8
18
1
17
4
16
5
15
6
14
7
13
8
12
9
11
B1
B2
B3
B4
B5
B6
B7
B8
† This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
logic diagram (positive logic)
OEBA
OEAB
A1
19
1
2
18
B1
To Seven Other Transceivers
absolute maximum ratings over operating free-air temperature range‡
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input clamp current, IIK (VI < 0 or VI > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Output clamp current, IOK (VO < 0 or VO > VCC) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA
Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±35 mA
Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±70 mA
Package thermal impedance, θJA (see Note 2): DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97°C/W
N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. The package thermal impedance is calculated in accordance with JESD 51, except for through-hole packages, which use a trace
length of zero.
2
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SN54HC623, SN74HC623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS149B – DECEMBER 1982 – REVISED MAY 1997
recommended operating conditions
SN54HC623
VCC
VIH
Supply voltage
VCC = 2 V
VCC = 4.5 V
High-level input voltage
VCC = 6 V
VCC = 2 V
VIL
VI
VO
Low-level input voltage
Input voltage
Output voltage
Input transition (rise and fall) time
TA
Operating free-air temperature
NOM
MAX
2
5
6
VCC = 2 V
VCC = 4.5 V
VCC = 6 V
MIN
NOM
MAX
2
5
6
1.5
1.5
3.15
3.15
4.2
VCC = 4.5 V
VCC = 6 V
tt
SN74HC623
MIN
UNIT
V
V
4.2
0
0.5
0
0.5
0
1.35
0
1.35
0
1.8
0
1.8
0
0
0
VCC
VCC
0
VCC
VCC
0
1000
0
1000
0
500
0
500
0
400
0
400
–55
125
–40
85
V
V
V
ns
°C
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VOH
TEST CONDITIONS
IOZ
ICC
Ci
A or B
SN54HC623
MIN
MAX
SN74HC623
MIN
MAX
UNIT
2V
1.9
1.998
1.9
1.9
4.4
4.499
4.4
4.4
6V
5.9
5.999
5.9
5.9
IOH = –6 mA
IOH = –7.8 mA
4.5 V
3.98
4.3
3.7
3.84
6V
5.48
5.8
5.2
5.34
2V
0.002
0.1
0.1
0.1
IOL = 20 µA
4.5 V
0.001
0.1
0.1
0.1
6V
0.001
0.1
0.1
0.1
4.5 V
0.17
0.26
0.4
0.33
6V
0.15
0.26
0.4
0.33
VI = VCC or 0
6V
±0.1
±100
±1000
±1000
nA
VO = VCC or 0
VI = VCC or 0,
6V
±0.01
±0.5
±10
±5
µA
8
160
80
µA
10
10
10
pF
IOL = 6 mA
IOL = 7.8 mA
II
TA = 25°C
TYP
MAX
4.5 V
VI = VIH or VIL
OEAB or
OEBA
MIN
IOH = –20 µA
VI = VIH or VIL
VOL
VCC
IO = 0
OEAB or
OEBA
6V
2 V to 6 V
3
V
V
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
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SN54HC623, SN74HC623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS149B – DECEMBER 1982 – REVISED MAY 1997
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A or B
ten
B or A
OEBA
tdis
ten
A
OEBA
A
OEAB
tdis
B
OEAB
B
tt
A or B
VCC
MIN
TA = 25°C
TYP
MAX
SN54HC623
MIN
MAX
SN74HC623
MIN
MAX
2V
29
105
160
130
4.5 V
10
21
32
26
6V
8
18
27
22
2V
112
210
315
265
4.5 V
27
42
63
53
6V
20
36
54
45
2V
40
150
225
190
4.5 V
18
30
45
38
6V
16
26
38
32
2V
112
210
315
265
4.5 V
27
42
63
53
6V
20
36
54
45
2V
40
150
225
190
4.5 V
18
30
45
38
6V
16
26
38
32
2V
20
60
90
75
4.5 V
8
12
18
15
6V
6
10
15
13
UNIT
ns
ns
ns
ns
ns
ns
switching characteristics over recommended operating free-air temperature range, CL = 150 pF
(unless otherwise noted) (see Figure 1)
PARAMETER
tpd
FROM
(INPUT)
TO
(OUTPUT)
A or B
B or A
OEBA
A
ten
OEAB
B
tt
A or B
VCC
TA = 25°C
MIN
TYP
MAX
SN54HC623
MIN
MAX
SN74HC623
MIN
MAX
2V
44
135
200
170
4.5 V
14
27
40
34
6V
11
23
34
29
2V
130
270
405
335
4.5 V
31
54
81
67
6V
23
46
69
56
2V
130
270
405
335
4.5 V
31
54
81
67
6V
23
46
69
56
2V
45
210
315
265
4.5 V
17
42
63
53
6V
13
36
53
45
UNIT
ns
ns
ns
ns
operating characteristics, TA = 25°C
PARAMETER
Cpd
TEST CONDITIONS
Power dissipation capacitance per transceiver
No load
PRODUCT PREVIEW information concerns products in the formative or
design phase of development. Characteristic data and other
specifications are design goals. Texas Instruments reserves the right to
change or discontinue these products without notice.
4
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TYP
40
UNIT
pF
SN54HC623, SN74HC623
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCLS149B – DECEMBER 1982 – REVISED MAY 1997
PARAMETER MEASUREMENT INFORMATION
VCC
From Output
Under Test
CL
(see Note A)
Test
Point
PARAMETER
S1
ten
RL
tdis
S2
tPZH
RL
1 kΩ
tPZL
tPHZ
1 kΩ
––
LOAD CIRCUIT
90%
50%
10%
S1
S2
50 pF
or
150 pF
Open
Closed
Closed
Open
Open
Closed
Closed
Open
Open
Open
50 pF
tPLZ
tpd or tt
Input
CL
50 pF
or
150 pF
VCC
50%
10% 0 V
90%
tr
tf
VOLTAGE WAVEFORM
INPUT RISE AND FALL TIMES
VCC
Input
50%
50%
0V
tPLH
In-Phase
Output
50%
10%
tPHL
90%
90%
tr
tPHL
Out-ofPhase
Output
90%
tf
50%
10%
VCC
50%
50%
0V
tPZL
VOH
50%
10% V
OL
tf
Output
Waveform 1
(See Note B)
tPLZ
≈ VCC
≈ VCC
50%
10%
VOL
tPZH
tPLH
50%
10%
Output
Control
(Low-Level
Enabling)
90%
VOH
VOL
Output
Waveform 2
(See Note B)
tr
VOLTAGE WAVEFORMS
PROPAGATION DELAY AND OUTPUT TRANSITION TIMES
50%
90%
VOH
≈0V
tPHZ
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES FOR 3-STATE OUTPUTS
NOTES: A. CL includes probe and test-fixture capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. Phase relationships between waveforms were chosen arbitrarily. All input pulses are supplied by generators having the following
characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr = 6 ns, tf = 6 ns.
D. The outputs are measured one at a time with one input transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
Figure 1. Load Circuit and Voltage Waveforms
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Copyright  1998, Texas Instruments Incorporated