SN54ACT245, SN74ACT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS452D – SEPTEMBER 1994 – REVISED JANUARY 2000 D SN54ACT245 . . . J OR W PACKAGE SN74ACT245 . . . DB, DW, N, OR PW PACKAGE (TOP VIEW) Inputs Are TTL-Voltage Compatible EPIC (Enhanced-Performance Implanted CMOS) 1-mm Process Package Options Include Plastic Small-Outline (DW) Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK) and Flatpacks (W), and Standard Plastic (N) and Ceramic (J) DIPs DIR A1 A2 A3 A4 A5 A6 A7 A8 GND description These octal bus transceivers are designed for asynchronous two-way communication between data buses. The control-function implementation minimizes external timing requirements. 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE B1 B2 B3 B4 B5 B6 B7 B8 SN54ACT245 . . . FK PACKAGE (TOP VIEW) A2 A1 DIR VCC When the output-enable (OE) is low, the device passes noninverted data from the A bus to the B bus or from the B bus to the A bus, depending upon the logic level at the direction-control (DIR) input. A high on OE disables the device so that the buses are effectively isolated. A3 A4 A5 A6 A7 4 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 B1 B2 B3 B4 B5 A8 GND B8 B7 B6 The SN54ACT245 is characterized for operation over the full military temperature range of –55°C to 125°C. The SN74ACT245 is characterized for operation from –40°C to 85°C. 3 OE D D FUNCTION TABLE (each transceiver) INPUTS OPERATION OE DIR L L B data to A bus L H A data to B bus H X Isolation Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. EPIC is a trademark of Texas Instruments Incorporated. Copyright 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54ACT245, SN74ACT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS452D – SEPTEMBER 1994 – REVISED JANUARY 2000 logic symbol† OE DIR A1 19 1 2 logic diagram (positive logic) G3 DIR 3EN1[BA] 3EN2[AB] 19 18 1 B1 2 A2 A3 A4 A5 A6 A7 A8 1 3 17 4 16 5 15 6 14 7 13 8 12 9 11 A1 OE 2 B2 18 B3 B1 B4 B5 B6 To Seven Other Channels B7 B8 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0 or VI > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Output clamp current, IOK (VO < 0 or VO > VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous output current, IO (VO = 0 to VCC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±50 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±200 mA Package thermal impedance, θJA (see Note 2): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W N package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 69°C/W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54ACT245, SN74ACT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS452D – SEPTEMBER 1994 – REVISED JANUARY 2000 recommended operating conditions (see Note 3) SN54ACT245 MAX MIN MAX 4.5 5.5 4.5 5.5 VCC VIH Supply voltage VIL VI Low-level input voltage Input voltage 0 VO IOH Output voltage 0 High-level output current IOL Dt/Dv Low-level output current High-level input voltage SN74ACT245 MIN 2 2 0.8 Input transition rise or fall rate 0 UNIT V V 0.8 V VCC VCC V –24 –24 mA 24 24 mA 8 ns/V VCC VCC 8 0 0 0 V TA Operating free-air temperature –55 125 –40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report Implications of Slow or Floating CMOS Inputs, literature number SCBA004. electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS 4.5 V IOH = – 50 mA VOH IOH = – 24 mA VOL IOZ II ICC DICC§ Ci Cio OE or DIR MIN TA = 25°C TYP MAX SN54ACT245 MIN MAX SN74ACT245 MIN 4.4 4.49 4.4 5.5 V 5.4 5.49 5.4 5.4 4.5 V 3.88 3.7 3.76 5.5 V 4.86 4.7 4.76 MAX UNIT 4.4 V IOH = –50 mA† IOH = –75 mA† 5.5 V IOL = 50 mA 4.5 V 0.001 0.1 0.1 5.5 V 0.001 0.1 0.1 0.1 4.5 V 0.36 0.5 0.44 5.5 V 0.36 0.5 0.44 3.85 5.5 V IOL = 24 mA A or B ports‡ VCC 3.85 0.1 V IOL = 50 mA† IOL = 75 mA† 5.5 V VO = VCC or GND VI = VCC or GND 5.5 V ±0.5 ±10 ±5 5.5 V ±0.1 ±1 ±1 VI = VCC or GND, IO = 0 One input at 3.4 V, Other inputs at GND or VCC 5.5 V 4 80 40 mA mA mA 1.6 1.5 mA VI = VCC or GND VO = VCC or GND 1.65 5.5 V 1.65 5.5 V 0.6 5V 4.5 pF 5V 15 pF † Not more than one output should be tested at a time, and the duration of the test should not exceed 2 ms. ‡ For I/O ports, the parameter IOZ includes the input leakage current. § This is the increase in supply current for each input that is at one of the specified TTL voltage levels rather than 0 V or VCC. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54ACT245, SN74ACT245 OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS452D – SEPTEMBER 1994 – REVISED JANUARY 2000 switching characteristics over recommended operating free-air temperature range, VCC = 5 V ± 0.5 V (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) tPLH tPHL A or B B or A tPZH tPZL OE A or B tPHZ tPLZ OE A or B MIN TA = 25°C TYP MAX SN54ACT245 MIN SN74ACT245 MAX MIN MAX 1 4 7.5 1 9 1.5 8 1 4 8 1 10 1 9 1 5 10 1 12 1.5 11 1 5.5 10 1 13 1.5 12 1 5.5 10 1 12 1 11 1 5 10 1 12 1.5 11 UNIT ns ns ns operating characteristics, VCC = 5 V, TA = 25°C PARAMETER Cpd TEST CONDITIONS Power dissipation capacitance CL = 50 pF, TYP f = 1 MHz UNIT 45 pF PARAMETER MEASUREMENT INFORMATION 2 × VCC 500 Ω From Output Under Test CL = 50 pF (see Note A) S1 Open 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 2 × VCC Open Output Control (low-level enabling) LOAD CIRCUIT 3V 1.5 V 1.5 V 0V tPLZ tPZL 3V Input 1.5 V 1.5 V 0V tPLH Output Output Waveform 1 S1 at 2 × VCC (see Note B) tPHL VOH 50% VCC VOL 50% VCC ≈VCC 50% VCC VOL tPHZ tPZH Output Waveform 2 S1 at Open (see Note B) VOL + 0.3 V 50% VCC VOH – 0.3 V VOH ≈0 V VOLTAGE WAVEFORMS VOLTAGE WAVEFORMS NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. D. The outputs are measured one at a time with one input transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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