HY62UF16201A Series 128Kx16bit full CMOS SRAM Document Title 128K x16 bit 3.0V Super Low Power Full CMOS Slow SRAM Revision History Revision No 05 06 07 08 History Draft Date Remark Divide output load into two factors Dec.10. 2000 Final - tCLZ,tOLZ,tBLZ,tCHZ,tOHZ,tBHZ,tWHZ,tOW - Others Add the marking information Correct the PKG dimension(E1) Aug. 01. 2001 Add the dimension and the marking information of the 6x8 PKG size Separate the part number(HY62UF16201AF1) for the 6x8 PKG Aug. 31. 2001 size from the 7x8 PKG size(HY62UF16201AF) Change AC Characteristic Mar. 24. 2002 - tBLZ This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev.08 / Mar. 2002 Hynix Semiconductor HY62UF16201A Series DESCRIPTION FEATURES The HY62UF16201A is a high speed, super low power and 2Mbit full CMOS SRAM organized as 131,072 words by 16bits. The HY62UF16201A uses high performance full CMOS process technology and is designed for high speed and low power circuit technology. It is particularly wellsuited for the high density low power system application. This device has a data retention mode that guarantees data to remain valid at a minimum power supply voltage of 1.2V. • Fully static operation and Tri-state output • TTL compatible inputs and outputs • Battery backup(LL/SL-part) -. 1.2V(min) data retention • Standard pin configuration -. 48-FBGA Product Voltage Speed No. (V) (ns) HY62UF16201A 2.7~3.3 55/70/85/100 HY62UF16201A-I 2.7~3.3 55/70/85/100 Notes : 1. Blank : Commercial, I : Industrial 2. Current value is max. Operation Current/Icc(mA) 3 3 PIN CONNECTION /LB NC /CS IO1 IO10 IO11 A5 A6 IO2 IO3 Vss IO12 NC A7 IO4 Vcc Vcc IO13 NC A16 IO5 Vss ROW DECODER IO15 IO14 A14 A15 IO6 IO7 IO16 NC A12 A13 /WE IO8 NC A9 A8 MEMORY ARRAY 128K x 16 A16 I/O1 DATA I/O BUFFER A4 WRITE DRIVER IO9 /UB A3 A0 SENSE AMP A2 COLUMNDECODER A1 Temperature (°C) 0~70 -40~85(I) BLOCK DIAGRAM ADD INPUT BUFFER /OE A0 Standby Current(uA) LL SL 10 2 10 2 I/O16 A10 A11 NC /CS /OE /LB /UB /WE CONTROL LOGIC 48-FBGA(Top View) PIN DESCRIPTION Pin Name /CS /WE /OE /LB /UB Pin Function Chip Select Write Enable Output Enable Lower Byte Control(I/O1~I/O8) Upper Byte Control(I/O9~I/O16) Rev.08 / Mar. 2002 Pin Name I/O1~I/O16 A0~A16 Vcc Vss NC Pin Function Data Inputs / Outputs Address Inputs Power(2.7V~3.3V) Ground No Connection 2 HY62UF16201A Series ORDERING INFORMATION Part No. HY62UF16201ALLF HY62UF16201ALLF-I HY62UF16201ASLF HY62UF16201ASLF-I HY62UF16201ALLF1 HY62UF16201ALLF1-I HY62UF16201ASLF1 HY62UF16201ASLF1-I Speed 55/70/85/100 55/70/85/100 55/70/85/100 55/70/85/100 55/70/85/100 55/70/85/100 55/70/85/100 55/70/85/100 Power LL-part LL-part SL-part SL-part LL-part LL-part SL-part SL-part Temp. I I I I Package FBGA(7mm X 8mm) FBGA(7mm X 8mm) FBGA(7mm X 8mm) FBGA(7mm X 8mm) FBGA(6mm X 8mm) FBGA(6mm X 8mm) FBGA(6mm X 8mm) FBGA(6mm X 8mm) Note : 1. Blank : Commercial, I : Industrial ABSOLUTE MAXIMUM RATINGS (1) Symbol VIN, VOUT Vcc TA Parameter Input/Output Voltage Power Supply Operating Temperature Rating -0.2 to 3.6 -0.2 to 4.6 0 to 70 -40 to 85 -55 to 150 1.0 260 • 10 Unit V V °C °C °C W °C•sec Remark HY62UF16201A HY62UF16201A-I TSTG Storage Temperature PD Power Dissipation TSOLDER Ball Soldering Temperature & Time Note 1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause permanent damage to the device. This is stress rating only and the functional operation of the device under these or any other conditions above those indicated in the operation of this specification is not implied. Exposure to the absolute maximum rating conditions for extended period may affect reliability. TRUTH TABLE /CS /WE /OE /LB /UB Mode H X L L L X X H H H X X H H L L X X H X L H L L H L L Deselected Deselected Output Disabled Output Disabled Read L X H L X L H L L H L Write I/O1~I/O8 High-Z High-Z High-Z High-Z DOUT High-Z DOUT DIN High-Z DIN I/O I/O9~I/O16 High-Z High-Z High-Z High-Z High-Z DOUT DOUT High-Z DIN DIN Power Standby Standby Active Active Active Active Note : 1. H=VIH, L=VIL, X=don't care 2. UB, LB(Upper, Lower Byte enable) These active LOW inputs allow individual bytes to be written or read. When LB is LOW, data is written or read to the lower byte, I/O 1 -I/O 8. When UB is LOW, data is written or read to the upper byte, I/O 9 -I/O 16. Rev.08 / Mar. 2002 2 HY62UF16201A Series RECOMMENDED DC OPERATING CONDITION Symbol Parameter Min. Vcc Supply Voltage 2.7 Vss Ground 0 VIH Input High Voltage 2.2 VIL Input Low Voltage -0.3(1) Note : 1. VIL = -1.5V for pulse width less than 30ns Typ. 3.0 0 - Max. 3.3 0 Vcc+0.3 0.6 Unit V V V V DC ELECTRICAL CHARACTERISTICS TA = 0°C to 70°C/ -40°C to 85°C (I) Symbol Parameter ILI Input Leakage Current ILO Output Leakage Current Icc ICC1 ISB Operating Power Supply Current Average Operating Current Standby Current (TTL Input) ISB1 Standby Current (CMOS Input) Test Condition Vss < VIN < Vcc Vss < VOUT < Vcc, /CS = VIH or /OE = VIH or /WE = VIL, /UB = /LB = VIH /CS = VIL, VIN = VIH or VIL, II/O = 0mA Cycle Time=Min.100% duty, /CS = VIL,VIN = VIH or VIL, II/O = 0mA Cycle time = 1us, /CS < 0.2V, VIN<0.2V, II/O = 0mA /CS = VIH or /UB & /LB = VIH, VIN = VIH or VIL /CS > Vcc - 0.2V or SL /UB = /LB > Vcc - 0.2V, VIN > Vcc - 0.2V or LL VIN < Vss + 0.2V IOL = 2.1mA IOH = -1.0mA VOL Output Low Voltage VOH Output High Voltage Notes : 1. Typical values are at Vcc = 3.0V, TA = 25°C 2. Typical values are sampled and not 100% tested Min. -1 -1 Typ. - Max. 1 1 Unit uA uA - - 3 mA - - 45 mA 5 mA - - 0.3 mA - - 2 uA - 0.5 10 uA 2.4 - 0.4 - V V CAPACITANCE (Temp = 25°C, f= 1.0MHz) Symbol Parameter Condition CIN Input Capacitance(Add, /CS, /WE, /OE) VIN = 0V COUT Output Capacitance(I/O) VI/O = 0V Note : 1. These parameters are sampled and not 100% tested Rev.08 / Mar. 2002 Max. 8 10 Unit pF pF 3 HY62UF16201A Series AC CHARACTERISTICS TA=0°C to 70°C/ -40°C to 85°C (I),unless otherwise specified -55 # Symbol Parameter Min Max 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 READ CYCLE tRC Read Cycle Time tAA Address Access Time tACS Chip Select Access Time tOE Output Enable to Output Valid tBA /LB, /UB Access Time tCLZ Chip Select to Output in Low Z tOLZ Output Enable to Output in Low Z tBLZ /LB, /UB Enable to Output in Low Z tCHZ Chip Deselection to Output in High Z tOHZ Out Disable to Output in High Z tBHZ /LB, /UB Disable to Output in High Z tOH Output Hold from Address Change WRITE CYCLE tWC Write Cycle Time tCW Chip Selection to End of Write tAW Address Valid to End of Write tBW /LB, /UB Valid to End of Write tAS Address Set-up Time tWP Write Pulse Width tWR Write Recovery Time tWHZ Write to Output in High Z tDW Data to Write Time Overlap tDH Data Hold from Write Time tOW Output Active from End of Write -70 -85 -10 Min Max Min Max Min Max Unit 55 10 5 10 0 0 0 10 55 55 30 55 30 30 30 - 70 10 5 10 0 0 0 10 70 70 35 70 30 30 30 - 85 10 5 10 0 0 0 10 85 85 40 85 30 30 30 - 100 20 5 20 0 0 0 15 100 100 50 100 30 30 30 - ns ns ns ns ns ns ns ns ns ns ns ns 55 50 50 50 0 45 0 0 25 0 5 20 - 70 60 60 60 0 50 0 0 30 0 5 25 - 85 70 70 70 0 55 0 0 35 0 5 30 - 100 80 80 80 0 75 0 0 45 0 10 35 - ns ns ns ns ns ns ns ns ns ns ns AC TEST CONDITIONS TA = 0°C to 70°C/ -40°C to 85°C (I),unless otherwise specified Parameter Input Pulse Level Input Rise and Fall Time Input and Output Timing Reference Level Output Load tCLZ,tOLZ,tBLZ,tCHZ,tOHZ,tBHZ,tWHZ,tOW Others Value 0.4V to 2.2V 5ns 1.5V CL = 5pF + 1TTL Load CL = 30pF + 1TTL Load AC TEST LOADS VTM = 2.8V 1029 Ohm D OUT CL(1) 1728 Ohm Note : 1. Including jig and scope capacitance Rev.08 / Mar. 2002 4 HY62UF16201A Series TIMING DIAGRAM READ CYCLE 1(Note 1,4) tRC ADDR tAA tOH tACS /CS tCHZ(3) tBA /UB ,/ LB Data Out tBHZ(3) tOE /OE tOLZ(3) tBLZ(3) tCLZ(3) High-Z tOHZ(3) Data Valid READ CYCLE 2(Note 2,3,4) tRC ADDR tAA tOH tOH Data Out Previous Data Data Valid READ CYCLE 3(Note 1,2,4) /CS /UB, /LB tACS tCLZ(3) Data Out tCHZ(3) Data Valid Notes: A read occurs during the overlap of a low /OE, a high /WE, a low /CS1 and low /UB and/or /LB. 2. /OE = VIL 3. Transition is measured + 200mV from steady state voltage. This parameter is sampled and not 100% tested. 4. /CS in high for the standby, low for active /UB and /LB in high for the standby, low for active Rev.08 / Mar. 2002 5 HY62UF16201A Series WRITE CYCLE 1 (1,4,8) (/WE Controlled) tWC ADDR tWR(2) tCW /CS tAW tBW /UB,/LB tWP /WE tAS Data In tDW High-Z tDH Data Valid tWHZ(3,7) tOW (5) (6) Data Out WRITE CYCLE 2 (1,4,8) (/CS Controlled) tWC ADDR tCW tAS tWR(2) /CS tAW tBW /UB,/LB tWP /WE tDW Data In Data Out High-Z tDH Data Valid High-Z Notes: 1. A write occurs during the overlap of a low /WE, a low /CS1 and low /UB and/or /LB. 2. tWR is measured from the earlier of /CS, /LB, /UB, or /WE going high to the end of write cycle. 3. During this period, I/O pins are in the output state so that the input signals of opposite phase to the output must not be applied. 4. If the /CS, /LB and /UB low transition occur simultaneously with the /WE low transition or after the /WE transition, outputs remain in a high impedance state. 5. Q(data out) is the same phase with the write data of this write cycle. 6. Q(data out) is the read data of the next address. 7. Transition is measured +200mV from steady state. This parameter is sampled and not 100% tested. 8. /CS in high for the standby, low for active /UB and /LB in high for the standby, low for active Rev.08 / Mar. 2002 6 HY62UF16201A Series DATA RETENTION ELECTRIC CHARACTERISTIC TA=0°C to 70°C/ -40°C to 85°C (I),unless otherwise specified Symbol Parameter Test Condition VDR Vcc for Data Retention /CS > Vcc - 0.2V or /UB = /LB > Vcc-0.2V, VIN > Vcc - 0.2V or VIN < Vss + 0.2V ICCDR Data Retention Current Vcc=1.5V, /CS > Vcc - 0.2V or LL /UB = /LB > Vcc-0.2V, VIN > Vcc - 0.2V or SL VIN < Vss + 0.2V tCDR Chip Deselect to Data See Data Retention Timing Diagram Retention Time tR Operating Recovery Time Notes: 1. Typical values are under the condition of TA = 25°C. 2. Typical Values are sampled and not 100% tested 3. tRC is read cycle time. Min. 1.2 Typ. - Max. 3.3 Unit V - - 10 uA - - 2 uA 0 - - ns tRC(3) - - ns DATA RETENTION TIMING DIAGRAM DATA RETENTION MODE VCC 2.7V tCDR tR VDR CS or /UB &/LB CS > VCC-0.2V or /UB = /LB > Vcc – 0.2V VSS Rev.08 / Mar. 2002 7 HY62UF16201A Series PACKAGE INFORMATION 48ball Fine Pitch Ball Grid Array Package(F) BOTTOM VIEW TOP VIEW B A A1 CORNER INDEX AREA 6 5 4 3 2 B1/2 1 A A B C D C C1 E F G C1/2 C1/2 H B1/2 B1 SIDE VIEW 5 E1 E2 C E SEATING PLANE A 4 r 3 D(DIAMETER) Symbol A B B1 C C1 D E E1 E2 r [ HY62UF16201AF ] Min. Typ. 0.75 3.75 6.90 7.00 5.25 7.90 8.00 0.3 0.35 0.75 0.80 0.17 - Max. 7.10 8.10 0.4 1.10 0.85 0.12 Min. 5.90 7.90 0.3 0.2 - [ HY62UF16201AF1 ] Typ. Max. 0.75 3.75 6.00 6.10 5.25 8.00 8.10 0.35 0.4 1.0 1.10 0.75 0.25 0.3 0.08 Note 1. DIMENSIONING AND TOLERANCING PER ASME Y14. 5M-1994. 2. ALL DIMENSIONS ARE MILLIMETERS. 3. DIMENSION “D” IS MEASURED AT THE MAXIMUM SOLDER BALL DIAMETER IN A PLANE PARALLEL TO DATUM C. 4. PRIMARY DATUM C(SEATING PLANE) IS DEFINED BY THE CROWN OF THE SOLDER BALLS. 5. THIS IS A CONTROLLING DIMENSION. Rev.08 / Mar. 2002 8 HY62UF16201A Series MARKING INSTRUCTION [ HY62UF16201AF ] Package FBGA Marking Example H Y U s s t x x x F 6 2 1 A c y y w w p K O R (7mm x 8mm) x x Index • HYUF621Ac c • ss : Part Name : Power Consumption -L -S : Low Low Power : Super Low Power : Speed - 55 - 70 - 85 - 10 : 55ns : 70ns : 85ns : 100ns • t : Temperature -C -I • yy : Year (ex : 00 = year 2000, 01= year 2001) • ww : Work Week ( ex : 12 = work week 12 ) • p : Process Code • xxxxx : Lot No. • KOR : Origin Country Note - Capital Letter - Small Letter : Fixed Item : Non-fixed Item Rev.08 / Mar. 2002 : Industrial ( -0 ~ 70 °C ) : Industrial ( -40 ~ 85 °C ) : A(7.0mm X 8.0mm) 9 HY62UF16201A Series [ HY62UF16201AF1 ] Package FBGA Marking Example H Y U s s t x x x F 6 2 1 A c y y w w p K O R (6mm x 8mm) x x Index • HYUF621Ac c • ss : Part Name : Power Consumption -L -S : Low Low Power : Super Low Power : Speed - 55 - 70 - 85 - 10 : 55ns : 70ns : 85ns : 100ns • t : Temperature -C -I • yy : Year (ex : 01 = year 2001, 02= year 2002) • ww : Work Week ( ex : 12 = work week 12 ) • p : Process Code • xxxxx : Lot No. • KOR : Origin Country Note - Capital Letter - Small Letter : Fixed Item : Non-fixed Item Rev.08 / Mar. 2002 : Industrial ( -0 ~ 70 °C ) : Industrial ( -40 ~ 85 °C ) : B(6.0mm X 8.0mm) 10