SCBS707E − SEPTEMBER 1997 − REVISED OCTOBER 2003
D Support Mixed-Mode Signal Operation (5-V
D
D
D
D
D
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
1
20
2
19
3
18
4
17
5
16
6
15
7
14
8
13
9
12
10
11
VCC
OE
B1
B2
B3
B4
B5
B6
B7
B8
SN54LVTH2245 . . . FK PACKAGE
(TOP VIEW)
A3
A4
A5
A6
A7
description/ordering information
4
3 2 1 20 19
18
5
17
6
16
7
15
8
14
9 10 11 12 13
B1
B2
B3
B4
B5
A8
GND
B8
B7
B6
These octal bus transceivers are designed
specifically for low-voltage (3.3-V) VCC operation,
but with the capability to provide a TTL interface
to a 5-V system environment.
OE
D
Input and Output Voltages With 3.3-V VCC)
Support Unregulated Battery Operation
Down to 2.7 V
Typical VOLP (Output Ground Bounce)
<0.8 V at VCC = 3.3 V, TA = 25°C
B-Port Outputs Have Equivalent 22-Ω
Series Resistors, So No External Resistors
Are Required
Ioff and Power-Up 3-State Support Hot
Insertion
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Latch-Up Performance Exceeds 500 mA Per
JESD 17
ESD Protection Exceeds JESD 22
− 2000-V Human-Body Model (A114-A)
− 200-V Machine Model (A115-A)
A2
A1
DIR
VCC
D
SN54LVTH2245 . . . J OR W PACKAGE
SN74LVTH2245 . . . DB, DGV, DW, NS, OR PW PACKAGE
(TOP VIEW)
These devices are designed for asynchronous
communication between data buses. They
transmit data from the A bus to the B bus or from
the B bus to the A bus, depending on the logic level at the direction-control (DIR) input. The output-enable (OE)
input can be used to disable the devices so the buses are effectively isolated.
ORDERING INFORMATION
SN74LVTH2245DW
Tape and reel
SN74LVTH2245DWR
SOP − NS
Tape and reel
SN74LVTH2245NSR
LVTH2245
SSOP − DB
Tape and reel
SN74LVTH2245DBR
LK245
Tube
SN74LVTH2245PW
Tape and reel
SN74LVTH2245PWR
TVSOP − DGV
Tape and reel
SN74LVTH2245DGVR
LK245
CDIP − J
Tube
SNJ54LVTH2245J
SNJ54LVTH2245J
CFP − W
Tube
SNJ54LVTH2245W
SNJ54LVTH2245W
LCCC − FK
Tube
SNJ54LVTH2245FK
TSSOP − PW
−55°C
−55
C to 125
125°C
C
TOP-SIDE MARKING
Tube
SOIC − DW
−40°C
−40
C to 85
85°C
C
ORDERABLE
PART NUMBER
PACKAGE†
TA
LVTH2245
LK245
SNJ54LVTH2245FK
† Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are
available at www.ti.com/sc/package.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 2003, Texas Instruments Incorporated
!"#$% !%&% %'(#&% !"(($% & ' )"*+!&% &$ ("! !%'(# )$!'!&% )$( $ $(# ' $,& %("#$% &%&( -&((&%.
("!% )(!$%/ $ % %$!$&(+. %!+"$ $%/ ' &++
)&(&#$$(
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1
SCBS707E − SEPTEMBER 1997 − REVISED OCTOBER 2003
description/ordering information (continued)
Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. Use of pullup
or pulldown resistors with the bus-hold circuitry is not recommended.
The B-port outputs, which are designed to source or sink up to 12 mA, include equivalent 22-Ω series resistors
to reduce overshoot and undershoot.
When VCC is between 0 and 1.5 V, the devices are in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 1.5 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
These devices are fully specified for hot-insertion applications using Ioff and power-up 3-state. The Ioff circuitry
disables the outputs, preventing damaging current backflow through the devices when they are powered down.
The power-up 3-state circuitry places the outputs in the high-impedance state during power up and power down,
which prevents driver conflict.
FUNCTION TABLE
INPUTS
OPERATION
OE
DIR
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
logic diagram (positive logic)
DIR
1
19
A1
2
18
To Seven Other Channels
2
OE
POST OFFICE BOX 655303
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B1
SCBS707E − SEPTEMBER 1997 − REVISED OCTOBER 2003
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 4.6 V
Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high-impedance
or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 7 V
Voltage range applied to any output in the high state, VO (see Note 1) . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V
Current into any output in the low state, IO: SN54LVTH2245 (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74LVTH2245 (A port) . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Current into any output in the high state, IO (see Note 2): SN54LVTH2245 (A port) . . . . . . . . . . . . . . . 48 mA
SN74LVTH2245 (A port) . . . . . . . . . . . . . . . 64 mA
B port . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA
Package thermal impedance, θJA (see Note 3): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70°C/W
DGV package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92°C/W
DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58°C/W
NS package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60°C/W
PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 83°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. This current flows only when the output is in the high state and VO > VCC.
3. The package thermal impedance is calculated in accordance with JESD 51-7.
recommended operating conditions (see Note 4)
SN54LVTH2245
VCC
VIH
Supply voltage
VIL
VI
Low-level input voltage
High-level input voltage
SN74LVTH2245
MIN
MAX
MIN
MAX
2.7
3.6
2.7
3.6
2
2
0.8
Input voltage
V
V
V
5.5
5.5
−24
−32
B port
−12
−12
High-level output current
IOL
Low-level output current
∆t/∆v
Input transition rise or fall rate
∆t/∆VCC
TA
Power-up ramp rate
200
Operating free-air temperature
−55
A port
48
64
B port
12
12
Outputs enabled
10
10
−40
mA
mA
ns/V
µs/V
200
125
V
0.8
A port
IOH
UNIT
85
°C
NOTE 4: All unused control inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report,
Implications of Slow or Floating CMOS Inputs, literature number SCBA004.
%'(#&% !%!$(% )("! % $ '(#&0$ (
$/% )&$ ' $0$+)#$% &(&!$(! && &% $(
)$!'!&% &($ $/% /&+ $,& %("#$% ($$(0$ $ (/ !&%/$ ( !%%"$ $$ )("! -" %!$
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3
SCBS707E − SEPTEMBER 1997 − REVISED OCTOBER 2003
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
A port
VOH
II = −18 mA
IOH = −100 µA
VCC = 2.7 V,
IOH = −8 mA
IOH = −24 mA
VCC = 2.7 V to 3.6 V,
VCC = 3 V,
VCC = 2.7 V
A port
VOL
VCC = 3 V
IOH = −12 mA
IOL = 100 µA
VCC−0.2
2
VCC−0.2
2
0.5
0.5
0.4
0.4
IOL = 32 mA
IOL = 48 mA
0.5
0.5
0.55
IOL = 64 mA
IOL = 100 µA
0.2
0.2
IOL = 12 mA
VI = VCC or GND
0.8
0.8
±1
±1
VI = 5.5 V
VI = 5.5 V
10
10
20
20
1
1
V
0.55
A or B ports‡
VCC = 3.6 V
VI = VCC
VI = 0
VCC = 0,
VI or VO = 0 to 4.5 V
VI = 0.8 V
VCC = 3.6 V§,
V
V
2
IOL = 24 mA
IOL = 16 mA
Control inputs
VCC = 3 V
−1.2
UNIT
VCC−0.2
2.4
0.2
VCC = 3.6 V,
VCC = 0 or 3.6 V,
A or B ports
−1.2
VCC−0.2
2.4
0.2
B port
Ioff
SN74LVTH2245
TYP† MAX
MIN
2
IOH = −32 mA
IOH = −100 µA
VCC = 2.7 V to 3.6 V,
VCC = 3 V,
II
II(hold)
MIN
VCC = 2.7 V,
VCC = 2.7 V to 3.6 V,
VCC = 3 V
B port
SN54LVTH2245
TYP†
MAX
TEST CONDITIONS
−5
VI = 2 V
µA
−5
±100
75
75
−75
−75
500
−750
VI = 0 to 3.6 V
µA
µA
IOZPU
VCC = 0 to 1.5 V, VO = 0.5 V to 3 V,
OE = don’t care
±100*
±100
µA
IOZPD
VCC = 1.5 V to 0, VO = 0.5 V to 3 V,
OE = don’t care
±100*
±100
µA
ICC
VCC = 3.6 V,
IO = 0,
VI = VCC or GND
Outputs high
Outputs low
Outputs disabled
∆ICC¶
VCC = 3 V to 3.6 V, One input at VCC − 0.6 V,
Other inputs at VCC or GND
Ci
VI = 3 V or 0
VO = 3 V or 0
0.19
0.1
0.19
5
3
5
0.19
0.1
0.19
0.2
4
0.2
4
mA
mA
pF
Cio
9
9
pF
* On products compliant to MIL-PRF-38535, this parameter is not production tested.
† All typical values are at VCC = 3.3 V, TA = 25°C.
‡ Unused terminals are at VCC or GND.
§ This is the bus-hold maximum dynamic current. It is the minimum overdrive current required to switch the input from one state to another.
¶ This is the increase in supply current for each input that is at the specified TTL voltage level, rather than VCC or GND.
%'(#&% !%!$(% )("! % $ '(#&0$ (
$/% )&$ ' $0$+)#$% &(&!$(! && &% $(
)$!'!&% &($ $/% /&+ $,& %("#$% ($$(0$ $ (/ !&%/$ ( !%%"$ $$ )("! -" %!$
4
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
SCBS707E − SEPTEMBER 1997 − REVISED OCTOBER 2003
switching characteristics over recommended operating free-air temperature range, CL = 50 pF
(unless otherwise noted) (see Figure 1)
SN54LVTH2245
PARAMETER
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A
B
tPLH
tPHL
B
A
tPZH
tPZL
OE
A
tPHZ
tPLZ
OE
A
tPZH
tPZL
OE
B
tPHZ
tPLZ
OE
B
VCC = 3.3 V
± 0.3 V
SN74LVTH2245
VCC = 2.7 V
VCC = 3.3 V
± 0.3 V
VCC = 2.7 V
MIN
MAX
MAX
MIN
TYP†
MAX
1
4.6
5.3
1.1
2.9
4.4
5.1
1
4.6
5.3
1.1
2.6
4.4
5.1
1
3.7
4.2
1.1
2.2
3.5
4
1
3.7
4.2
1.1
2
3.5
4
1.2
5.7
7.4
1.3
3.1
5.5
7.1
1.6
5.7
6.8
1.7
3.2
5.5
6.5
2
6.2
6.8
2.2
3.6
5.9
6.5
2
5.3
5.5
2.2
3.4
5
5.1
1.2
6.4
7.6
1.3
3.5
6.2
7.3
1.6
6.4
7.5
1.7
3.7
6.2
7.3
2
6.1
6.8
2.2
3.9
5.9
6.5
2
5.7
5.9
2.2
3.7
5.4
5.7
MIN
MIN
UNIT
MAX
ns
ns
ns
ns
ns
ns
† All typical values are at VCC = 3.3 V, TA = 25°C.
%'(#&% !%!$(% )("! % $ '(#&0$ (
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)$!'!&% &($ $/% /&+ $,& %("#$% ($$(0$ $ (/ !&%/$ ( !%%"$ $$ )("! -" %!$
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5
SCBS707E − SEPTEMBER 1997 − REVISED OCTOBER 2003
PARAMETER MEASUREMENT INFORMATION
6V
500 Ω
From Output
Under Test
S1
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
6V
GND
2.7 V
LOAD CIRCUIT
Timing Input
1.5 V
0V
tw
tsu
2.7 V
Input
1.5 V
1.5 V
th
2.7 V
Data Input
1.5 V
1.5 V
0V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
2.7 V
1.5 V
Input
1.5 V
0V
VOH
1.5 V
1.5 V
VOL
Output
tPLZ
3V
1.5 V
tPZH
VOH
1.5 V
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
0V
Output
Waveform 1
S1 at 6 V
(see Note B)
tPLH
tPHL
1.5 V
tPZL
tPHL
tPLH
Output
2.7 V
Output
Control
Output
Waveform 2
S1 at GND
(see Note B)
VOL + 0.3 V
VOL
tPHZ
1.5 V
VOH − 0.3 V
VOH
≈0 V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
E. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
6
POST OFFICE BOX 655303
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PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
74LVTH2245DGVRE4
ACTIVE
TVSOP
DGV
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
74LVTH2245DGVRG4
ACTIVE
TVSOP
DGV
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245DBLE
OBSOLETE
SSOP
DB
20
SN74LVTH2245DBR
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245DBRE4
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245DBRG4
ACTIVE
SSOP
DB
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245DGVR
ACTIVE
TVSOP
DGV
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245DW
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245DWE4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245DWG4
ACTIVE
SOIC
DW
20
25
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245DWR
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245DWRE4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245DWRG4
ACTIVE
SOIC
DW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245NSR
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245NSRE4
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245NSRG4
ACTIVE
SO
NS
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245PW
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245PWE4
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245PWG4
ACTIVE
TSSOP
PW
20
70
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245PWLE
OBSOLETE
TSSOP
PW
20
SN74LVTH2245PWR
ACTIVE
TSSOP
PW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245PWRE4
ACTIVE
TSSOP
PW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
SN74LVTH2245PWRG4
ACTIVE
TSSOP
PW
20
2000 Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-1-260C-UNLIM
TBD
TBD
(1)
Lead/Ball Finish
Call TI
Call TI
MSL Peak Temp (3)
Call TI
Call TI
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
Addendum-Page 1
PACKAGE OPTION ADDENDUM
www.ti.com
4-Jun-2007
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 2
PACKAGE MATERIALS INFORMATION
www.ti.com
4-Jan-2008
TAPE AND REEL BOX INFORMATION
Device
Package Pins
Site
Reel
Diameter
(mm)
Reel
Width
(mm)
A0 (mm)
B0 (mm)
K0 (mm)
P1
(mm)
W
Pin1
(mm) Quadrant
SN74LVTH2245DBR
DB
20
SITE 41
330
16
8.2
7.5
2.5
12
16
Q1
SN74LVTH2245DGVR
DGV
20
SITE 41
330
12
7.0
5.6
1.6
8
12
Q1
SN74LVTH2245DWR
DW
20
SITE 41
330
24
10.8
13.0
2.7
12
24
Q1
SN74LVTH2245PWR
PW
20
SITE 41
330
16
6.95
7.1
1.6
8
16
Q1
Pack Materials-Page 1
PACKAGE MATERIALS INFORMATION
www.ti.com
Device
4-Jan-2008
Package
Pins
Site
Length (mm)
Width (mm)
Height (mm)
SN74LVTH2245DBR
DB
20
SITE 41
346.0
346.0
33.0
SN74LVTH2245DGVR
DGV
20
SITE 41
346.0
346.0
29.0
SN74LVTH2245DWR
DW
20
SITE 41
346.0
346.0
41.0
SN74LVTH2245PWR
PW
20
SITE 41
346.0
346.0
33.0
Pack Materials-Page 2
MECHANICAL DATA
MPDS006C – FEBRUARY 1996 – REVISED AUGUST 2000
DGV (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
24 PINS SHOWN
0,40
0,23
0,13
24
13
0,07 M
0,16 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
0°–8°
1
0,75
0,50
12
A
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,08
14
16
20
24
38
48
56
A MAX
3,70
3,70
5,10
5,10
7,90
9,80
11,40
A MIN
3,50
3,50
4,90
4,90
7,70
9,60
11,20
DIM
4073251/E 08/00
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion, not to exceed 0,15 per side.
Falls within JEDEC: 24/48 Pins – MO-153
14/16/20/56 Pins – MO-194
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MSSO002E – JANUARY 1995 – REVISED DECEMBER 2001
DB (R-PDSO-G**)
PLASTIC SMALL-OUTLINE
28 PINS SHOWN
0,38
0,22
0,65
28
0,15 M
15
0,25
0,09
8,20
7,40
5,60
5,00
Gage Plane
1
14
0,25
A
0°–ā8°
0,95
0,55
Seating Plane
2,00 MAX
0,10
0,05 MIN
PINS **
14
16
20
24
28
30
38
A MAX
6,50
6,50
7,50
8,50
10,50
10,50
12,90
A MIN
5,90
5,90
6,90
7,90
9,90
9,90
12,30
DIM
4040065 /E 12/01
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-150
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
MECHANICAL DATA
MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999
PW (R-PDSO-G**)
PLASTIC SMALL-OUTLINE PACKAGE
14 PINS SHOWN
0,30
0,19
0,65
14
0,10 M
8
0,15 NOM
4,50
4,30
6,60
6,20
Gage Plane
0,25
1
7
0°– 8°
A
0,75
0,50
Seating Plane
0,15
0,05
1,20 MAX
PINS **
0,10
8
14
16
20
24
28
A MAX
3,10
5,10
5,10
6,60
7,90
9,80
A MIN
2,90
4,90
4,90
6,40
7,70
9,60
DIM
4040064/F 01/97
NOTES: A.
B.
C.
D.
All linear dimensions are in millimeters.
This drawing is subject to change without notice.
Body dimensions do not include mold flash or protrusion not to exceed 0,15.
Falls within JEDEC MO-153
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
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