ETC GL646USB

TM
GeneScan II
GL646USB
Three-in-one Scanner Controller
for USB and 1394
SPECIAFICATION 1.3
Genesys Logic, Inc.
10F, No.11, Ln.3, Tsao Ti Wei, Shenkeng, Taipei, Taiwan
Tel: +886-2-2664-6655
Fax: +886-2-2664-5757
http://www.genesyslogic.com/
GL646USB
Index
1. GENERAL DESCRIPTION ........................................................................2
2. FEATURES....................................................................................................2
3. SYSTEM BLOCK DIAGRAM....................................................................4
3.1
USB 1.1 System Block Diagram ................................................................................................... 4
3.2
USB 2.0 System Block Diagram ................................................................................................... 4
3.3
IEEE 1394 System Block Diagram................................................................................................ 4
4. FUNCTION BLOCK DIAGRAM ...............................................................5
5. HARDWARE DESCRIPTION....................................................................6
5.1
Pins Assignment & Mode Definition:............................................................................................ 6
5.2
Pin Descriptions :........................................................................................................................... 8
5.3
Electrical Characteristics: ............................................................................................................ 11
6. Application Description ..............................................................................12
7. COMMAND SET DESCRIPTION ...........................................................21
Revision 1.3
-1-
Mar.22 2001
GL646USB
1. GENERAL DESCRIPTION
Genesys Logic's single-chip GeneScanTMII, GL646USB, is a high speed, high performance, low cost and rich scalability
controller for scanner. It successfully integrates AFE (16 bits Analog Front End), featured scanner function ASIC and
USB 1.1 interface controller into one single-chip. With it’s high performance design architecture, GeneScanTMII is not
only ready for supporting CIS or CCD image sensors (600dpi or 1200dpi resolution) which is used in flatbed or
transparency scanners, but also can co-work with uni-polar or bi-polar stepping motors. Advanced features of
GeneScanTMII includes loseless image data compression, dual motor acceleration/ deceleration curve table for high speed
motor moving, industrial standard auto suspend mode and bus-power supporting.
Except the build-in USB 1.1 interface, the capability of cooperating with USB 2.0 and IEEE 1394 interface controller
also expand the scalability of GeneScan TMII to fit customer's further requirement of supporting high speed interface
standards.
2. FEATURES
Design for sheetfed, flatbed and transparency scanner.
Programmable 600,1200 or 2400 DPI color CCD or CIS timing
Support fast scan for low DPI such as pre-view
Support three scanning type :pixel by pixel(pixel rate), line by line(line rate) and RGB line by turns(line rate)
Programmable dummy lines to resolve start/stop (discontinuous) problem.
48-Bits true color ( 16-Bits gray level ) scan
Support color , fine Gray , fast gray and fast B/W scan for CCD
Support color , gray , true gray and B/W scan for CIS
Built-in 16 bits Front End
16 Bits white shading , dark shading
and 12/14 Bits GAMMA correction
Programming threshold level for B/W
Exposure time is adjustable (max.524ms , 1 pixel time increment step)
Scan width(scan area) control for horizontal line( 1 pixel increment step)
Built-in USB(1.1) , external USB(2.0) and external IEEE1394 interface
Support 4M bits x 1 or x2 (256K x 16) EDO DRAM
Support digital average for DPI (non-deletion type)
Support hardware deletion type for DPI (2400 to 1 DPI ,1 DPI decrement)
Acceleration/ Deceleration double table for high speed motor moving
Stepping motor phase control ports for bi-polar or uni-polar motor
Full, half and quarter steps for motor control
Build-in Uni-polar phase PWM control
Watch-Dog protection circuit for motor, lamp and ASIC system
2 Output ports for lamp (include flatbed and transparency with PWM) control
Input port for home sensor
9 GPIO ports
Lamp timeout (sleeping) control
Revision 1.3
-2-
Mar.22 2001
GL646USB
Support 8/16 bits image data type.
Build-in lossless 8 bits image data compression.
Output motor trigger signal under scanning for ADF
Power on check status
DMA image read.
DMA DRAM data read/write
Revision 1.3
-3-
Mar.22 2001
GL646USB
3. SYSTEM BLOCK DIAGRAM
3.1
USB 1.1 System Block Diagram
CCD/CIS
HOST
Three-in-One
Scanner
Controller
(GL646USB)
12MHz
Motor Driver
IO Device
DRAM
3.2
USB 2.0 System Block Diagram
12MHz
CCD/CIS
Three-in-One
Scanner
Controller
(GL646USB)
USB 2.0
Controller
Motor Driver
IO Device
24~48MHz
DRAM
3.3
IEEE 1394 System Block Diagram
25MHz
HOST
PHY
CCD/CIS
IEEE 1394
Controller
Three-in-One
Scanner
Controller
(GL646USB)
Motor Driver
12MHz
IO Device
DRAM
Note: 1.The pins assignment and package of GL646 USB is the same as GL643USB.
2.The connection of GL646USB is the same as GL643USB.
3.GL643USB is 14 bits solution; GL646USB is 16 bits solution.
Revision 1.3
-4-
Mar.22 2001
Mar.22 2001
IEEE 1394
Controller
DMA
Interface
MPU
MPU
Interface
HOST
Register
& Status
Read
USB 1.1
Controller
12MHz
Data
Compressi
on
EPP
Circuit
USB 2.0
Controller
I/O
Data
Packing
Fast Scan /
Normal Scan
Control
Average
Motor
Control
Motor
Black &
White
CCD/CIS
Control
CCD/CIS
Gamma
Correction
Front-End
(16 bits)
DPI
Control
A/D Data
Latch
White
Shading
Process
Dark
Shading
Process
GPIO
Controller
PLL
Watch
dog
Clkgen
Motor
Moving
Table
Shading
RAM
(256*16)
Revision 1.3
4. FUNCTION BLOCK DIAGRAM
HOST
Data
Interface
-5-
GL646USB
HOST
GL646USB
5.
HARDWARE DESCRIPTION
5.1
Pins Assignment & Mode Definition:
Mode 1
SC+
AFE+
USB1.1
No. TSTMOD=0 I
TSTSEL0=0 /
TSTSEL1=0 O
MPUSEL=0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
I
I
I
I
I
I
I
DGND
P
DVDD
P
CKSEL
I
I
I
I
I
I
I
I
I
GPIO5
I/O
GPIO6
I/O
GPIO7
I/O
DGND
P
DVDD
P
DGND
P
GPIO11
I/O
GPIO12
I/O
DVDD
P
IX1
I
IOX2
I/O
DGND
P
EXTRST_ I
HOME
I
TSTMOD
I
MT_PH0
O
MT_PH1
O
MT_PH2
O
MT_PH3
O
MT_PH4
O
MT_PH5
O
DVDD
P
XPA_SW
O
LAMP_SW O
LED_B
O
AVDD
P
VMO
I/O
VPO
I/O
VPP
O
AGND
P
CCD_CK1X O
CCD_CK2X O
CCD_CPX O
CCD_RSX O
Revision 1.3
Mode 2
SC+
USB1.1
TSTMOD=0 I
TSTSEL0=1 /
TSTSEL1=0 O
MPUSEL=0
I
I
I
I
I
I
I
DGND
DVDD
CKSEL
P
P
I
I
I
I
I
I
I
I
I
GPIO5
I/O
GPIO6
I/O
GPIO7
I/O
DGND
P
DVDD
P
DGND
P
GPIO11
I/O
GPIO12
I/O
DVDD
P
IX1
I
IOX2
I/O
DGND
P
EXTRST_ I
HOME
I
TSTMOD
I
MT_PH0
O
MT_PH1
O
MT_PH2
O
MT_PH3
O
MT_PH4
O
MT_PH5
O
DVDD
P
XPA_SW
O
LAMP_SW O
LED_B
O
AVDD
P
VMO
I/O
VPO
I/O
VPP
O
AGND
P
CCD_CK1X O
CCD_CK2X O
CCD_CPX O
CCD_RSX O
Mode 3
SC+
AFE
Mode 4
SC+
AFE
Mode 6
TEST
SC
Mode 7
TEST
USB1.1
Mode 8
TEST
AFE
(For
USB2.0)
Mode 5
SC+
AFE+
USB1.1
(TEST PLL
& DEBUG)
(For
1394)
TSTMOD=0 I
TSTSEL0=0 /
TSTSEL1=1 O
MPUSEL=1
TSTMOD=0 I
TSTSEL0=0 /
TSTSEL1=1 O
MPUSEL=0
TSTMOD=0 I
TSTSEL0=1 /
TSTSEL1=1 O
MPUSEL=0
TSTMOD=1 I
TSTSEL0=0 /
TSTSEL1=0 O
TSTMOD=1 I
TSTSEL0=1 /
TSTSEL1=0 O
TSTMOD=1 I
TSTSEL0=0 /
TSTSEL1=1 O
HSLCTIN
HI_INIT
HAFXTIN
HSTBIN
H_BUSY
H_ACK
H_PE
DGND
DVDD
H_ERR
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
GPIO5
GPIO6
GPIO7
DGND
DVDD
DGND
GPIO11
GPIO12
DVDD
IX1
IOX2
DGND
EXTRST_
HOME
TSTMOD
MT_PH0
MT_PH1
MT_PH2
MT_PH3
MT_PH4
MT_PH5
DVDD
XPA_SW
LAMP_SW
LED_B
AVDD
VMO
VPO
VPP
AGND
CCD_CK1X
CCD_CK2X
CCD_CPX
CCD_RSX
HSLCTIN
HI_INIT
HAFXTIN
HSTBIN
H_BUSY
H_ACK
H_PE
DGND
DVDD
H_ERR
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
GPIO5
GPIO6
GPIO7
DGND
DVDD
DGND
GPIO11
GPIO12
DVDD
IX1
IOX2
DGND
EXTRST_
HOME
TSTMOD
MT_PH0
MT_PH1
MT_PH2
MT_PH3
MT_PH4
MT_PH5
DVDD
XPA_SW
LAMP_SW
LED_B
AVDD
VMO
VPO
VPP
AGND
CCD_CK1X
CCD_CK2X
CCD_CPX
CCD_RSX
ASTRBO_
MIARSTB
DSTRBO_
WRO_
WAITI_
PLLOUT
OSCENB
DGND
DVDD
CKSEL
IODAT0
IODAT1
IODAT2
IODI0
IODI1
IODI2
PWRDN
WMSEL
VPI
VMI
RXD
DGND
DVDD
DGND
TSE0
RSE0
DVDD
IX1
IOX2
DGND
EXTRST_
HOME
TSTMOD
MT_PH0
MT_PH1
MT_PH2
MT_PH3
MT_PH4
MT_PH5
DVDD
XPA_SW
LAMP_SW
LED_B
AVDD
VMO
VPO
VPP
AGND
CCD_CK1X
CCD_CK2X
CCD_CPX
CCD_RSX
HSLCTIN
HI_INIT
HAFXTIN
HSTBIN
H_BUSY
H_ACK
H_PE
DGND
DVDD
H_ERR
HD0
HD1
HD2
HD3
HD4
HD5
HD6
HD7
ASTRBO_
I
I
I
I
O
O
O
P
P
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
P
P
I/O
I/O
P
I
I/O
P
I
I
I
O
O
O
O
O
O
P
O
O
O
P
I/O
I/O
O
P
O
O
O
O
I
I
I
I
O
O
O
P
P
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
P
P
I/O
I/O
P
I
I/O
P
I
I
I
O
O
O
O
O
O
P
O
O
O
P
I/O
I/O
O
P
O
O
O
O
-6-
O
O
O
O
O
O
O
P
P
I
O
O
O
O
O
O
O
O
O
O
O
P
P
P
O
O
P
I
I/O
P
I
I
I
O
O
O
O
O
O
P
O
O
O
P
I/O
I/O
O
P
O
O
O
O
I
I
I
I
O
O
O
P
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
DMAD0/GPIO5 I/O
DMAD1/GPIO6 I/O
DMAD2/GPIO7 I/O
DGND
P
DVDD
P
DGND
P
DMAD6/GPIO11 I/O
DMAD7/GPIO12 I/O
DVDD
P
IX1
I
IOX2
I/O
DGND
P
EXTRST_ I
HOME
I
TSTMOD
I
MT_PH0
O
MT_PH1
O
MT_PH2
O
MT_PH3
O
MT_PH4
O
MT_PH5
O
DVDD
P
XPA_SW
O
LAMP_SW O
LED_B
O
AVDD
P
VMO
I/O
VPO
I/O
VPP
O
AGND
P
CCD_CK1X O
CCD_CK2X O
CCD_CPX O
CCD_RSX O
DSTRBO_
WRO_
WAITI_
OSCENB
DGND
DVDD
CKSEL
EPPD0
EPPD1
EPPD2
EPPD3
EPPD4
EPPD5
EPPD6
EPPD7
GPIO5
GPIO6
GPIO7
DGND
DVDD
DGND
DVDD
IX1
IOX2
DGND
EXTRST_
INTI_
TSTMOD
DVDD
AVDD
VMO
VPO
VPP
AGND
O
I
O
O
I
I
O
P
P
I
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
P
P
I/O
I/O
P
I
I/O
P
I
I
I
O
O
O
O
O
O
P
O
O
O
P
I/O
I/O
O
P
O
O
O
O
ASIC
I/O
Cell
I
I
I
I
I
I
I
DGND
DVDD
DGND
DVDD
DGND
DVDD
IX1
IOX2
DGND
EXTRST_
TSTMOD
DVDD
EB05O
AVDD
VMO
VPO
VPP
AGND
P
P
I
I
I
I
I
I
I
I
I
I/O
I/O
I/O
P
P
P
I/O
I/O
P
I
I/O
P
I
I
I
O
O
O
O
O
O
P
O
O
O
P
I/O
I/O
O
P
O
O
O
O
bd4rtu
bd4rtu
bd4rtu
bd4rtu
bd4rtu
bd4rtu
bd4rtu
bd4rtu
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
Oscen2
Oscen2
bd4rtu
bd4rt
bd4rtd
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
Mar.22 2001
GL646USB
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
CCD_TGX
CCD_TGG
CCD_TGB
RGBSEL0
DGND
DVSS
DVDD
R_IN
G_IN
B_IN
VRLC
VMID
VRT
VRB
VRU
AVSS
AVDD
DBUS0
DBUS1
DBUS2
DBUS3
DBUS4
DBUS5
DBUS6
DBUS7
DGND
DBUS8
DBUS9
DBUS10
DBUS11
DBUS12
DBUS13
DBUS14
DBUS15
DVDD
RASX
CASX
NOEX
NWEX
RASY
CASY
NOEY
NWEY
ABUS0
ABUS1
ABUS2
ABUS3
ABUS4
ABUS5
ABUS6
ABUS7
ABUS8
VSMP
BSMP
MCLK
Revision 1.3
O
O
O
O
P
P
P
I
I
I
O
O
O
O
I
P
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
O
O
I
I
O
I
CCD_TGX
CCD_TGG
CCD_TGB
RGBSEL0
DGND
DVSS
DVDD
R_IN
G_IN
B_IN
VRLC
VMID
VRT
VRB
VRU
AVSS
AVDD
DBUS0
DBUS1
DBUS2
DBUS3
DBUS4
DBUS5
DBUS6
DBUS7
DGND
DBUS8
DBUS9
DBUS10
DBUS11
DBUS12
DBUS13
DBUS14
DBUS15
DVDD
RASX
CASX
NOEX
NWEX
RASY
CASY
NOEY
NWEY
ABUS0
ABUS1
ABUS2
ABUS3
ABUS4
ABUS5
ABUS6
ABUS7
ABUS8
OP0
OP1
OP2
OP3
OP4
OP5
OP6
OP7
VSMP
BSMP
SCLK
SENLOAD
MCLK
SDI
O
O
O
O
P
P
P
I
I
I
O
O
O
O
I
P
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
O
O
O
O
O
O
CCD_TGX
CCD_TGG
CCD_TGB
RGBSEL0
DGND
DVSS
DVDD
R_IN
G_IN
B_IN
VRLC
VMID
VRT
VRB
VRU
AVSS
AVDD
DBUS0
DBUS1
DBUS2
DBUS3
DBUS4
DBUS5
DBUS6
DBUS7
DGND
DBUS8
DBUS9
DBUS10
DBUS11
DBUS12
DBUS13
DBUS14
DBUS15
DVDD
RASX
CASX
NOEX
NWEX
RASY
CASY
NOEY
NWEY
ABUS0
ABUS1
ABUS2
ABUS3
ABUS4
ABUS5
ABUS6
ABUS7
ABUS8
DMAD0
DMAD1
DMAD2
DMAD3
DMAD4
DMAD5
DMAD6
DMAD7
VSMP
BSMP
MPUCLK
MCLK
MPUCKOE
O
O
O
O
P
P
P
I
I
I
O
O
O
O
I
P
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
O
O
I
O
O
I
CCD_TGX
CCD_TGG
CCD_TGB
RGBSEL0
DGND
DVSS
DVDD
R_IN
G_IN
B_IN
VRLC
VMID
VRT
VRB
VRU
AVSS
AVDD
DBUS0
DBUS1
DBUS2
DBUS3
DBUS4
DBUS5
DBUS6
DBUS7
DGND
DBUS8
DBUS9
DBUS10
DBUS11
DBUS12
DBUS13
DBUS14
DBUS15
DVDD
RASX
CASX
NOEX
NWEX
RASY
CASY
NOEY
NWEY
ABUS0
ABUS1
ABUS2
ABUS3
ABUS4
ABUS5
ABUS6
ABUS7
ABUS8
VSMP
BSMP
MCLK
O
O
O
O
P
P
P
I
I
I
O
O
O
O
I
P
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
O
O
I
I
O
I
CCD_TGX
CCD_TGG
CCD_TGB
RGBSEL0
DGND
DVSS
DVDD
R_IN
G_IN
B_IN
VRLC
VMID
VRT
VRB
VRU
AVSS
AVDD
DBUS0
DBUS1
DBUS2
DBUS3
DBUS4
DBUS5
DBUS6
DBUS7
DGND
DBUS8
DBUS9
DBUS10
DBUS11
DBUS12
DBUS13
DBUS14
DBUS15
DVDD
RASX
CASX
NOEX
NWEX
RASY
CASY
NOEY
NWEY
ABUS0
ABUS1
ABUS2
ABUS3
ABUS4
ABUS5
ABUS6
ABUS7
ABUS8
OP0
OP1
OP2
OP3
OP4
OP5
OP6
OP7
VSMP
BSMP
SCLK
SENLOAD
MCLK
SDI
-7-
O
O
O
O
P
P
P
I
I
I
O
O
O
O
I
P
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
CCD_TGX
CCD_TGG
CCD_TGB
RGBSEL0
DGND
DVSS
DVDD
R_IN
G_IN
B_IN
VRLC
VMID
VRT
VRB
VRU
AVSS
AVDD
DBUS0
DBUS1
DBUS2
DBUS3
DBUS4
DBUS5
DBUS6
DBUS7
DGND
DBUS8
DBUS9
DBUS10
DBUS11
DBUS12
DBUS13
DBUS14
DBUS15
DVDD
RASX
CASX
NOEX
NWEX
RASY
CASY
NOEY
NWEY
ABUS0
ABUS1
ABUS2
ABUS3
ABUS4
ABUS5
ABUS6
ABUS7
ABUS8
OP0
OP1
OP2
OP3
OP4
OP5
OP6
OP7
VSMP
BSMP
SCLK
SENLOAD
MCLK
SDI
O
O
O
O
P
P
P
I
I
I
O
O
O
O
I
P
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
O
O
O
O
O
O
DGND
DVSS
DVDD
R_IN
G_IN
B_IN
VRLC
VMID
VRT
VRB
VRU
AVSS
AVDD
TSTPC0
TSTPC1
TSTPC2
TSTPC3
TSTPC4
TSTPC5
TSTPC6
TSTPC7
DGND
DVDD
TSTPB0
TSTPB1
TSTPB2
TSTPB3
TSTPB4
TSTPB5
TSTPA0
TSTPA3
TSTPA4
TSTPA5
O
O
O
O
P
P
P
I
I
I
O
O
O
O
I
P
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
I
I
I
I
I
I
I
I
DGND
DVSS
DVDD
R_IN
G_IN
B_IN
VRLC
VMID
VRT
VRB
VRU
AVSS
AVDD
DGND
DVDD
OP0
OP1
OP2
OP3
OP4
OP5
OP6
OP7
OP8
OP9
OP10
OP11
OP12
OP13
OEB
CDSCLK2
ADCCLK
SMPTIMG
RLC
OOP0
OOP1
VSMP
CDSCLK1
SCK
SEN
MCLK
SDI
O
O
O
O
P
P
P
I
I
I
O
O
O
O
I
P
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
P
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
O
I
I
I
I
I
Z
Z
I
I
I
I
I
I
I
bd4rt
bd4rt
bd4rt
bd4rt
Pesd7042
Pesd7042
Pesd7042
Pesd7042
Pesd7042
Pesd7042
Pesd7042
Pesd7042
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rt
bd4rtu
bd4rtu
bd4rtu
bd4rtu
bd4rtu
bd4rtd
Mar.22 2001
GL646USB
119
120
121
122
123
124
125
126
127
128
I
SDO
P DVDD
I MTR_SEL
I MPU_SEL
I/O GPIO1
I/O GPIO2
I/O GPIO3
I/O GPIO4
I TSTSEL0
I TSTSEL1
DVDD
MTR_SEL
MPU_SEL
GPIO1
GPIO2
GPIO3
GPIO4
TSTSEL0
TSTSEL1
I
CKSEL
P DVDD
I MTR_SEL
I MPU_SEL
I/O GPIO1
I/O GPIO2
I/O GPIO3
I/O GPIO4
I TSTSEL0
I TSTSEL1
NOTE:
In TCD2950D CCD:
Pin No : Pin Name NORMAL
49
CCD_CK1X Clock 1
50
CCD_CK2X Clock 2
56
RGB_SEL0 Clock 2
In Mode 6 (SC TEST) :
Pin No : MPU_SEL = 0
19
GPIO5
20
GPIO6
21
GPIO7
22
GPIO8
23
GPIO9
24
GPIO10
25
GPIO11
26
GPIO12
125
GPIO3
126
GPIO4
I
I
P DVDD
I MTR_SEL
I MPU_SEL
I/O GPIO1
I/O GPIO2
I/O GPIO3
I/O GPIO4
I TSTSEL0
I TSTSEL1
P DVDD
I MTRS_EL
I MPUS_EL
I/O GPIO1
I/O GPIO2
I/O GPIO3
I/O GPIO4
I TSTSEL0
I TSTSEL1
I
SDO
P DVDD
I MTR_SEL
I MPUS_EL
I/O GPIO1
I/O GPIO2
I/O WMSEL/GPIO3
I/O RLCSEL/GPIO4
I TSTSEL0
I TSTSEL1
I
TSTPA7
P DVDD
I MTR_SEL
I MPUS_EL
I/O GPIO1
I/O GPIO2
I/O GPIO3
I/O GPIO4
I TSTSEL0
I TSTSEL1
I
P DVDD
I MTR_SEL
I MPUS_EL
I/O GPIO1
I/O GPIO2
I/O GPIO3
I/O GPIO4
I TSTSEL0
I TSTSEL1
I
bd4rtd
P
I
I
I/O
I/O
I/O
I/O
I
I
bd4rtd
bd4rtd
bd4rt
bd4rt
bd4rt
bd4rt
bd4rtd
bd4rtd
FAST
Clock
3
Clock
2
Clock
1
MPU_SEL = 1
DMAD0
DMAD1
DMAD2
DMAD3
DMAD4
DMAD5
DMAD6
DMAD7
(WMSEL)
(RLCSEL)
In Mod 1,2,5,9
If Input clock = 12MHZ
If CKSEL = 0 => Scanner controller run 24MHZ
If CKSEL = 1 => Scanner controller run 32MHZ
In Mode 3:
If MPUCKOE = 1, MPUCLK = (Input clock frequency)/2
If CKSEL = 1 => Scanner controller run (Input clock frequency) /2
If CKSEL = 0 => Scanner controller run (Input clock frequency)
If MPUCKOE = 0, MPUCLK = 0
In Mode 4:
Scanner controller run (Input clock frequency)
5.2
Pin Descriptions :
MPU or DMA/EPP Interface
HSLCTIN(MPU_ALE )
I
EPP nAStrb or MPU ALE
HI_INIT(MPU_CS)
I
EPP nINIT or MPU Chip select
HAFXTIN(MPU_RD)
I
EPP nDStrb or MPU Read
HSTBIN(MPU_WR)
I
EPP nWrite or MPU Write
Revision 1.3
-8-
Mar.22 2001
GL646USB
H_BUSY(DMA_ACK)
O
EPP nWait or DMA Acknowledge
H_ACK(IO_RD)
O
EPP Intr or DMA IO Read
H_PE(IO_WR)
O
EPP AckDataReq or DMA IO Write
H_ERR(DMA_DRQ)
B
EPP nDataAvail or DMA Data Request
HD0~HD7
B
EPP Data Bus or MPU Data Bus
DMAD0~7
B
DMA Data Bus
GPIO1~12
B
General Purpose Input Output
Support IO Ports
Bi-polar : MT_PH5=PHASE1
MT_PH4=PHASE2
MT_PH3=I11
MT_PH2=I01
MT_PH0~5
MT_PH1=I12
O
MT_PH0=I02
Uni-polar : MT_PH3=PHASE A
MT_PH2=PHASE B
MT_PH1=PHASE /A
MT_PH0=PHASE /B
HOME
I
Sense carriage home position
USB Interface
VMO
B
D+
VPO
B
D-
VCP
P
3.3V
CCD/CIS Control Signals
CCD_CK1X
O
CCD Shift register clock1 or CIS clock output
CCD_CK2X
O
CCD Shift register clock2 or CIS clock output
CCD_CPX
O
CCD Clamp gate clock or CIS clock output
CCD_RSX
O
CCD Reset gate clock or CIS clock output
CCD_TGX
O
CCD Transfer gate clock for R channel or CIS Line start pulse
CCD_TGG
O
CCD Transfer gate clock for G channel
CCD_TGB
O
CCD Transfer gate clock for B channel
RGBSEL0
O
RGB channel selection pin or CCD Shift register clock3
XPA_SW
O
Transparency lamp power control or CIS Green LED array control
LAMP_SW
O
Flatbed lamp power control or CIS Red LED array control
LED_B
O
CIS Blue LED array control
FRONT-END
R_IN
AI
Red channel input signal
G_IN
AI
Green channel input signal
B_IN
AI
Blue channel input signal
VRLC
AO
Selectable analog output voltage for RLC
VMID
AO
ADC reference voltage. Derived from VRU. Normally is 2.5V
VRT
AO
ADC reference voltage. Derived from VRU. Normally is 3.3V
VRB
AO
ADC reference voltage. Derived from VRU. Normally is 1.7V
VRU
AI
ADC reference voltage. Normally connected to 5V analog supply
OP0~OP7
O
ADC digital data output
VSMP(CDSCLK2)
O
Wolfson type : Video sample synchronization pulse.
Revision 1.3
-9-
Mar.22 2001
GL646USB
This signal is applied synchronously with MCLK to specify the point of time that
the input is sampled.
Analog Device type : CDS image sampling clock
BSMP(CDSCLK1)
O
Analog Device type : Black level sampling clock
SCLK
O
Serial interface clock output for Front-end
SENLOAD
O
Serial interface data latch-in signal for Front-end
Wolfson type : Master clock.
This clock is applied at either six or three times the input pixel rate depending on
MCLK(ADCCLK)
O
SDI
O
Serial interface data output signal for Front-end
SDO
I
Serial interface data input signal for Front-end
DBUS0~15
B
DRAM data bus
ABUS0~8
O
DRAM address bus
RASX
O
DRAM RAS signal of first memory chip
CASX
O
DRAM CAS signal of first memory chip
NOEX
O
DRAM OE(output enable) signal of first memory chip
NWEX
O
DRAM WE signal of first memory chip
RASY
O
DRAM RAS signal of second memory chip
CASY
O
DRAM CAS signal of second memory chip
NOEY
O
DRAM OE(output enable) signal of second memory chip
NWEY
O
DRAM WE signal of second memory chip
the operational mode.
Analog Device type: ADC Converter sampling clock
DRAM
Miscellaneous
Test mode selection pins :
TSTMOD
TSTSEL0
TSTSEL1
I
MPU_SEL
MTR_SEL
I
{TSTMOD,TSTSEL0,TSTSEL1,MPU_SEL}=
0000 : mode1
0100 : mode2 0011 : mode3 0010 : mode4
100x : mode6
110x : mode7
MTR_SEL=1 select Bi_polar
IX1
I
Clock input for crystal
IOX2
O
Clock output for crystal
I
Scanner controller clock selection
CKSEL
MPUCLOE
MPUCLK
O
Clock output
EXTRST_
I
Hardware reset input
AVDD
P
Analog power input
AVSS
P
Analog ground input
AGND
P
Analog ground input for USB1.1
DVDD
P
Digital power input
DGND
P
Digital ground input
101x : mode8
0110 : mode5
1110 : mode9
MTR_SEL=0 select Uni_polar
POWER
Revision 1.3
-10-
Mar.22 2001
GL646USB
5.3
Electrical Characteristics:
5.3.1 Absolute Maximum Ratings (Voltages referenced to GND)
SYMBOL
DVDD
VI
VI/O
VAI/O
VI/OZ
VESD
TSTQ
IOUT
Tamb
Description
DC supply voltage
DC input voltage
DC input voltage range for I/O
DC input voltage for USB D+/D- pins
DC voltage applied to outputs in High Z state
static discharge voltage
Storage temperature range
DC output current, per pin
Operating ambient temperature
MIN
MAX
-0.5V
-0.5V
-0.5V
-0.5V
-0.5V
4000V
-60°C
-25mA
0°C
+7V
VCC+0.5V
VCC+0.5V
VCC+0.5V
VCC+0.5V
+150°C
+25mA
70°C
5.3.2 DC Characteristics (Digital Pins)
SYMBOL
DVDD
(or AVDD)
IO
VIL
VIH
VOL
VOH
IOLK
IOZ
RDN
RUP
Description
Power Supply Voltage
DC output sink current
LOW level input voltage
HIGH level input voltage
LOW level output voltage when IOL=4mA
HIGH level output voltage when IOH=4mA
Leakage current for pads with internal pull up or pull
down resistor
Tri-state output leakage current
Pad internal pulldown resister
Pad internal pullup resister
MIN
TYP
MAX
UNIT
4.5
5.0
5.5
V
4
50
mA
V
V
V
V
µA
0.8
2.4
0.4
2.4
-50
-50
120K
150K
200K
250K
50
290K
360K
µA
Ohms
Ohms
MIN
TYP
MAX
UNIT
3.0
27
3.3
41
3.6
56
0.3
3.6
V
mA
V
V
V
V
V
pF
µA
Ohms
5.3.3 DC Characteristics (VCP/D+/D-)
SYMBOL
V3.3
I3.3
VOL
VOH
VDI
VCM
VSE
CIN
ILO
ZDRV
Description
VCP regulator output
VCP maximum supply current
D+/D- static output LOW(RL of 1.5K to 3.6V )
D+/D- static output HIGH (RL of 15K to GND )
Differential input sensitivity
Differential common mode range
Single-ended receiver threshold
Transceiver capacitance
Hi-Z state data line leakage
Driver output resistance
2.8
0.2
0.8
0.2
-10
28
2.5
20
+10
43
Note: bd4rt without pull up or pull down resister.
bd4rtu with 250k pull up resister.
Revision 1.3
-11-
Mar.22 2001
GL646USB
6. Application Description
6.1. System Clock
Internal PLL or external clock input.
A. PLL: 12MHz input , 24 or 32 MHz output to internal system and 48MHz output to internal USB controller.
B. USB2.0 supply: External USB2.0 controller support 24,30,48 MHz to three in one ASIC.
C. Crystal supply: depend on crystal input (receptible frequency of ASIC: 12 to 48 MHz)
6.2. Pixel Clock
A. Normal Mode(three line in):
a. 24 system clock/pixel
b. Chunky color scan(three line in) or fine gray scan for CCD.
B. Fast Mode(one line in) :
a. 9,12 or 15 system clock/pixel three type.
b. Planar color scan (one line in) or Monochrome scan.
c. Fast gray or black & white scan for CCD.
d. Planar color(one line in) for CCD line by turns or line by line.
e. Planar color(one line in),gray, true gray or black & white scan for CIS.
Note : Chunky Color is R1G1B1,R2G2B2,R3G3B3,………
Planar Color is R1,R2,R3,…..;G1,G2,G3,…….;B1,B2,B3,……..
CCD : Chunky color or planar color.
CIS : Planar color
6.3. Scan Speed
A. System clock = 24 MHz :
a. Normal Mode: Chunky color or fine gray scan.
24x41.666ns/pixel = 1.0us/pixel
(1). 600dpi : 5.4ms/line
(2). 1200dpi : 10.4ms/line
b. Fast Mode: Planar color, fast gray or black&white scan.
9x41.666ns/pixel = 0.375us/pixel
12x41.666ns/pixel = 0.5us/pixel
15x41.666ns/pixel = 0.625us/pixel
(1). 600dpi : 2.025~3.375ms/line
(2). 1200dpi : 4.05~6.75ms/line
B. System clock = 32MHz :
a. Normal Mode :
24x31.25ns/pixel = 0.75us/pixel
(1). 600dpi : 4.05ms/line
(2). 1200dpi : 8.1ms/line
b. Fast Mode :
9x31.25ns/pixel = 0.281us/pixel
12x31.25ns/pixel = 0.375us/pixel
Revision 1.3
-12-
Mar.22 2001
GL646USB
15x31.25ns/pixel = 0.469us/pixel
(1). 600dpi : 1.517~2.533ms/line
(2). 1200dpi : 3.034~5.066ms/line
6.4. Fast scan for low DPI
Multiple CCD clocking rates allows speed up scan speed. You can speed up 2 times, 3 times or 4 times scanning
time for low resolution.
For example,600dpi scanner: if 75dpi speed up 4 times then 5.4ms/4=1.35ms/line. Scan speed is equal to 1.18s/page.
Chunky scan: You can speed up 2 times,3 times or 4 times scanning time.
Planar scan: 9 system clock/pixel: You can not speed up scanning time
12 system clock/pixel : You can speed up 2 times scanning time
15 system clock/pixel : You can speed up 2 times scanning time
6.5. Scanning Type
Support three line in(parallel ) for CCD, one line in for CCD or CIS, RGB line by turns in for CCD three types.
A. CCD
a. Three line in :
R
G
B
b. Line by line :
R
c.
G
B
Line by turns :
R
G
B
B. CIS
a. color scan :
TG
LED R
LED G
LED B
b.
Revision 1.3
gray scan:
-13-
Mar.22 2001
GL646USB
TG
LED R/G/B
c.
true gray scan:
TG
LED R
LED G
LED B
6.6. Image Sensor Timing
Can be programmed.
A. CCD : support 600,1200 or 2400 dpi CCD.
For example NEC, TOSHIBA, Sony ……etc.
B. CIS : support 600,1200 or 2400 dpi CIS.
For example Canon , Toshiba , Mitsubishi ……etc.
6.7. Dummy Line
Support programmable dummy lines to resolve (overcome) Start/Stop problem.
You can insert dummy lines to reduce scanner stop and wait events (buffer full) or always no-stop.
A. Line base of dummy lines:
The range of dummy lines is 0 line ~ 15 lines.
B. Adjustable dummy line:
The range is CCD or CIS minimum shift out time to 512k pixels time, can be adjusted by 1 pixel time increment.
6.8. Analog Front End Timing :
Internal 16 bits Front-End : Operation is similar to Wolfson or Analog Device.
6.9. Image Type
Support color, fine gray, fast gray and fast Black & White scan.
Support color filters selection for gray and B/W scan. The filters include Red, Green and Blue.
Note: The scan style of fine gray and color is same. So, fine gray scanning speed is slow.
The exposure time of fast gray scan is shorter than fine gray scan. So, fast gray Scanning speed is high.
6.10. Bits Depth
16 x3 Bits true color , 16 bits gray level and one bit Black & White.
Image data type : 16 bits , 8 bits and 1 bit data type.
6.11. Shading & Correction
a. White Shading & Dark Shading:
Revision 1.3
-14-
Mar.22 2001
GL646USB
Internal white shading by pixel (16 bits resolution) and dark shading by pixel (16 bits resolution) can be enabled or
disabled By S/W. The white shading curve is calculated by S/W.
Data arrangement: Normal mode: dark R1,white R1,dark G1,white G1,dark B1,white B1,
dark R2,white R2,dark G2,white G2,dark B2,white B2,
dark R3,white R3,dark G3,white G3,dark B3,white B3,……
Fast mode: dark R1,white data R1,dark R2,white R2,dark R3, white R3…
dark G1,white data G1,dark G2,white G2,dark G3,white G3…
dark B1,white data B1,dark B2,white B2,dark B3,white B3…
White shading formula :
2000H x Target / (Wn-Dn) = White Gain data ----- for 8 times system
White shading formula :
4000H x Target / (Wn-Dn) = White Gain data ----- for 4 times system
For example : Target = 3FFFH
then
Wn = 2FFFH
Dn = 0040H
and 8 times system operation
White Gain = 2000H x 3FFFH / (2FFFH-0040H) = 2AE4H (1.34033 times)
b. Correction :
GAMMA correction table by S/W calculation. The resolution is 12 or 14 bits gamma table.
Range: 0 to 64k (16 bits) input mapping to 0 to 4k (12 bits) output ;
0 to 64k (16 bits) input mapping to 0 to 16k (14 bits)output;
0 to 64k (16 bits) input mapping to 0 to 255 (8 bits) output ;
0 to 64k (16 bits) input mapping to 0 to 255 (8 bits) output;
6.12. Threshold Level Setting
Can be programmed by S/W.
Range: 0 to 255 can be adjusted by one increment.
The threshold with bandwidth in order to reduce image noise.
d
h
BWHI
f
b
i
e
bandwidth
c
BWLOW
g
a
a,b,c,g : are black pixels
d,e,f,h,i : are white pixels
6.13. Exposure Time Adjustable
Maximum: 512k pixels time (about 524 ms/line)
Adjustment step: 1 pixel time.
For Transparency scan, the exposure time can up to 524 ms.
6.14. To Control RGB Exposure Time Separately
Revision 1.3
-15-
Mar.22 2001
GL646USB
Scanning type: line by turns
R
G
B
You can control R, G or B exposure time separately.
For example, above case B exposure time is three times of R; G exposure time is two times of R.
6.15. Scan Width control
Scan width control for horizontal line
a. Support start pixel address, end pixel address and dummy pixel number setting
b. Maximum length: 64k pixels.
Minimum length: 1 pixel
6.16. Support built-in USB(1.1) , external USB(2.0) and external IEEE1394 Interface
Support 4-type operation.
Three in one: USB1.1 + AFE + scanner controller
Two in one:
A. AFE + scanner controller + (external) USB2.0
B. AFE + scanner controller + (external) IEEE 1394
C. USB1.1 + scanner controller + (external) AFE
Note: Instead of our build-in AFE, you can use other external AFE.
6.17. DRAM Timing
Support 4Mx1 or x2 Bits EDO DRAM (16 x 256K) image buffer and calibration buffer timing.
You can select single or double DRAM for scanner. DRAM speed is 35ns and above for 24MHz system clock,28ns
and above for 32MHz system clock.
6.18. Horizontal Resolution Adjustable for DPI Function
A. Digital deletion type :
The resolution from 1 DPI to 1200 DPI , can be adjusted
by 1 DPI increment by S/W.
B. Digital average type :
Support 1/2,1/3,1/4,1/5,1/6,1/8,1/10,1/12,1/15 digital average function.
For example, 1200dpi scanner: 600dpi, 400dpi, 300dpi, 240dpi, 200dpi,150dpi, 120dpi, 100dpi, 80dpi
average function.
C. CCD DPI process :
Support 1/2,1/3 and 1/4 resolution.
For example, 1200dpi scanner: output 600dpi, 400dpi and 300dpi process.
6.19. Vertical Resolution Adjustable for DPI Function
Revision 1.3
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GL646USB
The resolution of motor speed control is 16 bits, so, we can control vertical resolution
By one dpi increment, the resolution can be from 1 DPI to 4800DPI for 1200DPI scanner
And 1 DPI to 9600 DPI for 2400dpi scanner.
Note: The resolution of quarter step can up to four times resolution.
6.20. Acceleration/Deceleration Double Table
The acceleration/deceleration slope tables are store in DRAM, can be download by S/W.
The slope can be programmed by S/W for each table. Resolution is 16 bits pixel-time. The number of slope steps is
1~255 steps. One table is for scanning The other is for fast move.
The forward and backward steps can be programmed by S/W. The resolution is 16 bits pixel-time. The number of
slope steps is 1~255 steps. You can adjust any non-linear curve.
Note: what is fast move? Such as move back to go home or move to window any position to scan.
(1). Two table moving :
Scanning position
speed
buffer full position
scan finished
Go to scan window
forward
A
B
C
D
E
F
time
H
I
J
G
backward
go home
A,J : table two (slope two) acceleration curve.
B
: table two (slope two) deceleration curve.
C,D,I : table one (slope one) acceleration curve.
E,F,H : table one (slope one) deceleration curve.
G
: touch home sensor deceleration curve.
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Mar.22 2001
GL646USB
(2). One table moving :
Scanning position
buffer full position scan finished
speed
A
B
C
D
time
F
G
H
E
go home
H
: table two (slope two) acceleration curve.
A,B,G
: table one (slope one) acceleration curve.
C,D,F
: table one (slope one) deceleration curve.
E
: touch home sensor deceleration curve.
6.21. Stepping Motor Phase Control
There is 6 output control pins to control stepping motor.mtr_ph0~5 for bi-polar and mtr_ph0~3 for Uni-polar.
A. bi-polar :
a. Support 2916 motor driver timing and 2916 compatible driver IC,such as L6219.
b. Include full, half and quarter step control.
B. uni-polar :
a. Support 2003 motor driver timing and 2003 compatible driver IC.
b. Include full step two phases on, full step single phase on and half step.
c. PWM control, include frequency and duty control.
PWM
Duty
Frequency
Phase on time
6.22. Watch-Dog Protection
This function can automatically reset the system to initial state, whenever the system is held (no access signal )
beyond
the time limit.Be able to enable or disable this function by S/W.
This function can protect motor power, lamp power and ASIC system.
Calculation formula : (line period) x (16k) x (setting no.).
The range of setting no. is 1~15.
6.23. Lamp Timeout Control
This circuitry can automatically reset the lamp power, whenever the system is setting. Be able to enable or disable
this function by S/W.
Calculation formula: (line period) x (64k) x (setting no.).
Revision 1.3
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Mar.22 2001
GL646USB
The range of setting no. is 1~7.
6.24. Lamp Power Control
These are two power control ports for lamp. One is for Flatbed and the other is for XPA (Transparency or film).
The resolution of it’s PWM type is 9 bits. Duty range is 1/512~512/512.
Note : carrier frequency is (system clock)/512.
6.25. 6.25 Sensor Input
The system support home sensor input port.
6.26. 9 GPIO ports
You can set input or output for each GPIO pin separately.
Such as keypads inputs, document sensor for sheet-fed or motor power control…etc.
Note : there are two pins for special function. One is GPIO12,the other is GPIO11.
GPIO12 : 1. Pull up by resister to indicate that ASIC turn on lamp power whenever power on initial.
2. Pull down by resister to indicate that ASIC turn off lamp power whenever power on initial.
3. This pin can control bi-polar motor driver 2916 or 6219 Vref in order to control max. current.
GPIO11 : This pin can control bi-polar motor driver 2916 or 6219 Vref in order to control max. current.
6.27
Lossless Data Compression
A. Support lossless 8 bits image data compression.
B. The best ratio is 4 times.
C. Real-time decompression type.
D. This function can be enabled or disabled by S/W.
6.28. Motor Trigger signal for ADF
Motor trigger signal for ADF motor moving ,can be controlled under scanning condition.
6.29. Operation Mode
There is 9 mode to operate this chip.
A. Mode1 : SC+AFE+USB1.1------------------------------------- three in one
B. Mode2 : SC+USB1.1 ------------------------------------------- external AFE
C. Mode3 : SC+AFE(for IEEE1394) ---------------------------- external IEEE1394
D. Mode4 : SC+AFE(for USB2.0) ------------------------------- external USB2.0
E. Mode5 : test PLL & Debug
F. Mode6 : test internal SC
G. Mode7 : test internal USB1.1
H. Mode8 : test internal AFE
I. Mode9 : test internal CPU
Note: SC is scanner controller; AFE is analog front-end.
6.30. Power on Check
The default status of the PWRBIT is reset.You can set the PWRBIT and then read back the status in order to check
the power status. This operation be able to check first time power on or not.
6.31. DMA image read.
Support DMA image read for DMA operation.
6.32. DMA DRAM read/write
Support DMA read/write function for Gamma Table, Shading Data and Acceleration/Deceleration Table down-load
Revision 1.3
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Mar.22 2001
GL646USB
or read back
6.33. RAM Test
S/W can test DRAM IC by write and read back data.
Revision 1.3
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7. COMMAND SET DESCRIPTION
Reg.
01
02
Bit7
Bit6
Bit5
CISSET
DOGENB
DVDSET
ACDCDIS
AGOHOME
XPASEL
NOTHOME
03
TG3
04
LINEART
05
AVEENB
BITSET
Bit4
Bit3
Bit2
COMPENB
DRAMSEL
MTRPWR
FASTFED
MTRREV
LAMPPWR
LAMPDOG
FASTMOD
ADTYPE[1:0]
DPIHW[1:0]
GMMENB
PWRBIT
LEDADD
RSH[4:0]
09
RSL[4:0]
0A
CPH[4:0]
0B
CPL[4:0]
0F
MOVE
10
EXPR[15:8]
11
EXPR[7:0]
12
EXPG[15:0]
13
EXPG[7:0]
14
EXPB[15:8]
DMASEL
DMARDWR
CKDIS
CTRLDIS
EXPB[7:0]
16
CTRLHI
17
SELINV
TGINV
CK1INV
CK2INV
TGMODE[1:0]
18
CNSET
CTRLINV
TGW[5:0]
DCKSEL[1:0]
19
CKTOGGLE
CKDELAY[1:0]
CKSEL[1:0]
EXPDMY[7:0]
1A
CKH[4:0]
1B
CKL[4:0]
1C
1D
BASESEL[1:0]
OPTEST[2:0]
08
15
STEPSEL[1:0]
FESET[1:0]
GAIN4
SCANRESET
S CAN
LAMPTIM[2:0]
07
0E
Bit0
SHDAREA
FILTER[1:0]
GMMTYPE[1:0]
06
Bit1
CK3SEL
CK3INV
CKMANUAL TCDFAST
1E
TGSEL[5:0]
DMYPIX
TGSHLD[4:0]
WDTIME[3:0]
LINESEL[3:0]
1F
SCANFED[7:0]
20
BUFSEL[7:0]
21
STEPNO[7:0]
22
FWDSTEP[7:0]
23
BWDSTEP[7:0]
24
FASTNO[7:0]
25
LINCNT[17:16]
26
LINCNT[15:8]
27
LINCNT[7:0]
28
Revision 1.3
LAMPPWM[8]
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Mar.22 2001
GL646USB
Reg.
Bit7
Bit6
Bit5
Bit4
Bit3
29
LAMPPWM[7:0]
2A
RAMA[14:0]
2B
RAMA[7: 0]
Bit2
2C
Bit1
Bit0
DPISET[11:8]
2D
DPISET[7:0]
2E
BWHI[7:0]
2F
BWLOW[7:0]
30
STRPIXEL[15:8]
31
STRPIXEL[7:0]
32
ENDPIXEL[15:8]
33
ENDPIXEL[7:0]
34
DUMMY[7:0]
35
MAXWD[18:16]
36
MAXWD[15:8]
37
MAXWD[7:0]
38
LPERIOD[15:8]
39
LPERIOD[7:0]
3A
FEWRDATA[9:8]
3B
FEWRDATA[7:0]
3C
RAMWRDATA[7:0]
3D
FEEDL[17:16]
3E
FEEDL[15:8]
3F
FEEDL[7:0]
41
PWRBIT
BUFEMPTY
FEEDFSH
SCANFSH
HOMESNR
LAMPSTS
42
VALIDWORD[15:8]
44
VALIDWORD[7:0]
45
RAMRDDATA[7:0]
46
FERDDATA[9:8]
47
FERDDATA[7:0]
48
FEDCNT[17:16]
49
FEDCNT[15:8]
4A
FEDCNT[7:0]
4B
SCANCNT[17:16]
4C
SCANCNT[15:8]
4D
SCANCNT[7:0]
4E
LPERIODRD[15:8]
4F
LPERIODRD[7:0]
50
FERDA[5:0]
51
FEWRA[5:0]
Revision 1.3
MOTMFLG
VALIDWORD[18:16]
43
Reg.
FEBUSY
Bit7
Bit6
Bit5
Bit4
Bit3
-22-
Bit2
Bit1
Bit0
Mar.22 2001
GL646USB
52
RHI[4:0]
53
RLOW[4:0]
54
GHI[4:0]
55
GLOW[4:0]
56
BHI[4:0]
57
BLOW[4:0]
58
VSMP[4:0]
VSMPW[2:0]
59
BSMP[4:0]
BSMPW[2:0]
5A
WMSEL
RLCSEL
CDSREF[1:0]
RLC[3:0]
5B
CKFH[4:0]
5C
CKFL[4:0]
5D
CKSH[4:0]
5E
CKSL[4:0]
60
Z1MOD[15:8]
61
Z1MOD[7:0]
62
Z2MOD[15:8]
63
Z2MOD[7:0]
64
PHFREQ[7:0]
65
MTRPWM[5:0]
66
GPO12
GPO11
67
GPO6
GPO5
GPOE12
GPOE11
GPOE6
GPOE5
68
GPOM12
GPOM11
69
6A
6D
GPO4
GPO3
GPO2
GPOE4
GPOE3
GPOE2
GPO1
GPOE7
FSTPSEL[1:0]
GPOE1
FASTPWM[5:0]
6B
6C
GPO7
FMOVNO[7:0]
TGTIME[1:0]
Z2MOD[18:16]
Z1MOD[18:16]
DECSEL[2:0]
STOPTIM[4:0]
70
GPI12
GPI11
71
GPI6
GPI5
GPI7
GPI4
GPI3
GPI2
GPI1
Note: Reg4x , Reg7x are read ports. The other are write ports.
7.1. Reg : 01H (Write)
Default : 00H
B7:CISSET
: set: CIS scan type.
: reset: CCD scan type.
B6:DOGENB
: set: enable watch dog of ASIC(set time out:Reg1E[7:4]).
: reset: disable.
B5:DVDSET
: set : enable shading (include whole line shading and area shading two kinds).
: reset : disable shading.
B4:FASTMOD
: set: enable fast mode scanning type (include fast gray and Black & White scan).
: reset: enable normal mode scanning type (include fine gary and color scan).
B3:COMPENB
: set: enable data compression.
: reset: disable
B2:DRAMSEL
: set : the DRAM size is 4Mx2 (256kx16x2) bits.
: reset : the DRAM size is 4Mx1(256kx16x1) bits.
B1:SHDAREA
: set: enable shading area (depend on scan area and scan dpi).
: reset: shading area is whole line.
Revision 1.3
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GL646USB
B0:SCAN
: set: enable scan process.
: reset: disable scan process.
7.2. Reg : 02H (Write)
Default : 01H
B7:NOTHOME
: set: auto-go-home doesn’t go back to home position.
: reset: go back to home position automatically.
B6:ACDCDIS
: set: disable forward/backward moving whenever buffer full.
: reset: enable forward/backward moving whenever buffer full.
B5:AGOHOME
: set: whenever scan is finished, carriage go home automatically.
: reset: disable auto-go-home function.
B4:MTRPWR
: set: turn on MOTOR power and phase.
: reset: turn off MOTOR power and phase.
B3:FASTFED
: set: enable two table for motor moving of theacceleration/deceleration.
: reset: disable two table, only use single table.
B2:MTRREV
: set: set motor reverse moving.
: reset: set motor forward moving.
B1~0:STEPSEL[1:0] : for table one scanning move step type selection.
(1).bi-polar :
a.00: full step.
b.01: half step.
c.10: quarter step.
d.11: reserved.
(2).uni-polar :
a.00: two-phase-on full step.
b.01: half step.
c.10: reserved.
d.11: single-phase-on full step.
7.3. Reg : 03H (Write)
Default : 0CH
B7:TG3
: set: enable alternated CCD TG function.
: reset: disable.
B6:AVEENB : set: select dpi average function
: reset: select dpi deletion function.
B5:XPASEL : set: select transparency lamp on.
: reset: select flatbed lamp on.
B4:LAMPPWR: set: turn on LAMP power.
: reset: turn off LAMP power.
B3:LAMPDOG : set: to start lamp sleeping mode(default on).
: reset: to disable lamp sleeping mode.
B2~0:LAMPTIM[2:0]
: lamp on time setting (default: 4)
FASTMOD=1: LAMPTIM*2*(64k)*Line-Period.
FASTMOD=0: LAMPTIM*(64k)*Line-Period.
7.4. Reg : 04H (Write)
Default : 03H
B7:LINEART
: set: Black/White scan.
: reset: Color/Gray scan.
B6:BITSET
: set : 16 bits image data type (= word).
: reset : 8 bits image data type (= byte).
B5~4:ADTYPE[1:0] : front end bits type:
a.00: reserved.
b.01: 16 bits.
c.10: reserved.
d.11: reserved.
B3~2:FILTER[1:0] : scan color type :
a.00: color
b.01: R
Revision 1.3
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Mar.22 2001
GL646USB
B1~0:FESET[1:0]
: front-end selection.
c.10: G
d.11: B
a.00: reserved
b.01: reserved
c.10: Analog Device control style
d.11: Wolfson control style
7.5. Reg : 05H (Write)
Default:00H
B7~6: DPIHW[1:0] : set CCD/CIS resolution
00=600dpi
01=1200dpi
10=2400dpi
11=reserved.
B5~4: GMMTYPE[1:0] : set gamma bits depth. 00: 12 bits gamma table.
01: 14 bits gamma table.
10: reserved.
11: reserved.
B3: GMMENB
: set: enable gamma correction.
: reset: bypass gamma correction.
B2:LEDADD
: set: enable true gray by controlling CIS RGB LED array.
: reset: normal gray by controlling CIS single color LED array.
B1~0: BASESEL[1:0]
: (1).fast mode : set clocks/pixel of ASIC.
00: 9 clocks/pixel.
01: 12 clocks/pixel.
10: 15 clocks/pixel.
11: reserved.
(2). Normal mode : set clocks/pixel of CCD.
00: 24 clocks/pixel.
01: 12 clocks/pixel.
10: 8 clocks/pixel.
11: 6 clocks/pixel.
7.6. Reg : 06H (Write)
Default:00H
B4: PWRBIT :When power on, set this bit.To indicate power has on.
Default is reset.
B3: GAIN4
: set: digital shading gain=4 times system.
: reset: digital shading gain=8 times system.
Note: If you want to get more precise image quality, you can set GAIN4 bit.
B2~0: OPTEST[2:0]: select ASIC operation type.
000: set normal mode to capture AFE image.
001: set DRAM bank, power on carriage initiated and ADF(motortgo) test for ASIC simulation.
010: pixel count pattern for ASIC image test.
011: line count pattern for ASIC image test.
100: counter and adder test for ASIC simulation test.
101:CCD TG test for TGMODE
7.7. Reg : 07H (Write)
Default:00H
B1:DMASEL : set: DMA access DRAM under command mode.
: reset: MPU access DRAM under command mode.
B0:DMARDWR
: set: DMA read DRAM under command mode.
: reset: DMA write DRAM under command mode.
Note: DMA operation can be processed under CPU and DMA type.
7.8. Reg : 08H,09H
Default:12H,14H
Revision 1.3
(Write)
-25-
Mar.22 2001
GL646USB
RSH[4:0]: set CCD RS rising edge position.
RSL[4:0] : set CCD RS falling edge position.
(1). Color or fine gray : 24 clocks/pixel
0
1
2
3
4
CCD RS : RSH=0CH
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23
8
0
1
RSL=10H
(2).Fast gray or B&W : 9 clocks/pixel
0
1
2
3
4
CCD RS : RSH=07H
5
6
7
2
3
4
5
6
7
8
0
1
2
3
4
5
10 11 12 13 14 15 16 17 18 19 20 21 22 23 0
1
2
3
4
8
9
10 11
RSL=01H
7.9. Reg : 0AH,0BH (Write)
Default:15H,17H
CPH[4:0] : set CCD CP rising edge position.
CPL[4:0] : set CCD CP falling edge position.
(1). Color or fine gray : 24 clocks/pixel
5
6
7
8
9
CCD CP : CPH=15H
CPL=02H
(2).Fast gray or B&W : 12 clocks/pixel
0
1
2
3
4
CCD CP : CPH=06H
5
6
7
8
9
10 11 0
1
2
3
4
5
6
7
CPL=0AH
7.10. Reg : 0EH (Write)
Command : scanner software reset.
It can initiate AISC system, including lamp motor,
Control registers, internal circuit and status, but doesn’t include tables in
DRAM, like gamma table, shading table and acceleration/deceleration table.
7.11. Reg : 0FH
Revision 1.3
(Write)
-26-
Mar.22 2001
GL646USB
Command : motor moving.
Start motor farward/backward moving.
7.12. Reg : 10,11H (Write)
Default : 00H,00H
EXPR[15:0]: Red-LED array of CIS or Red channel TG of CCD exposure time setting.
7.13. Reg : 12H,13H (Write)
Default : 00H,00H
EXPG[15:0]: Green-LED array of CIS or Green channel TG of CCD exposure time setting.
7.14. Reg : 14H,15H (Write)
Default : 00H,00H
EXPB[15:0]: Blue-LED array of CIS or Blue channel TG of CCD exposure time.
7.15. Reg : 16H (Write)
Defalut : 32H
B7:CTRLHI : set: CCD CP & RS are high under TG high position.
: reset: CCD CP & RS are low under TG high position.
B6:SELINV : set: inverse CCD RGBSEL selection pins.
: reset: don’t inverse.
B5:TGINV
: set: inverse CCD TG.
: reset: don’t inverse.
B4:CK1INV : set: inverse CCD Clock 1.
: reset: don’t inverse.
B3:CK2INV : set: inverse CCD Clock 2.
: reset: don’t inverse.
B2:CTRLINV : set: inverse CCD CP & RS.
: reset: don’t inverse.
B1:CKDIS
: set: disable CCD TG position Clock 1/2 signals.
CCD TG
CCD Clock
: reset: enable CCD TG position Clock 1/2 signals.
CCD TG
CCD Clock
B0:CTRLDIS : set: disable CCD TG position CP & RS signals.
CCD TG
CCD CP/RS
Revision 1.3
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Mar.22 2001
GL646USB
: reset: enable CCD TG position CP & RS signals.
CCD TG
CCD CP/RS
7.16. Reg : 17H (Write)
Default : 14H
B7~6:TGMODE[1:0]
: to set CCD TG mode.
00:without dummy line CCD TG type.
01:with dummy line CCD TG type.
10:reserved.
11:reserved.
B5~0:TGW[5:0]
: to set CCD TG width.
7.17. Reg : 18H
Defalut : 00H
B7 : CNSET
(Write)
B6~5 :DCKSEL:
B4 :CKTOGGLE
B3~2 :CKDELAY:
B1~0 :CKSEL :
: set : TG and clock set to Canon CIS style.
: reset: TG and clock is non-Canon CIS style.
00 one time CCD Clocks speed for dummy line.
01 two time CCD Clocks speed for dummy line.
10 three time CCD Clocks speed for dummy line.
11 four time CCD Clocks speed for dummy line.
: set : half cycle per pixel for CCD Clock 1/2.
: reset : one cycle per pixel
00 no delay
01 delay one system clock for CCD Clock 1/2.
10 delay two system clock for CCD Clock 1/2.
11 delay three system clock for CCD Clock 1/2.
00 one time CCD Clock speed for capture image.
01 two time CCD Clock speed for capture image.
10 three time CCD Clock speed for capture image.
11 four time CCD Clock speed for capture image.
7.18. Reg : 19H (Write)
Default : 00H
EXPDMY[7:0] : to set dummy line exposure time (unit = 256 pixels time).
7.19. Reg : 1AH,1BH (Write)
Defalut : 00H,00H
CKH[4:0]: set CCD Clock rising edge position.
CKL[4:0]: set CCD Clock falling edge position.
7.20. Reg : 1CH (Write)
Default : 00H
B7: CK3SEL
: to enable CCD Clock3
B6:CK3INV
: to reverse CCD Clock3
B5~B0: TGSEL[5:0]
: to set CCD TG for R,G and B output control
B0~1: control R Channel TG.
B2~3: control G Channel TG.
B4~5: control B Channel TG.
7.21. Reg : 1DH (Write)
Defalut : 04H
B7 : CKMANUAL : to program CCD Clock1/2 by manual.
Revision 1.3
-28-
Mar.22 2001
GL646USB
Programming registers are Reg5B/5C/5D/5E.
B6 : TCDFAST
:reserved.
B5 : DMYPIX
:reserved.
B4~0
:TGSHLD[4:0] : to set CCD TG shoulder width.
7.22. Reg : 1EH (Write)
Defalut : 20H
B7~4:WDTIME[3:0] : to set watch-dog time.
Time : fast mode : WDTIME*2*(16K)*(Line-Priod).
normal mode: WDTIME*(16K)*(Line-Priod).
B3~0:LINESEL[3:0] : to set CIS Vertical DPI or dummy lines.
CIS : LINESEL =0 full dpi.
=1 1/2 dpi
=2 1/3 dpi
=3 1/4 dpi
…..
=15 1/16 dpi
CCD : LINESEL =0 no dummy line.
=1 1 dummy line.
=2 2 dummy lines.
=3 3 dummy lines.
……
=15 15 dummy lines.
Note : CIS can be implemented dummy line by motor move method, not dummy lines.
7.23. Reg : 1FH (Write)
Default : 00H
SCANFED[7:0]:
move to scanning position by table one.
7.24. Reg : 20H (Write)
Default : 00H
BUFSEL[7:0] : to set buffer condition (unit = 2k word).
Scanner execute backward/forward moving whenever buffer full.
If MAXWD < buffer condition, then motor move forward to scan.
7.25. Reg : 21H (Write)
Defalut : 00H
STEPNO[7:0]: to set table one steps number for forward slope curve of the acceleration/deceleration.
7.26. Reg : 22H (Write)
Defalut : 00H
FWDSTEP[7:0] : to set steps number of the forward steps.
7.27. Reg : 23H (Write)
Defalut : 00H
BWDSTEP[7:0] : to set steps number of the backward steps.
7.28. Reg : 24H (Write)
Defalut : 00H
FASTNO[7:0]: to set table one steps number for backward slope curve of the acceleration/deceleration under scanning
Revision 1.3
-29-
Mar.22 2001
GL646USB
Buffer full position
speed
Reg22
Reg21
Reg21
time
Reg24
Reg24
Reg23
7.29. Reg : 25H,26H,27 H (Write)
Defalut : 00H,00H,00H
LINCNT[17:0]: to set the scan lines number.
7.30. Reg : 28H,29H (Write)
Defalut : 01H,FFH
LAMPPWM[8:0] : to set PWM duty for lamp power control.
0: 1/512 duty.
1: 2/512 duty.
…..
511:512/512 duty.
7.31. Reg : 2AH,2BH (Write)
Default : 00H.00H
RAMA[14:0] : to set DRAM start address to access data.
note: IRAM_A[18:0]={RAMA[14:0],4’b0000}.
7.32. Reg : 2CH,2DH (Write)
Default : 00H,00H
DPISET[10:0] : set resolution of DPI for average type or deletion type.
A. average type : digital average function support 1/2,1/3,1/4,1/5,1/6,1/8,1/10,1/12,1/15
2400 dpi scanner : can set 1200,800,600,480,400,300,240,200,160 dpi.
1200 dpi scanner : can set 600,400,300,240,200,150,120,100 and 80 dpi.
600 dpi scanner : can set 300,200,150,120,100,75,60,50 and 40 dpi.
B. deletion type : 2400,1200 or 600dpi to 1 dpi setting decrement by one dpi.
7.33. Reg : 2EH (Write)
Default : 00H
BWHI[7:0]
: to set Black & White threshold high level.
7.34. Reg : 2FH (Write)
Default : 00H
BWLOW[7:0]
: to set Black & White threshold low level.
Revision 1.3
-30-
Mar.22 2001
GL646USB
d
BWHI
b
BWLOW
h
f
bandwidth
i
e
c
g
a
a,b,c,g : are black pixels
d,e,f,h,i : are white pixels
7.35. Reg : 30H,31H (Write)
Defalut : 00H,00H
STRPIXEL[15:0] : to set the begin pixel position (unit : pixel count).
STRPIXEL=(TGW+2*TGSHLD)+Begin pixels number.
7.36. Reg : 32H,33H (Write)
Defalut : 00H,00H
ENDPIXEL[15:0] : to set the end pixel position (unit : pixel count).
ENDPIXEL=(TGW+2*TGSHLD)+End pixels number.
7.37. Reg : 34H (Write)
Default : 00H
DUMMY[7:0] : to set the CCD dummy & optical black pixels position (unit : pixel count).
Note : Reg30,31,32,33 and 34 setting rule.
TGSHLD(Reg1D) RGW(Reg17)
TGSHLD(Reg1D)
CCD TG
CCD clock
CCD pixel no: N-1
N
0
1
2
3
4
For example begin pixel is 65 ,end pixel is 100 and CCD dummy pixel is 64,
Then STRPIXEL=(TGW+2*TGSHLD)+65.
ENDPIXEL=(TGW+2*TGSHLD)+100.
DUMMY =(TGW+2*TGSHLD)+64.
7.38. Reg : 35H,36H,37H (Write)
Defalut : 00H,00H,00H
MAXWD[18:0] : to set maximum word size per line for ASIC estimation.
If usable buffer size < MAXWD, then buffer is full. The scanner execute forward and Backward moving.
7.39. Reg : 38H,39H (Write)
Defalut : 15H,18H
LPERIOD[15:0] : to set Line period(or exposure time) for CCD.
Unit : pixel count
Revision 1.3
-31-
Mar.22 2001
GL646USB
7.40. Reg : 3AH,3BH (Write)
Defalut : 00H,00H
FEWRDATA[9:0] : This port is used to write data to control register of front-end.
7.41. Reg : 3CH (Write)
Defalut : 00H
RAMWRDATA[7:0] : This port is used to write data to DRAM.
7.42. Reg : 3DH,3EH,3FH (Write)
Defalut : 00H,00H,00H
FEEDL[17:0] : to set feeding steps number of motor move.
7.43. Reg : 41H (Read)
PWRBIT : To indicate power status.
BUFEMPTY : set: To indicate that the image buffer is empty.
: reset: To indicate that the image buffer is not empty.
FEEDFSH
: set: To indicate that motor feeding is finished.
: reset: To indicate that motor feeding is not finished.
SCANFSH : : set: To indicate that scan is finished.
: reset: To indicate that scan is not finished.
HOMESNR : : set: home sensor is off (is home position).
: reset: home sensor is on (is not home position).
LAMPSTS : : set: lamp is on.
: reset: lamp is off.
FEBUSY
: set: front end is busy and can not read/write again.
: reset: front end is ready and be able to read/write again.
MOTMFLG : set: motor is moving.
: reset: motor is stop.
7.44. Reg : 42H,43H,44H (Read)
VALIDWORD[18:0] : to indicate available words to read out in the image buffer of DRAM.
7.45. Reg : 45H (Read)
RAMRDDATA[7:0] : this port for read DRAM data.
7.46. Reg : 46H,47H (Read)
FERDDATA[9:0] : this port for read front end control register.
7.47. Reg : 48H,49H,4AH (Read)
FEDCNT[17:0] : to read motor feeding steps number.
For example, if you have set moving steps no. and execute moving command.
You can read out steps no. moved.
7.48. Reg : 4BH,4CH,4DH (Read)
SCANCNT[17:0] : to read scanner finished lines number.
7.49. Reg : 4EH,4FH (Read)
LPERIODRD[15:0] : to read back Reg38,Reg39 value.
7.50. Reg : 50H (Write)
Default : 00H
FERDA[5:0] : this port is read address setting for Front End control register read.
7.51. Reg : 51H (Write)
Default : 00H
FEWRA[5:0] : this port is write address setting for Front End control register write.
Revision 1.3
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Mar.22 2001
GL646USB
7.52. Reg : 52H,53H (Write)
Defalut : 00H,00H
RHI[4:0] : to latch R channel high byte data of AFE.
RLOW[4:0] : to latch R channel low byte data of AFE.
7.53. Reg : 54H,55H (Write)
Defalut : 00H,00H
GHI[4:0] : to latch G channel high byte data of AFE.
GLOW[4:0] : to latch G channel low byte data of AFE.
7.54. Reg : 56H,57H (Write)
Defalut : 00H,00H
BHI[4:0] : to latch B channel high byte data of AFE.
BLOW[4:0] : to latch B channel low byte data of AFE.
(1). Color or fine gray : 24 clocks/pixel
0
1
2
3
4
5
6
R[15:8]
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23
R[7:0]
G[15:8]
G[7:0]
B[15:8]
B[7:0]
RHI = 01H
RLOW
= 05H
GHI = 09H
GLOW
= 0DH
BHI = 11H
BLOW
= 15H
(2).Fast gray or B&W : 9 clocks/pixel
0
1
2
3
4
R[15:8]
5
6
7
1
2
3
4
5
10 11 12 13 14 15 16 17 18 19+ 20 21 22 23 0
1
2
3
4
R[7:0]
8
0
1
R[15:8]
2
3
4
5
R[7:0]
6
7
8
0
R[15:8]
RHI = 02H
RLOW
= 06H
7.55. Reg : 58H (Write)
Defalut : 00H
B7~3:VSMP[4:0]
B2~0:VSMPW[2:0]
: to set the rising edge position of image sampling for AFE.
: to set the pulse width of image sampling.
(1). Color or fine gray : 24 clocks/pixel
5
AFE
6
7
8
9
VSMP
Reg58=B3H : VSMP[4:0]=16H
VSMPW=3H
(2).Fast gray or B&W : 15 clocks/pixel
Revision 1.3
-33-
Mar.22 2001
GL646USB
0
AFE
1
2
3
4
5
6
7
8
9
10 11 12 13 14 0
1
2
3
4
5
6
7
8
VSMP
Reg58=34H : VSMP[4:0]=06H
7.56. Reg : 59H (Write)
Defalut : 00H
B7~3:BSMP[4:0]
B2~0:BSMPW[2:0]
VSMPW=4H
: to set the rising edge position of dark voltage sampling for AFE.
: to set the pulse width of image sampling.
7.57. Reg : 5AH (Write)
Defalut : C0H
B7 :WMSEL : set: to select Wolfson working type.
: reset: to select Analog Device working type.
B6 : RLCSEL : set: select reset level clamp on a pixel-by-oixel basis.
: reset: don’t select.
B5~4:CDSREF[1:0]
: to set the frontend CDSREF for line rate scanning type.
B3~0:RLC[3:0]
: to set the frontend RLC for line rate scanning type.
7.58. Reg : 5BH,5CH,5DH,5EH (Write)
Defalut : 00H,00H,00H,00H
CKFH[4:0]
: First point of rising edge.
CKFL[4:0]
: First point of falling edge.
CKSH[4:0]
: Second point of rising edge.
CKSL[4:0]
: Second point of falling edge.
(1). Color or fine gray : 24 clocks/pixel
0
1
2
3
4
5
6
7
8
9
10 11 12 13 14 15 16 17 18 19 20 21 22 23
8
9
10 11 12 13 14 0
CKFH = 02H
CKFL = 0AH
CKSH = 10H
CKSL = 14H
(2).Fast gray or B&W : 15 clocks/pixel
0
1
2
3
4
5
6
7
1
2
3
4
5
6
7
8
CKFH = 02H
CKFL = 08H
CKSH = 0CH
CKSL = 00H
Revision 1.3
-34-
Mar.22 2001
GL646USB
7.59. Reg : 60H,61H (Write)
Defalut : 00H,00H
Z1MOD[15:0]: to set the slope curve of acceleration/deceleration table mode value
Under buffer full moving.
7.60. Reg : 62H,63H (Write)
Defalut : 00H,00H
Z2MOD[15:0]: to set the slope curve of acceleration/deceleration mode value
Under first time moving to scanning .
(1). Two table moving :
speed
Scanning position
buffer full position
b
d
a
c
time
(2). One table moving :
speed
Scanning position
b
a
buffer full position
d
c
time
(a+b) mode LPERIOD = Z2MOD
(c+d) mode LPERIOD = Z1MOD
7.61. Reg : 64H (Write)
Defalut : 00H
PHFREQ[7:0]: to set PWM frequency for motor phase of uni-polar.
Frequency : (24MHz)/[(PHFREQ+1)*4
7.62. Reg :65H (Write)
Defalut : 3FH
MTRPWM[5:0]: to set PWM duty cycle for table one motor phase of uni-polar.
MTRPWM = 0 1/64 duty
=1
2/64 duty
=2
3/64 duty
……
= 63 64/64 duty
Revision 1.3
-35-
Mar.22 2001
GL646USB
note: If PHFREQ < 0FH,then PWM setting must < (PHFREQ+1)*4
7.63. Reg :66H,67H (Write)
Defalut : 00H,00H
GPO[12:7]
: GPO12~7 outputs ports
GPO[6:1]
: GPO6~1 outputs ports
7.64. Reg :68H,69H (Write)
Defalut : 00H,00H
GPOE[12:7] : GPO12~7 ports output enable set.
GPOE[6:1]
: GPO6~1 ports output enable set.
Set ‘1’ : output.
Reset ‘0’ : input.
GPOM12~11 : to select GPIO12~11 as Bi-polar motor driver V-ref input voltage in
order to control drive current.
7.65. Reg :6AH (Write)
Defalut : 00H
FSTPSEL[1:0] : for table two fast moving step type selection.
(1).bi-polar :
a.00: full step.
b.01: half step.
c.10: quarter step.
d.11: reserved.
(2).uni-polar :
a.00: two-phase-on full step.
b.01: half step.
c.10: reserved.
d.11: single-phase-on full step.
FASTPWM[5:0]
: to set PWM duty cycle for table two motor phase of uni-polar.
FASTPWM =0
1/64 duty
=1
2/64 duty
=2
3/64 duty
……
=63 64/64 duty
note: If PHFREQ < 0FH,then PWM setting must < (PHFREQ+1)*4
7.66. Reg :6BH (Write)
Defalut : 00H
FMOVNO[7:0]: Set fast moving slop steps(table two slope).
Revision 1.3
-36-
Mar.22 2001
GL646USB
(1). Two table moving :
speed
Scanning position
scan finished
Reg3D,3E,3F
Reg6B
Reg1F
Reg25,26,27
Reg21
Reg6D[7:5]
Reg6D[4:0]
Reg21
Reg6B
time
Go home
(2). One table moving :
speed
Scanning position
Reg3D,3E,3F
scan finished
Reg25,26,27
Reg21
Reg21
time
Reg6D[7:5]
Reg6B
Go home
7.67. Reg :6CH (Write)
Defalut : 00H
B7~6:TGTIME[1:0]
B5~3:Z1MOD[18:16]
B2~0:Z2MOD[18:16]
: Set period times for LINPRDWR,EXPR,EXPG & EXPB
00:one time period.
01:two times period.
10:four times period.
11:eight times period.
: Set Z1MOD bit 16,17 & 18.
: Set Z2MOD bit 16,17 & 18.
7.68. Reg :6DH (Write)
Defalut : 60H
B7~5:DECSEL[2:0] :select deceleration steps whenever go home.
000:1 steps deceleration
001:2 steps deceleration
010:4 steps deceleration
011:8 steps deceleration
100:16 steps deceleration
101:32 steps deceleration
110:64 steps deceleration
Revision 1.3
-37-
Mar.22 2001
GL646USB
111:128 steps deceleration
B4~0:STOPTIM[4:0]:select acceleration/deceleration stop time.
The unit is LPERIOD.
7.69. Reg :70H (Write)
GPI[12:7]
: GPIO12~7 input ports.
7.70. Reg :71H (Write)
GPI[6:1]
:GPIO6~1 input status.
7.71. Shading mapping(Chunky)
Attribute
Resolution
A[18:0]
600dpi
00000H~07FFFH
(RGB Chunky)
SIZE : 32k
Shading Mapping
1200dpi
00000H~0FFFFH
(RGB Chunky)
SIZE : 64k
2400dpi
00000H~1F7FFH
(RGB Chunky)
SIZE : 126k
7.72. Shading mapping(Planer)
Attribute
A[18:0]
Resolution
R
600dpi
00000H~029FFH
LINE
(RGB Planer)
G
02A00H~053FFH
LINE
B
05400H~07DFFH
LINE
R
1200dpi
LINE
(RGB Planer)
G
Shading Mapping
00000H~054FFH
05500H~0A9FFH
LINE
B
0AA00H~0FEFFH
LINE
R
2400dpi
00000H~0A7FFH
LINE
(RGB Planer)
G
0A800H~14FFFH
LINE
B
15000H~1F7FFH
LINE
7.73. Gamma mapping
Attribute
Color
A[18:0]
RED
09000H~09FFFH
SIZE : 4K
Revision 1.3
-38-
Mar.22 2001
GL646USB
12 BITS
GREEN
0A000H~0AFFFH
GAMMA
SIZE : 4K
BLUE
0B000H~0BFFFH
SIZE : 4K
600DPI
RED
09000H~0CFFFH
SIZE : 16K
14 BITS
GREEN
0D000H~10FFFH
GAMMA
SIZE : 16K
BLUE
11000H~14FFFH
SIZE : 16K
RED
11000H~11FFFH
SIZE : 4K
12 BITS
GREEN
12000H~12FFFH
GAMMA
SIZE : 4K
BLUE
13000H~13FFFH
SIZE : 4K
1200DPI
RED
11000H~14FFFH
SIZE : 16K
14 BITS
GREEN
15000H~18FFFH
GAMMA
SIZE : 16K
BLUE
19000H~1CFFFH
SIZE : 16K
RED
20000H~20FFFH
SIZE : 4K
12 BITS
GREEN
21000H~21FFFH
GAMMA
SIZE : 4K
22000H~22FFFH
BLUE
SIZE : 4K
2400DPI
RED
20000H~23FFFH
SIZE : 16K
14 BITS
GREEN
24000H~27FFFH
GAMMA
SIZE : 16K
BLUE
28000H~2BFFFH
SIZE : 16K
7.74. Image Buffer Mapping :
DRAM
Revision 1.3
A[18:0]
Resolution
-39-
Mar.22 2001
GL646USB
12 BITS
600DPI
0C000H~3FFFFH
GAMMA
14 BITS
15000H~3FFFFH
GAMMA
12 BITS
4M BITS X 1
1200DPI
14000H~3FFFFH
GAMMA
14 BITS
1D000H~3FFFFH
GAMMA
12 BITS
2400DPI
23000H~3FFFFH
GAMMA
14 BITS
2C000H~3FFFFH
GAMMA
12 BITS
600DPI
GAMMA
14 BITS
4M BITS X 2
0C000H~7FFFFH
15000H~7FFFFH
GAMMA
12 BITS
1200DPI
14000H~7FFFFH
GAMMA
14 BITS
1D000H~7FFFFH
GAMMA
12 BITS
2400DPI
23000H~7FFFFH
GAMMA
14 BITS
2C000H~7FFFFH
GAMMA
7.75. Slope Curve Table Mapping :
Attribute
Slope Curve Table
Revision 1.3
Resolution
A[18:0]
600DPI table I
08000 ~ 080FF
(DPIHW=00)
(for scan)
600DPI table II
08100 ~ 081FF
(DPIHW=00)
(for fast feed)
1200DPI table I
10000 ~ 100FF
(DPIHW=01)
(for scan)
1200DPI table II
10100 ~ 101FF
(DPIDW=01)
(for fast feed)
2400DPI table I
1F800 ~ 1F8FF
(DPIHW=10)
(for scan)
-40-
Mar.22 2001
GL646USB
Revision 1.3
2400DPI table II
1F900 ~ 1F9FF
(DPIDW=10)
(for fast feed)
-41-
Mar.22 2001
GL646USB
7.76. Package – 128QFP :
SYMBOLS
A1
A2
b
C
D
E
e
Hd
He
L
L1
Y
Θ
MIN(mm)
0.25
2.57
0.10
0.10
13.90
19.90
17.00
23.00
0.65
0
NOM(mm)
0.35
2.72
0.20
0.15
14.00
20.00
0.50
17.20
23.20
0.80
1.60
-
MAX(mm)
0.45
2.87
0.30
0.20
14.10
20.10
17.40
23.40
0.95
0.08
12
He
A2
A1
Y
L1
Hd
D
D
E
b
e
0.08(0.003)
M
H
Revision 1.3
-42-
Mar.22 2001