Real time clock module I2 C-BUS INTERFACE REAL TIME CLOCK MODULE RTC-8564JE • Built-in crystal unit allows adjustment-free efficient operation. • Compliant with I C high-speed bus specifications. (400 kHz) • Equipped with alarm, timer, and frequency output (32.768 kHz, 1024 Hz,32 Hz,1 Hz) features. • Inclusion of century bit to enable correct date even after year 2000 • Operating in wide voltage range from 1.8 to 5.5 V, and in wide range of clock voltage from 1.2 to 5.5 V. • Low power consumption at 275 nA/3.0 V. (Typ.) 2 Actual size Specifications (characteristics) Absolute Max. rating Item Supply voltage The I 2 C-Bus is a trademark of Philips Electronics N.V. Terminal connection Symbol Condition Min. Max. Unit VDD Between VDD and GND -0.5 +6.5 V -50 50 mA GND-0.5 VDD+0.5 V -10 10 mA As single part -55 +125 ˚C Condition Min. Max. Unit I2C-BUS access at 400 kHz 1.8 5.5 V +85 ˚C IDD VDD pin Input voltage Vi Input pin Output voltage Vo INT pins DC Input current Ii DC Output current Io Storage temperature Range TSTG — No. 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 2019 18 17 1615 14 13 12 11 Operating range Item Symbol Supply voltage range Clock voltage range Operating temperature range VDD 1 2 3 4 5 6 7 8 9 10 VLOW — TOPR -40 Frequency characteristics Oscillation start-up time Aging Max. Ta=+25 ˚C, VDD=3.0 V 5±23 T op Ta=+25˚C, -10 to +70 ˚C,VDD=3.0 V +10 -120 fv Ta=+25 ˚C, VDD=1.2 V to 5.5 V ±2 tSTA Ta=+25 ˚C, VDD=1.8 V 3 s ±5 × 10 /year fa Ta=+25 ˚C, VDD=3.0 V Pin Power current Symbol IDD Power current — (not during access) IDD32k “L” input voltage VIL “H” input voltage VIH “L” output voltage “L” output current “H” output current Leakage current Low voltage detection 69 × 10-6/V (Unit: mm) R8564 -6 Min. Typ. Max. Unit Condition — 800 fSCL=400 kHz 200 fSCL=100 kHz 0.33 0.80 fSCL=0 Hz, VDD=5.0 V 0.275 0.70 fSCL=0 Hz, VDD=3.0 V fSCL=0 Hz, VDD=2.0 V — 0.25 0.65 µA 2.5 3.4 fSCL=0 Hz, VDD=5.0 V 1.5 2.2 fSCL=0 Hz, VDD=3.0 V 1.1 1.6 fSCL=0 Hz, VDD=2.0 V 0.3xVDD GND -0.5 V — VDD+0.5 0.7xVDD -3 IOL(SDA) IOL(INT) VOL=0.4 V, VDD=5 V -1 IOL(CLKOUT) CLKOUT — IOH(CLKOUT) ILO VO=VDD or GND -1 — Ta=-40 °C to +85 °C — VLOW Ta=-20 °C to +70 °C SDA INT External dimensions (VDD=1.8 to 5.5 V, Ta=-40 to +85˚C) IDD0 (during access) × 10-6 E 8476A DC characteristics Item Unit 5.4 Frequency voltage characteristics Condition ∆f/fo — — mA 1 1 0.9 1.1 0.9 1.0 µA V 6.0±0.2 7.0±0.3 1.3 Frequency temperature characteristics Symbol 0.65 0.22 1.5 Max. Item Frequency precision Pin terminal N.C N.C CLKOE VDD CLKOUT SCL SDA (GND) GND INT N.C N.C N.C N.C N.C N.C N.C N.C N.C N.C (0.75) (0.75) Real time clock module Register table Address Register symbol bit 7 bit 6 bit 5 0 Control 1 TEST 0 1 Control 2 0 0 2 Sec VL S 40 3 Min ∗ Min 40 Min 20 Min 10 Min 8 Min 4 Min 2 Min 1 4 Hour ∗ ∗ Hour 20 Hour 10 Hour 8 Hour 4 Hour 2 Hour 1 5 Day ∗ ∗ Day 20 Day 10 Day 8 Day 4 Day 2 Day 1 6 Week ∗ ∗ ∗ ∗ ∗ W4 W2 W1 7 Month/Century C ∗ ∗ Month 10 Month 8 Month 4 Month 2 Month 1 8 Year Year 80 Year 40 Year 20 Year 10 Year 8 Year 4 Year 2 Year 1 bit 0 bit 1 bit 2 bit 4 bit 3 STOP 0 TEST 0 0 0 0 TI/TP AF TF AIE TIE S 20 S 10 S8 S4 S2 S1 9 Minutes Alarm AE A-Min 40 A-Min 20 A-Min 10 A-Min 8 A-Min 4 A-Min 2 A-Min 1 A Hours Alarm AE A-Hr 40 A-Hr 20 A-Hr 10 A-Hr 8 A-Hr 4 A-Hr 2 A-Hr 1 B Day Alarm AE ∗ A-Day 20 A-Day 10 A-Day 8 A-Day 4 A-Day 2 A-Day 1 C Week Alarm AE ∗ ∗ ∗ ∗ A-W 4 A-W 2 A-W 1 D CLKOUT frequency FE ∗ ∗ ∗ ∗ ∗ FD1 FD0 E Timer control TE ∗ ∗ ∗ ∗ ∗ TD1 TD0 F Timer 128 64 32 16 8 4 2 1 0 : Always set this bit to“0”. Switching characteristics Item Symbol Max. Unit SCL clock frequency fSCL 400 kHz Tolerance spike time on bus tSW 50 ns Start condition set-up time tSU;STA Start condition Hold time tHD;STA Timing chart (VDD=1.8 to 5.5 V, Ta=-40 ˚C to +85 ˚C) Min. Protocol Start Condition (s) Bit 7 MSB (A7) Bit6 (A6) tLOW tHIGH 1/fSCL Bit0 LSB (R/W) ACK (A) Stop Condition (P) 0.6 tSU;STA SCL “L” time tLOW 1.3 SCL “H” time tHIGH 0.6 µs SCL and SDA rise time SCL tr tr 0.3 SCL and SDA fall time Date set-up time tf tSU;DAT tf tBUF SDA 100 ns Date hold time tHD;DAT 0 Stop condition set-up time tSU;STO 4.0 tHD;STA tSU;DAT tHD;DAT tSU;STO µs Block diagram 32.768 kHz CRYSTAL Voltage Detector OSC Divider CLKOUT Output Control CLKOE INT Control Logic SCL SDA 2 I C-BUS Interface Address Register POR Control1 00 Control2 Seconds Minutes Hours Days Weekdays Month/Century Years Minutes Alarm Hour Alarm Day Alarm Weekday Alarm CLKOUT frequency Timer Control Timer 0F 70