Real time clock module SERIAL-INTERFACE REAL TIME CLOCK MODULE RTC-4513 • • • • • Builtin crystal unit allows adjustment-free efficient operation. Using a serial interface, controllable only three signal lines. Automatic leap year correction. 30 second adjustment, available. Wide operating voltage from 2.7V to 5.5V. Actual size Specifications (characteristics) Absolute Max. rating Item Power source voltage Symbol Condition VDD VDD-GND Input voltage VIN Output voltage VOUT Storage temperature TSTG Terminal connection Min. Max. Unit 7.0 -0.3 V VDD+0.3 +125 -55 No. Pin terminal N.C 1 DATA 2 STD.P 3 N.C 4 N.C 5 VDD 6 N.C 7 14 13 12 11 10 9 8 ˚C Operating range Item Symbol Condition Min. Typ. 5.0 Operating voltage VDD 2.7 Date holding voltage VCLK 2.0 Operating temperature TOPR -40 Max. Unit 5.5 V +85 ˚C No. Pin terminal N.C 14 CLK 13 CE 12 N.C 11 N.C 10 GND 9 N.C 8 1 2 3 4 5 6 7 Frequency characteristics Symbol Condition Range Frequency tolerance ∆f/fo Ta=25˚C, VDD=3V 0±25 Frequency temperature characteristics Top -10 to +70˚C +10/-120 fV Ta=25˚C, VDD=2.0 to 5.5V fa ppm/V ±5 ppm/year First year Ta=25˚C, VDD=3V External dimensions Electrical characteristics Symbol Condition Min. “H” input voltage VIH — 0.8VDD “L” input voltage VIL — 0.2VDD Input leak current 1 IIL1 VIN=VDD/GND (CE,CLK) 1/-1 Input leak current 2 IIL2 VIN=VDD/GND (DATA) 10/-10 “L” output voltage 1 VOL1 IO=1mA (DATA) 0.2VDD “H” output voltage VOH IO=-400µA (DATA) “L” output voltage 2 VOL2 IO=1mA (STD.P) 0.2VDD Off leak current IOFLK VO=VDD 10.0 Current consumption 1 IDD1 VDD=5V, VIN (CE) =0V 10.0 20.0 Current consumption 2 IDD2 VDD=3V, VIN (CE) =0V 2.5 5.0 Current consumption 3 IDD3 VDD=2V, VIN (CE) =0V 1.0 2.0 47 Typ. Max. Unit V 0.8VDD µA V R4513 E 607 6A 10.1±0.2 3.1 Item (Unit: mm) 7.4±0.2 Aging ppm 3.2±0.1 f-V characteristics Unit 5.0 Item 0˚ to 10˚ µA 0.05 min. 0.6 0.15 Real time clock module Register table Address 0 A3 A2 A1 A0 Register symbol D3 (MSB) D2 D1 D0 (LSB) 0 0 0 0 S1 s8 s4 s2 s1 0 to 9 1-second digit register 10-second digit register Register name 1 0 0 0 1 S10 f0 s40 s20 s10 0 to 5 2 0 0 1 0 MI1 mi8 mi3 mi2 mi1 0 to 9 1-minute digit register 3 0 0 1 1 MI10 fr mi40 mi20 mi10 0 to 5 10-minute digit register 4 0 1 0 0 H1 h8 h4 h2 h1 0 to 9 1-hour digit register 5 0 1 0 1 H10 fr pm/am h20 h10 0 to 1,2 10-hour digit register 6 0 1 1 0 D1 d8 d4 d2 d1 0 to 9 1-day digit register 7 0 1 1 1 D10 fr ∗ d20 d10 0 to 3 10-day digit register 8 1 0 0 0 MO1 mo8 mo4 mo2 mo1 0 to 9 1-month digit register mo10 0 to 1 10-month digit register ∗ 9 1 0 0 1 MO10 fr A 1 0 1 0 Y1 y8 B 1 0 1 1 Y10 C 1 1 0 0 D 1 1 0 E 1 1 F 1 1 y4 y2 y1 y80 y40 y20 y10 W fr w4 w2 w1 1 CD 30ADJ IRQ-F CAL/HW HOLD 1 0 CE t1 t0 INT/STND MASK 1 1 CF TEST 24/12 STOP RESET 1-year digit register 0 to 9 10-year digit register 0 to 6 day of the week register Control register D — Control register E Control register F Switching characteristics Item Symbol Condition Min. CLK “H” time tWH CLK “L” time tWL CE setup time tCS 150 CE hold time tCH 200 CE recovery time tCR CLK setup time tCKS Max. tCKH Write data setup time tDS Write data hold time tDH Read data delay time tRD Read data disable delay time tRZ Timing chart 300 — t CKS t WL t CS t WH t CH t CKH CLK 300 — ns 20 CLK hold time Unit CE 50 250 CL=50pF — CLK rise time/fall time t CR Write mode 100 — tRF tDS tDH 20 CLK Block diagram OSC Clock & calender Control register CD,CE,CF DATA STD.P Read mode V DD tRF Decoder tRD tRF GND CLK DATA Data buffer Address counter Hi-z DATA CLK CE tRZ CE 48