ICS ICS2309G

ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Description
Features
The ICS2309 is a low phase noise, high-speed PLL
based, low-skew zero delay buffer. Based on ICS’
proprietary low jitter Phase Locked Loop (PLL)
techniques, the device provides eight low skew outputs
at speeds up to 133 MHz at 3.3 V. The outputs can be
generated from the PLL (for zero delay), or directly
from the input (for testing), and can be set to tri-state
mode or to stop at a low level. The PLL feedback is
on-chip and is obtained from the CLKOUT pad.
•
•
•
•
•
Clock outputs from 10 to 133 MHz
•
•
•
•
•
•
5 V tolerant CLKIN
The ICS2309 is available in two different versions. The
ICS2309-1 is the base part. The ICS2309-1H is a high
drive version with faster rise and fall times.
Zero input-output delay
Eight low skew (<250 ps) outputs
Device-to-device skew <700 ps
Full CMOS outputs with 25 mA output drive
capability at TTL levels
Tri-state mode for board-level testing
Advanced, low power, sub-micron CMOS process
Operating voltage of 3.3 V
Industrial temperature range available
Packaged in 16-pin SOIC and TSSOP (-1H version
only)
• Pb (lead) free package available for -1H version
(16-pin TSSOP only)
Block Diagram
VDD
2
PLL
CLKIN
0
CLKOUT
1
CLKA1
CLKA2
CLKA3
CLKA4
Control
Logic
S2, S1 2
CLKB1
CLKB2
CLKB3
CLKB4
GND
1
MDS 2309 D
I n t e gra te d C i r c u i t S y s te m s
2
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ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Pin Assignment
CLKIN
1
16
CLKOUT
CLKA1
2
15
CLKA4
CLKA2
3
14
CLKA3
VDD
4
13
VDD
GND
5
12
GND
CLKB1
6
11
CLKB4
CLKB2
7
10
CLKB3
S2
8
9
S1
16 pin narrow (150 mil) SOIC
Output Clock Mode Select Table
S2
S1
CLKA1:A4
CLKB1:B4
A & B Source
PLL Status
0
0
Tri-state (note 1)
Tri-state (note 1)
PLL
OFF
0
1
Running
Tri-state (note 1)
PLL
ON
1
0
Running
Running
CLKIN (note 2)
OFF
1
1
Running
Running
PLL
ON
Note 1. Outputs are in high impedance state
Note 2. Buffer mode only; not zero delay between input and output
Pin Descriptions
Pin
Number
Pin
Name
Pin Type
1
CLKIN
Input
2-3
CLKA1:A4
Output
Clock outputs A1:A4. See table above.
4
VDD
Power
Power supply. Connect to 3.3 V.
5
GND
Power
Connect to ground.
6-7
CLKB1:B4
Output
Clock outputs B1:B4. See table above.
8
S2
Input
Select input 2. See table above. Internal pull-up.
9
S1
Input
Select input 1. See table above. Internal pull-up.
10 - 11
CLKB1:B4
Output
Clock outputs B1:B4. See table above.
12
GND
Power
Connect to ground.
13
VDD
Power
Power supply. Connect to 3.3 V.
14 - 15
CLKA1:A4
Output
Clock outputs A1:A4. See table above.
16
CLKOUT
Input
Clock input (5 V tolerant).
Buffered output. Internall feedback on this pin.
2
MDS 2309 D
In te grated Circuit Systems
Pin Description
●
5 25 Race Stree t, San Jose, CA 951 26
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ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
External Components
The ICS2309 requires a minimum number of external components for proper operation. Decoupling
capacitors of 0.01 mF should be connected between VDD and GND on pins 4 and 5, and VDD and GND
on pins 13 and 12, as close to the device as possible. A series termination resistor of 33Ω may be used to
each clock output pin to reduce reflections.
Absolute Maximum Ratings
Stresses above the ratings listed below can cause permanent damage to the ICS2309. These ratings,
which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of
the device at these or any other conditions above those indicated in the operational sections of the
specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can
affect product reliability. Electrical parameters are guaranteed only over the recommended operating
temperature range.
Item
Rating
Supply Voltage, VDD
7V
All Inputs and Outputs
-0.5 V to VDD+0.5 V
CLKIN and FBIN inputs
-0.5 V to 5.5 V
Electrostatic Discharge (HBM)
2000 V
Ambient Operating Temperature (Commercial)
0 to +70°C
Ambient Operating Temperature (Industrial)
-40 to +85°C
Storage Temperature
-65 to +150°C
Junction Temperature
150°C
Soldering Temperature
260°C
Recommended Operation Conditions
Parameter
Min.
Ambient Operating Temperature (Industrial)
Ambient Operating Temperature (Commercial)
Power Supply Voltage (measured in respect to GND)
Max.
Units
-40
+85
°C
0
+70
°C
+3.0
+3.6
V
3
MDS 2309 D
In te grated Circuit Systems
Typ.
●
5 25 Race Stree t, San Jose, CA 951 26
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ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
DC Electrical Characteristics
ICS2309M-1, VDD = 3.3 V ±10%, Ambient Temperature -40 to +85°C(Industrial), (0-70°C Commercial)
Parameter
Symbol
Conditions
Min.
Operating Voltage
VDD
3.0
Input High Voltage
VIH
2
Input Low Voltage
VIL
Input Low Current
IIL
Input High Current
IIH
Typ.
Max.
Units
3.6
V
V
0.8
V
VIN = 0V
50
µA
VIN = VDD
100
µA
Output High Voltage
VOH
IOH = -12 mA
Output Low Voltage
VOL
IOL = 12 mA
0.4
V
Operating Supply Current
IDD
No Load
32
mA
CLKIN = 0, Note 1
12
µA
Power Down Supply
Current
Short Circuit Current
IOS
Each output
Input Capacitance
CIN
S2, S1, CLKIN
2.4
V
±50
mA
5
pF
Note 1: When there is no clock signal present at CLKIN, the ICS2309 will enter power down mode. The
PLL is stopped and the outputs are tri-state.
AC Electrical Characteristics
ICS2309M-1, VDD=3.3 V ±10%, Ambient temperature -40 to +85°C(Industrial), (0-70°C Commercial),
Parameter
Symbol
Conditions
Min.
Output Clock Frequency
fIN
10 pF load, See table on page 2
10
133
MHz
30 pF load, See table on page 2
10
100
MHz
Output Clock Frequency
Typ.
Max. Units
Output Rise Time
tOR
0.8 to 2.0 V, outputs loaded
2.5
ns
Output Fall Time
tOF
2.0 to 0.8 V, outputs loaded
2.5
ns
Output Clock Duty Cycle
tDC
measured at 1.4V, Fout=66.67
MHz
40
50
60
%
Output Clock Duty Cycle
tDC
measured at 1.4V, Fout=50
MHz
45
50
55
%
Device to Device Skew
rising edges at VDD/2
700
ps
Output to Output Skew
rising edges at VDD/2
250
ps
Input to Output Skew
rising edges at VDD/2
±350
ns
Input to Output Skew
rising edges at VDD/2, S2= 1,
S1 = 0
8.7
ns
Cycle to Cycle Jitter
measured at 66.67M, outputs
loaded
200
ps
PLL Lock Time
Note 2
1.0
ms
1
5
Note 2: With VDD at a steady rate and valid input at CLKIN
4
MDS 2309 D
In te grated Circuit Systems
●
5 25 Race Stree t, San Jose, CA 951 26
Revision 052405
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ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
ICS2309M-1H, VDD=3.3 V ±10%, Ambient temperature -40 to +85°C(Industrial), (0-70°C Commercial),
Parameter
Symbol
Conditions
Min.
Output Clock Frequency
fIN
10 pF load, See table on page 2
10
133
MHz
30 pF load, See table on page 2
10
100
MHz
Output Clock Frequency
Typ.
Max. Units
Output Rise Time
tOR
0.8 to 2.0 V, outputs loaded
1.5
ns
Output Fall Time
tOF
2.0 to 0.8 V, outputs loaded
1.5
ns
Output Clock Duty Cycle
tDC
measured at 1.4V, Fout=66.67
MHz
40
50
60
%
Output Clock Duty Cycle
tDC
measured at 1.4V, Fout=50
MHz
45
50
55
%
Device to Device Skew
rising edges at VDD/2
700
ps
Output to Output Skew
rising edges at VDD/2
250
ps
Input to Output Skew
rising edges at VDD/2
±350
ps
Input to Output Skew
rising edges at VDD/2, S2= 1,
S1 = 0
8.7
ns
Cycle to Cycle Jitter
measured at 66.67M, outputs
loaded
200
ps
PLL Lock Time
Note 3
1.0
ms
1
5
Note 3: With VDD at a steady rate and valid input at CLKIN
5
MDS 2309 D
In te grated Circuit Systems
●
5 25 Race Stree t, San Jose, CA 951 26
Revision 052405
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ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Package Outline and Package Dimensions (16-pin TSSOP, 4.40 mm Body, 0.65 mm Pitch)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
16
Symbol
E1
A
A1
A2
b
C
D
E
E1
e
L
α
E
INDEX
AREA
1 2
D
A
2
Min
Inches
Max
-1.20
0.05
0.15
0.80
1.05
0.19
0.30
0.09
0.20
4.90
5.1
6.40 BASIC
4.30
4.50
0.65 Basic
0.45
0.75
0°
8°
Min
Max
-0.047
0.002
0.006
0.032
0.041
0.007
0.012
0.0035 0.008
0.193
0.201
0.252 BASIC
0.169
0.177
0.0256 Basic
0.018
0.030
0°
8°
A
A
1
c
-Ce
SEATING
PLANE
b
L
.10 (.004)
C
Thermal Characteristics for 16TSSOP
Parameter
Thermal Resistance Junction to
Ambient
Thermal Resistance Junction to Case
Conditions
Min.
Typ.
Max. Units
θJA
Still air
78
°C/W
θJA
1 m/s air flow
70
°C/W
θJA
3 m/s air flow
68
°C/W
37
°C/W
θJC
6
MDS 2309 D
In te grated Circuit Systems
Symbol
●
5 25 Race Stree t, San Jose, CA 951 26
Revision 052405
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ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Package Outline and Package Dimensions (16-pin SOIC, 150 Mil. Narrow Body)
Package dimensions are kept current with JEDEC Publication No. 95
Millimeters
16
Symbol
E
Min
A
A1
B
C
D
E
e
H
h
L
α
H
INDEX
AREA
1 2
D
A
Inches
Max
Min
1.35
1.75
0.10
0.25
0.33
0.51
0.19
0.25
9.80
10.00
3.80
4.00
1.27 BASIC
5.80
6.20
0.25
0.50
0.40
1.27
0°
8°
Max
.0532
.0688
.0040
.0098
.013
.020
.0075
.0098
.3859
.3937
.1497
.1574
0.050 BASIC
.2284
.2440
.010
.020
.016
.050
0°
8°
h x 45
A1
C
-Ce
SEATING
PLANE
B
L
.10 (.004)
C
Thermal Characteristics for 16SOIC
Parameter
Thermal Resistance Junction to
Ambient
Thermal Resistance Junction to Case
Conditions
Min.
Typ.
Max. Units
θJA
Still air
120
°C/W
θJA
1 m/s air flow
115
°C/W
θJA
3 m/s air flow
105
°C/W
58
°C/W
θJC
7
MDS 2309 D
In te grated Circuit Systems
Symbol
●
5 25 Race Stree t, San Jose, CA 951 26
Revision 052405
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ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Ordering Information
Part / Order Number
Marking
Shipping Packaging
Package
Temperature
ICS2309MI-1
ICS2309MI-1T
ICS2309M-1
ICS2309M-1T
ICS2309MI-1H
ICS2309MI-1HT
ICS2309M-1H
ICS2309M-1HT
ICS2309GI-1H
ICS2309GI-1HT
ICS2309GI-1HLF
ICS2309GI-1HLFT
ICS2309G-1H
ICS2309G-1HT
ICS2309G-1HLF
ICS2309G-1HLFT
ICS2309MI-1
ICS2309MI-1
ICS2309M-1
ICS2309M-1
ICS2309MI-1H
ICS2309MI-1H
ICS2309M-1H
ICS2309M-1H
2309GI1H
2309GI1H
309GI1HL
309GI1HL
2309G-1H
2309G-1H
2309G1HL
2309G1HL
Tubes
Tape and Reel
Tubes
Tape and Reel
Tubes
Tape and Reel
Tubes
Tape and Reel
Tubes
Tape and Reel
Tubes
Tape and Reel
Tubes
Tape and Reel
Tubes
Tape and Reel
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin SOIC
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
16-pin TSSOP
-40 to +85° C
-40 to +85° C
0 to +70° C
0 to +70° C
-40 to +85° C
-40 to +85° C
0 to +70° C
0 to +70° C
-40 to +85° C
-40 to +85° C
-40 to +85° C
-40 to +85° C
0 to +70° C
0 to +70° C
0 to +70° C
0 to +70° C
Parts that are ordered with a "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no
responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other
circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as
those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without
additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant
any ICS product for use in life support devices or critical medical instruments.
8
MDS 2309 D
In te grated Circuit Systems
●
5 25 Race Stree t, San Jose, CA 951 26
Revision 052405
●
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●
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ICS2309
3.3 VOLT ZERO DELAY, LOW SKEW BUFFER
Revision History
Rev.
Originator
Date
Description of Change
A
P. Griffith
12/01/04
New device/datasheet; Prelminary.
B
P. Griffith
12/27/04
Add TSSOP package. Made corrections to IDD, IDDP, input capacitance and duty cycle
specs/test conditions. Removed jitter specs for CL=15 pF. Added I/O skew spec for
bypass mode and duty cycle spec for Fout=50 MHz.
C
P. Griffith
1/25/05
Made corrections to test conditions for output rise time, fall time, duty cycle and
cycle-to-cycle jitter. Moved from Preliminary to Final.
D
P. Griffith
5/24/05
Added LF ordering info to 16-pin TSSOP (-1H version only); added Thermal Chars for
16-pin TSSOP package
9
MDS 2309 D
In te grated Circuit Systems
●
5 25 Race Stree t, San Jose, CA 951 26
Revision 052405
●
te l (40 8) 2 97-12 01
●
www.icst.com