MK1707D Low EMI Clock Generator Description Features The MK1707D generates a low EMI output clock from a crystal clock input. The part is designed to dither the LCD interface clock for flat panel graphics controllers. The device uses ICS’ proprietary mix of analog and digital Phase-Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB. • • • • • Packaged in 8-pin SOIC Available in Pb (lead) free package Provides a spread spectrum output clock Supports flat panel controllers Accepts a crystal or clock input to provide same frequency dithered output • Input operating frequencies of 25-54 and 50-108 The MK1707D offers centered spread from a wide range of input clock frequencies. MHz • Peak reduction by 7dB to 14dB typical on 3rd through ICS offers many other clocks for computers and computer peripherals. Consult ICS when you need to replace multiple crystals and oscillators from your board. 19th odd harmonics • • • • • Low EMI feature can be disabled Includes power down Operating voltage of 3.3 V Industrial temperature range available Advanced, low-power CMOS process Block Diagram VDD S1:0 2 Low EMI Enable PLL Clock Synthesis and Spread Spectrum Circuitry X1/ICLK Clock Out Input Buffer X2 Load capacitors required for crystal input 1 MDS 1707D F Integrated Circuit Systems, Inc. GND ● 525 Race Street, San Jose, CA 95126 Revision 102804 ● tel (408) 297-1201 ● www.icst.com MK1707D Low EMI Clock Generator Pin Assignment Spread Selection Table (MHz) X1/ICLK 1 8 X2 VDD 2 7 S1 GND 3 6 S0 CLK 4 5 LEE 8 pin (150 mil) SOIC S1 Pin 7 S0 Pin 6 Spread Direction Spread (%) Input Frequency 0 0 0 1 1 1 0 M 1 0 M 1 Center Center Center Center Center Center ±1.15 ±0.95 ±1.9 ±1.6 ±1.9 ±0.6 25-54 25-54 50-108 25-54 25-54 50-108 0 = connect to GND M = unconnected (floating) has internal resistor network Leave it open (unconnected) 1 = connect to VDD Pin Descriptions Pin Number Pin Name Pin Type 1 X1/ICLK Input Crystal connection. Connect crystal or clock input. 2 VDD Power Connect to +3.3 V. 3 GND Power Connect to ground. 4 CLK Output Spread spectrum clock output per table above. 5 LEE Input Low EMI enable. Turns on spread spectrum when high. Internal pull-up resistor. Disables the spread spectrum feature when low. 6 S0 Input Function select input. Selects spread amount and direction per table above. Internal mid-level. 7 S1 Input Function select 1 input. Selects spread amount and direction per table above. Internal mid-level. 8 X2 XO Crystal connection. Leave unconnected for clock input. 2 MDS 1707D F Integrated Circuit Systems, Inc. Pin Description ● 525 Race Street, San Jose, CA 95126 Revision 102804 ● tel (408) 297-1201 ● www.icst.com MK1707D Low EMI Clock Generator External Components PCB layout Recommendations The MK1707D requires a minimum number of external components for proper operation. For optimum device performance and lowest output phase noise, the following guidelines should be observed. Decoupling Capacitor A decoupling capacitor of 0.01µF must be connected between VDD and GND on pins 2 and 3, as close to these pins as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit. Series Termination Resistor When the PCB trace between the clock output and the load is over 1 inch, series termination should be used. To series terminate a 50Ω trace (a commonly used trace impedance), place a 33Ω resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20Ω. 1) The 0.01µF decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between the decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. 2) To minimize EMI, the 33Ω series termination resistor (if needed) should be placed close to the clock output. 3) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers. Other signal traces should be routed away from the MK1707D. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. . Select Pin Operation The S1, S0 select pins are 2-level, meaning they have three separate states to make the selections shown in the table on page 2. 3 MDS 1707D F Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 Revision 102804 ● tel (408) 297-1201 ● www.icst.com MK1707D Low EMI Clock Generator Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the MK1707D. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 7V All Inputs and Outputs -0.5 V to VDD+0.5 V Ambient Operating Temperature (commercial) 0 to +70°C Ambient Operating Temperature (industrial) -40 to +85°C Storage Temperature -65 to +150°C Junction Temperature 125°C Soldering Temperature 260°C Recommended Operation Conditions Parameter Min. Ambient Operating Temperature (commercial) Ambient Operating Temperature (industrial) Power Supply Voltage (measured in respect to GND) Typ. Max. Units 0 +70 °C -40 +85 °C +3.465 V +3.135 3.3 DC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature 0 to +70°C Parameter Symbol Conditions Operating Voltage VDD Input Low Voltage VIL S0, S1 pins Input High Voltage VIH S0, S1 pins Supply Current IDD No load, at 3.3 V Input High Voltage VIH LEE pins Input Low Voltage VIL LEE pins Output High Voltage VOH CMOS, IOH = -4 mA Output High Voltage VOH IOH = -12 mA Output Low Voltage VOL IOL = -12 mA Input Capacitance CIN S0, S1, LEE pins Typ. Max. Units 3.135 3.3 3.465 V 0.5 V 2.7 V 20 mA 2.0 V 0.5 ● V VDD-0.4 V 2.4 V 0.4 5 525 Race Street, San Jose, CA 95126 V pF 4 MDS 1707D F Integrated Circuit Systems, Inc. Min. Revision 102804 ● tel (408) 297-1201 ● www.icst.com MK1707D Low EMI Clock Generator 5 MDS 1707D F Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 Revision 102804 ● tel (408) 297-1201 ● www.icst.com MK1707D Low EMI Clock Generator AC Electrical Characteristics Unless stated otherwise, VDD = 3.3 V ±5%, Ambient Temperature 0 to +70° C Parameter Symbol Conditions Min. Input/Output Clock Frequency Typ. Max. Units 25 108 MHz 80 % 60 % Input Clock Duty Cycle Time above VDD/2 20 Output Clock Duty Cycle Time above 1.5 V 40 50 Output Rise Time tOR 0.8 to 2.0 V 1.5 ns Output Fall Time tOF 2.0 to 0.8 V 1.5 ns 7 to 14 dB EMI Peak Frequency Reduction 3rd through 19th odd harmonics Thermal Characteristics Parameter Symbol Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Min. Typ. Max. Units θJA Still air 150 °C/W θJA 1 m/s air flow 140 °C/W θJA 3 m/s air flow 120 °C/W 40 °C/W θJC 6 MDS 1707D F Integrated Circuit Systems, Inc. Conditions ● 525 Race Street, San Jose, CA 95126 Revision 102804 ● tel (408) 297-1201 ● www.icst.com MK1707D Low EMI Clock Generator Package Outline and Package Dimensions (8-pin SOIC, 150 Mil. Body) Package dimensions are kept current with JEDEC Publication No. 95 8 Millimeters Symbol E Min A A1 B C D E e H h L α H INDEX AREA 1 2 D A Inches Max Min 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0° 8° Max .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .1890 .1968 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0° 8° h x 45 A1 C -Ce SEATING PLANE B L .10 (.004) C Ordering Information Part / Order Number Marking Shipping Packaging Package Temperature MK1707D MK1707DTR MK1707DLF MK1707DLFTR MK1707DI MK1707DITR MK1707DILF MK1707DILFTR MK1707D MK1707D 1707DLF 1707DLF 1707DI 1707DI 1707DIL 1707DIL Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel Tubes Tape and Reel 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 0 to +70° C 0 to +70° C 0 to +70° C 0 to +70° C -40 to +85° C -40 to +85° C -40 to +85° C -40 to +85° C “LF” denotes Pb (lead) free packaging. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 7 MDS 1707D F Integrated Circuit Systems, Inc. ● 525 Race Street, San Jose, CA 95126 Revision 102804 ● tel (408) 297-1201 ● www.icst.com