ICS4231-03 Low EMI Clock Generator Description Features The ICS4231-03 generates a low EMI output clock from a clock or crystal input. The device uses ICS’ proprietary mix of analog and digital Phase Locked Loop (PLL) technology to spread the frequency spectrum of the output, thereby reducing the frequency amplitude peaks by several dB. • • • • The ICS4231-03 offers four different center and down spread selections. Refer to the MK1714-01/02 for the widest selection of input frequencies and multipliers. ICS offers a complete line of EMI reducing clock generators. Consult us when you need to remove crystals and oscillators from your board. Pin and function compatible to Cypress W42C31-03 Packaged in 8-pin SOIC (Pb free available) Provides a spread spectrum output clock Accepts a clock or crystal input and provides same frequency dithered output • Input clock frequency of 10 to 33 MHz • Peak reduction by 8dB - 14dB typical on 3rd - 19th odd harmonics • Spread percentage selections of ±1.875%, ±1.0%, and -2.0% • Operating voltage of 5V • Advanced, low-power CMOS process Block Diagram VDD FS1:0 PLL Clock Synthesis and Spread Spectrum Circuitry OE# X1/CLKIN X2 Clock Buffer/ Crystal Oscillator CLK GND MDS 4231-03 A 1 In te grated Circuit Systems ● 5 25 Race Stree t, San Jose, CA 951 26 Revision 110404 ● tel (408) 297-1 201 ● w w w. i c s t . c o m ICS4231-03 LOW EMI CLOCK GENERATOR Pin Assignment Output Enable Function Table X1/CLKIN 1 8 OE# X2 GND 2 3 7 6 FS1 VDD FS0 4 5 CLKOUT OE# (Pin 8) Output Status 0 1 Running Tri-state 0 = connect to GND 1 = connect directly to VDD Note: OE# pin has an internal pull-down resistor 8 pin (150 mil) SOIC Frequency Range and Spread Table FS1 (Pin 7) FS0 (Pin 4) Clock Input Frequency (MHz) Crystal Input Frequency (MHz) Spread Amount 0 0 1 1 0 1 0 1 10-20 10-20 20-33 20-33 10-20 10-20 20-25 20-25 ±1.875% ±1.0% ±1.875% -2.0% Note: FS1:0 have internal pull-up resistors Pin Descriptions Pin Number Pin Name Pin Type 1 X1/CLKIN Input 2 X2 Output Crystal output. Float for a clock input. 3 GND Power Connect to ground. 4 FS0 Input Select pin for input frequency and spread amount. See table above. Internal pull up resistor. 5 CLKOUT Output Spread spectrum clock output per table above. 6 VDD Power Connect to 5V. 7 FS1 Input Select pin for input frequency and spread amount. See table above. Internal pull up resistor. 8 OE# Input Output Enable. Active Low. See table above. Internal pull-down resistor. MDS 4231-03 A Pin Description Crystal or Clock Input. 2 In te grated Circuit Systems ● 5 25 Race Stree t, San Jose, CA 951 26 Revision 110404 ● tel (408) 297-1 201 ● w w w. i c s t . c o m ICS4231-03 LOW EMI CLOCK GENERATOR External Components value of these capacitors is given by the following equation: The ICS4231-03 requires a minimum number of external components for proper operation. PCB Layout Recommendations Decoupling Capacitor A decoupling capacitor of 0.01µF must be connected between VDD and GND on pins 6 and 3, as close to these pins as possible. For optimum device performance, the decoupling capacitor should be mounted on the component side of the PCB. Avoid the use of vias in the decoupling circuit. Series Termination Resistor When the PCB trace between the clock output and the load is over 1 inch, series termination should be used. To series terminate a 50Ω trace (a commonly used trace impedance) place a 33Ω resistor in series with the clock line, as close to the clock output pin as possible. The nominal impedance of the clock output is 20Ω. For optimum device performance and lowest output phase noise, the following guidelines should be observed. 1) The 0.01µF decoupling capacitor should be mounted on the component side of the board as close to the VDD pin as possible. No vias should be used between the decoupling capacitor and VDD pin. The PCB trace to VDD pin should be kept as short as possible, as should the PCB trace to the ground via. 2) To minimize EMI the 33Ω series termination resistor, if needed, should be placed close to the clock output. 3) An optimum layout is one with all components on the same side of the board, minimizing vias through other signal layers. Other signal traces should be routed away from the ICS4231-03. This includes signal traces just underneath the device, or on layers adjacent to the ground plane layer used by the device. Absolute Maximum Ratings Stresses above the ratings listed below can cause permanent damage to the ICS4231-03. These ratings, which are standard values for ICS commercially rated parts, are stress ratings only. Functional operation of the device at these or any other conditions above those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods can affect product reliability. Electrical parameters are guaranteed only over the recommended operating temperature range. Item Rating Supply Voltage, VDD 7V All Inputs and Outputs -0.5V to VDD+0.5V Ambient Operating Temperature 0 to +70°C Storage Temperature -65 to +150°C Junction Temperature 125°C Soldering Temperature 260°C MDS 4231-03 A 3 In te grated Circuit Systems ● 5 25 Race Stree t, San Jose, CA 951 26 Revision 110404 ● tel (408) 297-1 201 ● w w w. i c s t . c o m ICS4231-03 LOW EMI CLOCK GENERATOR DC Electrical Characteristics Unless stated otherwise, VDD = 5V, ±10%, Ambient Temperature 0 to +70°C Parameter Symbol Conditions Min. Typ. Max. Units 4.5 5 5.5 V 18 32 mA Operating Voltage VDD Supply Current IDD Input High Voltage VIH Input Low Voltage VIL Output High Voltage VOH IOH = -24mA Output Low Voltage VOL IOL = 24mA Input Capacitance CIN All pins except X1, X2 5 X1, X2, as seen by the xtal, Note 1 17 pF 20 Ω 500 KΩ No load, at 3.3V 0.7VDD 0.15VDD Load Capacitance Output Impedance V 2.5 V Rout Input Pull-Up Resistor Power-Up Time V First locked clock cycle after Power Good 0.4 V 7 pF 5 ms Note 1: Pins X1 and X2 each have 34 pF capacitance. When used with a crystal, the total combined capacitance as seen by the crystal is 17 pF. If driving X1 with a clock input, the load capacitance will be 34 pF. AC Electrical Characteristics Unless stated otherwise, VDD = 5V±10%, Ambient Temperature 0 to +70° C, CL=15pf Parameter Symbol Input Frequency Conditions Min. Input Clock Output Frequency Typ. Max. Units 10 33 MHz 10 33 MHz 60 % 50 55 % Input Clock Duty Cycle Time above VDD/2 40 Output Clock Duty Cycle Note 1 45 Output Rise Time tOR 0.8 to 2.4V, note 1 2 5 ns Output Fall Time tOF 2.4 to 0.8V, note 1 2 5 ns 300 ps Jitter cycle-to-cycle Harmonic Reduction 8 dB Note 1: Measured with 15pF load MDS 4231-03 A 4 In te grated Circuit Systems ● 5 25 Race Stree t, San Jose, CA 951 26 Revision 110404 ● tel (408) 297-1 201 ● w w w. i c s t . c o m ICS4231-03 LOW EMI CLOCK GENERATOR Thermal Characteristics Parameter Thermal Resistance Junction to Ambient Thermal Resistance Junction to Case Symbol Conditions Min. Typ. Max. Units θJA Still air 150 °C/W θJA 1 m/s air flow 140 °C/W θJA 3 m/s air flow 120 °C/W 40 °C/W θJC Marking Diagram 8 5 4231M-03 ###### YYWW 1 4 Marking Diagram (Pb free) 8 5 4231M03L ###### YYWW 1 4 Notes: 1. ###### is the lot number. 2. YYWW is the last two digits of the year and week that the part was assembled. 3. “L” denotes Pb (lead) free package. 4. Bottom marking: country of origin. MDS 4231-03 A 5 In te grated Circuit Systems ● 5 25 Race Stree t, San Jose, CA 951 26 Revision 110404 ● tel (408) 297-1 201 ● w w w. i c s t . c o m ICS4231-03 LOW EMI CLOCK GENERATOR Package Outline and Package Dimensions (8 pin SOIC, 150 Mil. Body) Package dimensions are kept current with JEDEC Publication No. 95 Millimeters 8 Symbol E Min A A1 B C D E e H h L α H INDEX AREA 1 2 D A Inches Max Min 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 4.80 5.00 3.80 4.00 1.27 BASIC 5.80 6.20 0.25 0.50 0.40 1.27 0° 8° Max .0532 .0688 .0040 .0098 .013 .020 .0075 .0098 .1890 .1968 .1497 .1574 0.050 BASIC .2284 .2440 .010 .020 .016 .050 0° 8° h x 45 A1 C -Ce SEATING PLANE B L .10 (.004) C Ordering Information Part / Order Number ICS4231M-03 ICS4231M-03T ICS4231M-03LF ICS4231M-03LFT Marking see page 5 Shipping packaging Package Temperature Tubes Tape and Reel Tubes Tape and Reel 8-pin SOIC 8-pin SOIC 8-pin SOIC 8-pin SOIC 0 to +70° C 0 to +70° C 0 to +70° C 0 to +70° C “LF” denotes Pb free packaging. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems (ICS) assumes no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. MDS 4231-03 A 6 In te grated Circuit Systems ● 5 25 Race Stree t, San Jose, CA 951 26 Revision 110404 ● tel (408) 297-1 201 ● w w w. i c s t . c o m