INFINEON BTS555

PROFET® Target Data Sheet BTS555
Smart Highside High Current Power Switch
Features
• Overload protection
• Current limitation
• Short circuit protection
• Overtemperature protection
• Overvoltage protection (including load dump)
• Clamp of negative voltage at output
• Fast deenergizing of inductive loads 1)
• Low ohmic inverse current operation
• Reverse battery protection
• Diagnostic feedback with load current sense
• Open load detection via current sense
• Loss of Vbb protection2)
• Electrostatic discharge (ESD) protection
Product Summary
Overvoltage protection
Output clamp
Operating voltage
On-state resistance
Load current (ISO)
Short circuit current limitation
Current sense ratio
Vbb(AZ)
63
V
VON(CL)
42 V
Vbb(on) 5.0 ... 34 V
RON
2.9 mΩ
IL(ISO)
132
A
IL(SCp)
400
A
IL : IIS
25 000
TO-218AB/5
Application
• Power switch with current sense diagnostic
feedback for 12 V and 24 V DC grounded loads
• Most suitable for loads with high inrush current
like lamps and motors; all types of resistive and
inductive loads
• Replaces electromechanical relays, fuses and discrete circuits
5
1
Straight leads
General Description
N channel vertical power FET with charge pump, current controlled input and diagnostic feedback with load
current sense, integrated in Smart SIPMOS chip on chip technology. Fully protected by embedded protection
functions.
3 & Tab
Voltage
source
Voltage
sensor
Overvoltage
Current
Gate
protection
limit
protection
Charge pump
Level shifter
Rectifier
2
IN
Logic
ESD
I IN
+ V bb
R bb
OUT
Limit for
unclamped
ind. loads
Output
Voltage
detection
1, 5
IL
Current
Sense
Load
Temperature
sensor
IS

PROFET
I IS
Load GND
4
VIN
VIS
R
IS
Logic GND
1)
2)
With additional external diode.
Additional external diode required for energized inductive loads (see page9).
Semiconductor Group
Page 1 of 16
1998-Jan-14
Target Data Sheet BTS555
Pin
Symbol
Function
1
OUT
O
Output to the load. The pins 1 and 5 must be shorted with each other
especially in high current applications!3)
2
IN
I
Input, activates the power switch in case of short to ground
3
Vbb
+
Positive power supply voltage, the tab is electrically connected to this pin.
In high current applications the tab should be used for the Vbb connection
instead of this pin4).
4
IS
S
Diagnostic feedback providing a sense current proportional to the load
current; zero current on failure (see Truth Table on page 7)
5
OUT
O
Output to the load. The pins 1 and 5 must be shorted with each other
especially in high current applications!3)
Maximum Ratings at Tj = 25 °C unless otherwise specified
Parameter
Supply voltage (overvoltage protection see page 4)
Supply voltage for full short circuit protection,
resistive load or L < tbd µH
Tj,start =-40 ...+150°C:
Load current (short circuit current, see page 5)
Load dump protection VLoadDump = UA + Vs, UA = 13.5 V
RI5) = 2 Ω, RL = 0.1 Ω, td = 200 ms,
IN, IS = open or grounded
Operating temperature range
Storage temperature range
Power dissipation (DC), T C ≤ 25 °C
Inductive load switch-off energy dissipation, single pulse
Vbb = 12V, Tj,start = 150°C, TC = 150°C const.,
IL = tbd (>=20) A, ZL = tbd mH, 0 Ω, see diagrams on
Symbol
Vbb
Vbb
42
34
Unit
V
V
self-limited
A
80
V
Tj
Tstg
Ptot
-40 ...+150
-55 ...+150
310
°C
EAS
tbd
J
Electrostatic discharge capability (ESD)
VESD
2.0
kV
+15 , -250
+15 , -250
mA
IL
VLoad dump6)
Values
W
page 10
Human Body Model acc. MIL-STD883D, method 3015.7 and ESD
assn. std. S5.1-1993, C = 100 pF, R = 1.5 kΩ
Current through input pin (DC)
Current through current sense status pin (DC)
IIN
IIS
see internal circuit diagrams on page 8
3)
4)
5)
6)
Not shorting all outputs will considerably increase the on-state resistance, reduce the peak current
capability and decrease the current sense accuracy
Otherwise add up to 0.5 mΩ (depending on used length of the pin) to the RON if the pin is used instead of
the tab.
RI = internal resistance of the load dump test pulse generator.
VLoad dump is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839.
Semiconductor Group
Page 2
1998-Jan-14
Target Data Sheet BTS555
Thermal Characteristics
Parameter and Conditions
Thermal resistance
Symbol
chip - case: RthJC7)
junction - ambient (free air): RthJA
Values
typ
max
-- 0.40
30
--
Unit
Values
min
typ
max
Unit
min
---
K/W
Electrical Characteristics
Parameter and Conditions
Symbol
at Tj = -40 ... +150 °C, Vbb = 12 V unless otherwise specified
Load Switching Capabilities and Characteristics
On-state resistance (Tab to pins 1,5, see measurement
IL = tbd (>=20) A, Tj = 25 °C:
circuit page 8)
VIN = 0, IL = tbd (>=20) A, Tj = 150 °C:
IL = tbd A, Tj = 150 °C:
8
)
Vbb = tbd V , IL = tbd A, Tj = 150 °C:
Nominal load current 9) (Tab to pins 1,5)
ISO 10483-1/6.7: VON = 0.5 V, Tc = 85 °C 10)
Maximum load current in resistive range
(Tab to pins 1,5)
VON = 1.8 V, Tc = 25 °C:
see diagram on page 13
VON = 1.8 V, Tc = 150 °C:
11
)
Turn-on time
IIN
to 90% VOUT:
Turn-off time
IIN
to 10% VOUT:
RL = 1 Ω , Tj =-40...+150°C
Slew rate on 11) (10 to 30% VOUT )
RL = 1 Ω
Slew rate off 11) (70 to 40% VOUT )
RL = 1 Ω
Inverse Load Current Operation
On-state resistance (Pins 1,5 to pin 3)
VbIN = 12 V, IL = - tbd (>=20) A
RON
RON(Static)
IL(ISO)
-111
2.4
4.6
tbd
tbd
132
IL(Max)
tbd
tbd
130
60
-----
--550
240
dV/dton
--
0.8
--
V/µs
-dV/dtoff
--
0.8
--
V/µs
--
2.9
5.7
--
mΩ
111
2.4
4.6
132
--
tbd
--
mV
ton
toff
Tj = 25 °C: RON(inv)
see diagram on page 10
Tj = 150 °C:
Nominal inverse load current (Pins 1,5 to Tab)
IL(inv)
10
VON = -0.5 V, Tc = 85 °C
Drain-source diode voltage (Vout > Vbb)
-VON
IL = - tbd (>=20) A, IIN = 0, Tj = +150°C
--
2.9
5.7
tbd
tbd
--
mΩ
A
A
µs
A
7)
Thermal resistance RthCH case to heatsink (about 0.25 K/W with silicone paste) not included!
Decrease of Vbb below 10 V causes slowly a dynamic increase of RON to a higher value of RON(Static). As
long as VbIN > VbIN(u) max, RON increase is less than 10 % per second for TJ < 85 °C.
9) Not tested, specified by design.
10) T is about 105°C under these conditions.
J
11) See timing diagram on page 14.
8)
Semiconductor Group
Page 3
1998-Jan-14
Target Data Sheet BTS555
Parameter and Conditions
Symbol
at Tj = -40 ... +150 °C, Vbb = 12 V unless otherwise specified
Values
min
typ
max
Operating Parameters
Operating voltage ( VIN = 0) Fehler! Textmarke nicht definiert., Vbb(on)
5.0
--
34
V
--
3.5
4.5
V
-60
62
---
5
-66
15
25
6.5
--25
60
V
V
-tbd
tbd
460
400
280
-tbd
tbd
A
80
--
300
µs
---
15
17
---
V
VON(CL)
39
42
46
V
VON(SC)
--
6
--
V
12)
Undervoltage shutdown 13)
Undervoltage start of charge pump
see diagram page 15
Overvoltage protection 14)
Tj =-40°C:
Ibb = 15 mA
Tj = 25...+150°C:
Standby current
Tj =-40...+25°C:
IIN = 0
Tj = 150°C:
VbIN(u)
VbIN(ucp)
VbIN(Z)
Ibb(off)
Unit
µA
Protection Functions
Short circuit current limit (Tab to pins 1,5)
VON = 12 V, time until shutdown max. 300 µs
Tc =-40°C: IL(SCp)
Tc =25°C:
Tc =+150°C:
Short circuit shutdown delay after input current
positive slope, VON > VON(SC)
td(SC)
min. value valid only if input "off-signal" time exceeds 30 µs
Output clamp 15)
(inductive load switch off)
IL= 40 mA: -VOUT(CL)
IL= 20 A:
Output clamp (inductive load switch off)
at VOUT = Vbb - VON(CL) (e.g. overvoltage)
IL= 40 mA
Short circuit shutdown detection voltage
(pin 3 to pins 1,5)
12)
For all voltages 0 ... 34 V the device is fully protected against overtemperature and short circuit.
VbIN = Vbb - VIN see diagram on page 8. When VbIN increases from less than VbIN(u) up to VbIN(ucp) = 5 V
(typ.) the charge pump is not active and VOUT ≈Vbb - 3 V.
14) See also V
ON(CL) in circuit diagram on page 9.
15) This output clamp can be "switched off" by using an additional diode at the IS-Pin (see page 8). If the diode
is used, VOUT is clamped to Vbb- VON(CL) at inductive load switch off.
13)
Semiconductor Group
Page 4
1998-Jan-14
Target Data Sheet BTS555
Parameter and Conditions
Symbol
Values
min
typ
max
Tjt
∆Tjt
150
--
-10
---
°C
K
--
--
16
V
--
2.8
0
tbd
0
mΩ
Rbb
--
120
--
Ω
-40°C: kILIS
25°C:
150°C:
----40°C:
±4.5%
±8.9%
±15%
±46%
26 530
25 430
23 520
+25°C:
±4.2%
±7.5%
±12%
±36%
---150°C:
±4.0%
±6.1%
±9.0%
±24%
--
0
--
6.5
--
--
mA
---
-2
0.5
--
µA
--
tbd
500
µs
--
tbd
500
µs
--
tbd
500
60
62
-66
---
µs
V
at Tj = -40 ... +150 °C, Vbb = 12 V unless otherwise specified
Thermal overload trip temperature
Thermal hysteresis
Reverse Battery
Reverse battery voltage 16)
-Vbb
On-state resistance (Pins 1,5 to pin 3)
Tj = 25 °C: RON(rev)
Vbb = -12V, VIN = 0, IL = - tbd (>=20) A, RIS = 1 kΩTj =
150 °C:
Integrated resistor in V bb line
Diagnostic Characteristics
Current sense ratio, static on-condition,
kILIS = IL : IIS, VON < 1.5 V17),
VIS <VOUT - 5 ??? V, VbIN > 4.5 V
IL = 180 A:
IL = 50 A:
IL = 25 A:
IL = 10 A:
IIN = 0 (e.g. during deenergizing of inductive loads):
see diagram on page 12
IIS,lim
Sense current saturation
Unit
Current sense leakage current
IIN = 0, VIS = 0: IIS(LL)
VIN = 0, VIS = 0, IL ≤ 0: IIS(LH)
Current sense settling time 18) after positive input
slope (90% of IIS static)
IL = 0 / tbd (>=20) A: tson(IS)
18)
Current sense settling time after negative input
slope (10% of IIS static)
IL = tbd (>=20) / 0 A: tsoff(IS)
18)
Current sense settling time after change of load
current (60% to 90%)
IL = 15 / tbd (>=20) A: tslc(IS)
Overvoltage protection
Tj =-40°C: VbIS(Z)
Ibb = 15 mA
Tj = 25...+150°C:
16)
The reverse load current through the intrinsic drain-source diode has to be limited by the connected load
(as it is done with all polarity symmetric loads). Note that under off-conditions (I IN = I IS = 0) the power
transistor is not activated. This results in raised power dissipation due to the higher voltage drop across the
intrinsic drain-source diode. The temperature protection is not active during reverse current operation!
Increasing reverse battery voltage capability is simply possible as described on page 9.
17) If V
ON is higher, the sense current is no longer proportional to the load current due to sense current
saturation, see IIS,lim .
18) Not tested, specified by design.
Semiconductor Group
Page 5
1998-Jan-14
Target Data Sheet BTS555
Parameter and Conditions
Symbol
at Tj = -40 ... +150 °C, Vbb = 12 V unless otherwise specified
Input
Input and operating current (see diagram page 13) IIN(on)
Values
min
typ
max
Unit
--
1
2
mA
--
--
80
µA
IN grounded (VIN = 0)
IIN(off)
Input current for turn-off 19)
Truth Table
Normal
operation
Very high
load current
Currentlimitation
Short circuit to
GND
Overtemperature
Short circuit to
Vbb
Open load
Negative output
voltage clamp
Inverse load
current
Input
current
Output
Current
Sense
level
level
IIS
L
H
L
H
0
nominal
H
H
IIS, lim
H
H
0
L
H
L
H
L
H
L
H
L
L
L
L
L
H
H
Z21)
H
L
L
H
H
H
0
0
0
0
0
<nominal
0
0
0
Remark
=IL / kilis, up to I IS=IIS,lim
up to V ON=VON(Fold back)
IIS no longer proportional to I L
VON > VON(Fold back)
if VON>VON(SC), shutdown will occure
20)
0
0
L = "Low" Level
H = "High" Level
Overtemperature reset via input: IIN=low and Tj < Tjt (see diagram on page Fehler! Textmarke nicht
definiert.)
Short circuit to GND: Shutdown remains latched until next reset via input (see diagram on page 14)
19)
We recommend the resistance between IN and GND to be less than 0.5 kΩ for turn-on and more than
500kΩ for turn-off. Consider that when the device is switched off (IIN = 0) the voltage between IN and GND
reaches almost Vbb.
20) Low ohmic short to V may reduce the output current I and can thus be detected via the sense current I .
bb
L
IS
21) Power Transistor "OFF", potential defined by external impedance.
Semiconductor Group
Page 6
1998-Jan-14
Target Data Sheet BTS555
Current sense status output
Terms
I bb
Vbb
3
VbIN
R bb
V
VON
Vbb
Z,IS
ZD
IL
V
2
bb
IN
RIN
V
I IS
1,5
PROFET
R
IS
VbIS
IN
IS
OUT
I IN
4
IS
I IS
DS
VIS
VIS
VOUT
R IS
Two or more devices can easily be connected in
parallel to increase load current capability.
RON measurement layout
≤ 5.5 mm
VZ,IS = 66 V (typ.), RIS = 1 kΩ nominal (or 1 kΩ /n, if n
devices are connected in parallel). IS = IL/kilis can be
only driven by the internal circuit as long as Vout - VIS >
5 ??? V. If you want to measure load currents up to
Vbb - 5 ??? V
IL(M), RIS should be less than
.
IL(M) / Kilis
Note: For large values of RIS the voltage VIS can
reach almost Vbb. See also overvoltage protection.
If you don’t use the current sense output in your
application, you can leave it open.
Short circuit detection
Fault Condition: VON > VON(SC) (6 V typ.) and t> t d(SC)
(80 ...300 µs).
Vbb force contacts
+ Vbb
Out Force Sense
contacts
contacts
(both out
pins parallel)
VON
OUT
Input circuit (ESD protection)
Logic
unit
V bb
ZD
V
Short circuit
detection
Inductive and overvoltage output clamp
R bb
+ Vbb
Z,IN
V bIN
VZ1
IN
I
VON
IN
VZG
OUT
PROFET
V IN
IS
When the device is switched off (IIN = 0) the voltage
between IN and GND reaches almost Vbb. Use a
mechanical switch, a bipolar or MOS transistor with
appropriate breakdown voltage as driver.
VZ,IN = 66 V (typ).
Semiconductor Group
DS
VOUT
VON is clamped to VON(Cl) = 42 V typ. At inductive load
switch-off without DS, VOUT is clamped to VOUT(CL) =
-15 V typ. via VZG. With DS, VOUT is clamped to Vbb VON(CL) via VZ1. Using DS gives faster deenergizing of
Page 7
1998-Jan-14
Target Data Sheet BTS555
the inductive load, but higher peak power dissipation in Vbb disconnect with energized inductive
the PROFET.
load
Overvoltage protection of logic part
+ Vbb
V
R IN
Z,IN
V
R bb
Z,IS
Provide a current path with load current capability by
using a diode, a Z-diode, or a varistor. (VZL < 72 V or
VZb < 30 V if RIN=0). For higher clamp voltages
currents at IN and IS have to be limited to 250 mA.
Version a:
IN
Logic
V
V OUT
bb
V
PROFET
IS
R IS
IN
PROFET
V Z,VIS
RV
bb
OUT
IS
Signal GND
Rbb = 120 Ω typ., VZ,IN = VZ,IS = 66 V typ., RIS = 1 kΩ
nominal. Note that when overvoltage exceeds 71 V typ.
a voltage above 5V can occur between IS and GND, if
RV, VZ,VIS are not used.
Version b:
V ZL
Reverse battery protection
- V bb
V
Vbb
bb
Rbb
IN
PROFET
OUT
IN
IS
OUT
R IN
Power
Transistor
Logic
VZb
IS
DS
D
RIS
Signal GND
RL
Note that there is no reverse battery protection when
using a diode without additional Z-diode VZL, VZb.
RV
Power GND
RV ≥ 1 kΩ, RIS = 1 kΩ nominal. Add RIN for reverse
battery protection in applications with Vbb above
1
1
1
16 V16); recommended value:
+
+
=
RIN RIS RV
0.1A
1
0.1A
if DS is not used (or
=
if DS
RIN |Vbb| - 12V
|Vbb| - 12V
is used).
To minimize power dissipation at reverse battery
operation, the summarized current into the IN and IS
pin should be about 120mA. The current can be
provided by using a small signal diode D in parallel to
the input switch, by using a MOSFET input switch or
by proper adjusting the current through RIS and RV.
Semiconductor Group
Version c: Sometimes a neccessary voltage clamp is
given by non inductive loads RL connected to the
same switch and eliminates the need of clamping
circuit:
Page 8
V
Vbb
bb
IN
PROFET
RL
OUT
IS
1998-Jan-14
Target Data Sheet BTS555
Energy stored in load inductance:
Inverse load current operation
2
EL = 1/2·L·I L
While demagnetizing load inductance, the energy
dissipated in PROFET is
Vbb
V bb
- IL
IN
+
PROFET
IS
-
EAS= Ebb + EL - ER= ∫ VON(CL)·iL(t) dt,
OUT
VOUT +
with an approximate solution for RL > 0 Ω:
EAS=
IIS
VIN
IL· L
IL·RL
(
Vbb + |VOUT(CL)|) ln (1+
)
2·RL
|VOUT(CL)|
-
V IS
R IS
The device is specified for inverse load current
operation (VOUT > Vbb > 0V). The current sense
feature is not available during this kind of operation (IIS
= 0). With IIN = 0 (e.g. input open) only the intrinsic
drain source diode is conducting resulting in considerably increased power dissipation. If the device is
switched on (VIN = 0), this power dissipation is
decreased to the much lower value RON(INV) * I2
(specifications see page 4).
Note: Temperature protection during inverse load
current operation is not possible!
Maximum allowable load inductance for
a single switch off
L = f (I L ); Tj,start = 150°C, Vbb = 12 V, RL = 0 Ω
L [mH]
10000
Inductive load switch-off energy
dissipation
1000
100
E bb
E AS
V
ELoad
10
bb
i L(t)
V bb
IN
PROFET
OUT
IS
I
IN
Semiconductor Group
RIS
ZL
{
L
EL
1
0
RL
ER
Page 9
2.5
5
7.5
10
12.5
15
IL [A]
1998-Jan-14
Target Data Sheet BTS555
Options Overview
Type
BTS
550P 555
650P
Overtemperature protection with hysteresis
Tj >150 °C, latch function 22)
Tj >150 °C, with auto-restart on cooling
Short circuit to GND protection
X
switches off when VON>6 V typ.
(when first turned on after approx. 180 µs)
X
X
Overvoltage shutdown
-
-
X
X23)
X
X23)
X
X
X
Output negative voltage transient limit
to Vbb - VON(CL)
to VOUT = -15 V typ
22)
Latch except when Vbb -VOUT < VON(SC) after shutdown. In most cases VOUT = 0 V after shutdown (VOUT
≠ 0 V only if forced externally). So the device remains latched unless Vbb < VON(SC) (see page 5). No latch
between turn on and td(SC).
23) Can be "switched off" by using a diode D (see page 8) or leaving open the current sense output.
S
Semiconductor Group
Page 10
1998-Jan-14
Target Data Sheet BTS555
Characteristics
Current sense versus load current:
IIS = f(IL)
IIS [mA]
6
Current sense ratio:
KILIS = f(IL), TJ = 25 °C
kilis
35000
33000
5
31000
29000
4
max
max
27000
typ
3
25000
min
min
23000
2
21000
19000
1
17000
0
15000
0
50
100
150
200
0
50
100
150
IL [A]
Current sense ratio:
KILIS = f(IL), TJ = -40 °C
kilis
IL [A]
Current sense ratio:
KILIS = f(IL), TJ = 150 °C
kilis
35000
35000
33000
33000
31000
31000
29000
29000
max
typ
27000
200
27000
25000
max
25000
typ
min
23000
23000
21000
21000
19000
19000
17000
17000
15000
min
15000
0
50
100
150
200
IL [A]
Semiconductor Group
Page 11
0
50
100
150
200
IL [A]
1998-Jan-14
Target Data Sheet BTS555
Typ. current limitation characteristic
IL = f (VON, T j )
Typ. input current
IIN = f (VbIN), VbIN = Vbb - VIN
IIN [mA]
IL [A]
1000
1.6
900
1.4
800
1.2
700
VON>VON(SC) only for t < td(SC)
600
1
(otherwise immediate shutdown)
0.8
500
Tj = -40°C
400
25°C
0.6
150°C
0.4
85°C
300
200
0.2
100
0
0
0
0 VON(FB) 5)ROG%DFN 10
15
20
40
60
80
20
VON [V]
VbIN [V]
In case of VON > VON(SC) (typ. 6 V) the device will be
switched off by internal short circuit detection.
Typ. on-state resistance
RON = f (Vbb, T j ); IL = tbd (>=20) A; VIN = 0
RON [mOhm]
7
static
dynamic
6
5
Tj = 150°C
4
85°C
3
25°C
2
-40°C
1
0
0
5
10
15
40
20
Vbb [V]
Semiconductor Group
Page 12
1998-Jan-14
Target Data Sheet BTS555
Timing diagrams
Figure 2b: Switching an inductive load:
Figure 1a: Switching a resistive load,
change of load current in on-condition:
IIN
IIN
VOUT
dV/dtoff
VOUT
90%
t on
dV/dton
t off
10%
IL
tslc(IS)
Load 1
IIS
IL
t slc(IS)
Load 2
IIS
t
tson(IS)
t
t soff(IS)
The sense signal is not valid during a settling time
after turn-on/off and after change of load current.
Figure 3a: Short circuit:
shut down by short circuit detection, reset by IIN = 0.
Figure 2a: Switching motors and lamps:
IIN
IIN
IL
IL(SCp)
VOUT
td(SC)
IIL
IIS
VOUT>>0
VOUT=0
t
IIS
t
Shut down remains latched until next reset via input.
Sense current saturation can occur at very high
inrush currents (see IIS,lim on page 6).
Semiconductor Group
Page 13
1998-Jan-14
Target Data Sheet BTS555
Figure 4a: Overtemperature,
Reset if (IIN=low) and (Tj<Tjt)
I IN
IS
V
OUT
T
J
t
Figure 6a: Undervoltage restart of charge pump,
overvoltage clamp
VOUT
12
10
VIN = 0
VON(CL
8
dynamic, short
Undervoltage
not below
VbIN(u)
6
4
IIN = 0
2
VON(CL)
0
0
VbIN(u)
2
4
Semiconductor Group
V6bIN(ucp)8
10
12
Page 14
1998-Jan-14
Target Data Sheet BTS555
Package and Ordering Code
All dimensions in mm
TO-218AB/5 Option E3146 Ordering code
BTS555 E3146
Q67060-S6953A3
Published by Siemens AG, Bereich Halbleiter Vetrieb, Werbung,
Balanstraße 73, D-81541 München
 Siemens AG 1998. All Rights Reserved
Attention please!
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design reserved. For questions on technology, delivery and prices
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Semiconductor Group
Page 15
1998-Jan-14