INTEGRAL IW4042B

IW4042B
QUAD CLOCKED «D» LATCH
High-Voltage Silicon-Gate CMOS
CD4042B types contain four latch circuits, each strobed by a
common clock. Complementary buffered outputs are available
from each circuit. The impedance of the n- and p-channel output
devices is balanced and all outputs are electrically identical.
Information present at the data input is transferred to outputs Q
and Q during the CLOCK level which is programmed by the
POLARITY input. For POLARITY = 0 the transfer occurs during
the 0 CLOCK level and for POLARITY = 1 the transfer occurs
during the 1 CLOCK level. The outputs follow the data input
providing the CLOCK and POLARITY levels defined above are
present. When a CLOCK transition occurs (positive for
POLARITY = 0 and negative for POLARTY = 1) the information
present at the input during the CLOCK transition is retained at
ORDERING INFORMATION
the outputs until an opposite CLOCK transition occurs.
IW4042BN Plastic
The CD4042B types are supplied in 16-lead hermetic dual-inIW4042BD SOIC
line ceramic packages (D and F suffixes); 16-lead dual-in-line
T
=
-55° to 125° C for all
A
plastic package (E suffix), and in chip form (H suffix).
packages
• Operating Voltage Range: 3.0 to 18 V
• Maximum input current of 1 µA at 18 V over full packagetemperature range; 100 nA at 18 V and 25°C
• Noise margin (over full package temperature range):
1.0 V min @ 5.0 V supply
PIN ASSIGNMENT
2.0 V min @ 10.0 V supply
2.5 V min @ 15.0 V supply
Q4
1
16 VCC
LOGIC DIAGRAM
Q1
2
15
Q4
Q1
3
14
D4
D1
4
13
D3
CLOCK
5
12
Q3
POLARITY
6
11
Q3
D2
7
10
Q2
GND
8
9
Q2
FUNCTION TABLE
Inputs
Outputs
Clock
Polarity
Q
0
0
D
1
0
Latch
1
1
D
0
1
Latch
PIN 16 =VCC
PIN 8 = GND
1
IW4042B
MAXIMUM RATINGS*
Symbol
Parameter
Value
Unit
VCC
DC Supply Voltage (Referenced to GND)
-0.5 to +20
V
VI
DC Input Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
VOUT
DC Output Voltage (Referenced to GND)
-0.5 to VCC +0.5
V
II
DC Input Current, per Pin
mA
±10
PD
Power Dissipation in Still Air, Plastic DIP+
750
mW
SOIC Package+
500
Ptot r Dissipation per Output Transistor
100
mW
Tstg
Storage Temperature
-65 to +150
°C
260
TL
Lead Temperature, 1 mm from Case for 10
°C
Seconds
(Plastic DIP or SOIC Package)
*
Maximum Ratings are those values beyond which damage to the device may occur.
Functional operation should be restricted to the Recommended Operating Conditions.
+Derating - Plastic DIP: - 10 mW/°C from 65° to 125°C
SOIC Package: : - 7 mW/°C from 65° to 125°C
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
VCC
DC Supply Voltage (Referenced to GND)
VI, VOUT
DC Input Voltage, Output Voltage (Referenced to
GND)
TA
Operating Temperature, All Package Types
Min
3.0
0
Max
18
VCC
Unit
V
V
-55
+125
°C
This device contains protection circuitry to guard against damage due to high static
voltages or electric fields. However, precautions must be taken to avoid applications of any voltage
higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and
VOUT should be constrained to the range GND≤(VIN or VOUT)≤VCC.
Unused inputs must always be tied to an appropriate logic voltage level (e.g., either GND or
VCC). Unused outputs must be left open.
2
IW4042B
DC ELECTRICAL CHARACTERISTICS(Voltages Referenced to GND)
Guaranteed Limit
VСС
Symbol Parameter
Test Conditions
V ≥-55°C 25°C ≤125
°C
VOUT=0.5 V or VCC - 0.5 V
3.5
3.5
3.5
VIH
Minimum High5.0
VOUT=1.0 V or VCC - 1.0 V
7
7
7
Level Input
10
V
=1.5
V
or
V
1.5
V
OUT
CC
11
11
11
Voltage
15
VOUT=0.5 V or VCC - 0.5 V
1.5
1.5
1.5
VIL
Maximum Low 5.0
VOUT=1.0 V or VCC - 1.0 V
3
3
3
Level Input
10
VOUT=1.5 V or VCC - 1.5 V
4
4
4
Voltage
15
4.95 4.95
VIN=GND or VCC
4.95
VOH
Minimum High5.0
9.95 9.95
9.95
Level Output
10
Voltage
15 14.95 14.95 14.9
5
0.05 0.05
VIN=GND or VCC
0.05
VOL
Maximum Low5.0
0.05 0.05
0.05
Level Output
10
0.05 0.05
0.05
Voltage
15
IIN
Maximum Input
VIN= GND or VCC
18
±0.1
±0.1 ±1.0
Leakage Current
30
1
VIN= GND or VCC
1
IСС
Maximum
5.0
60
2
2
Quiescent Supply
10
120
4
4
Current
15
600
20
20
(per Package)
20
VIN= GND or VCC
IOL
Minimum Output
0.51 0.36
0.64
Low (Sink)
VOL=0.4 V
5.0
0.9
1.3
1.6
Current
10
VOL=0.5 V
2.4
3.4
4.2
15
VOL=1.5 V
VIN= GND or VCC
IOH
Minimum Output
-1.6 -1.15
-2.0
5.0
High (Source)
VOH=2.5 V
5.0 -0.64 -0.51 -0.36
Current
VOH=4.6 V
-0.9
-1.3
-1.6
10
VOH=9.5 V
-2.4
-3.4
-4.2
15
VOH=13.5 V
3
Unit
V
V
V
V
µA
µA
mA
mA
IW4042B
AC ELECTRICAL CHARACTERISTICS(CL=50pF, RL=200 kΩ, Input tr=tf=20 ns)
Guaranteed Limit
VCC
Symbol
Parameter
V
≥-55
25°C
≤125
°C
°C
900
450
450
tPLH,
Maximum Propagation Delay, Clock to 5.0
400
200
200
tPHL
Q (Figure 1)
10
320
160
160
15
1000
500
500
tPLH,
Maximum Propagation Delay, Clock to 5.0
460
230
230
tPHL
Q (Figure 1)
10
360
180
180
15
440
220
220
tPLH,
Maximum Propagation Delay, Data to Q 5.0
220
110
110
tPHL
(Figure 2)
10
160
80
80
15
600
300
300
tPLH,
Maximum Propagation Delay, Data to Q 5.0
300
150
150
tPHL
(Figure 2)
10
200
100
100
15
400
200
200
tTLH, tTHL Maximum Output Transition Time, Any 5.0
200
100
100
Output (Figure 1)
10
160
80
80
15
CIN
Maximum Input Capacitance
7.5
TIMING REQUIREMENTS(CL=50pF, RL=200 kΩ, Input tr=tf=20 ns)
Guaranteed Limit
VCC
Symbol
Parameter
V
≥25°C
≤125°
C
55°C
400
200
200
tw
Minimum Pulse Width, Clock (Figure 1) 5.0
200
100
100
10
120
60
60
15
100
50
50
tsu
Minimum Setup Time, Data to Clock 5.0
60
30
30
(Figure 1)
10
50
25
25
15
240
120
120
th
Minimum Hold Time, Clock to Data 5.0
120
60
60
(Figure 1)
10
100
50
50
15
Not rise or fall
t r, tf
Maximum Input Rise or Fall Time, 5.0
time sensitive
Clock (Figure 1)
10
15
4
Unit
ns
ns
ns
ns
ns
pF
Unit
ns
ns
ns
µs
IW4042B
Figure 1. Switching Waveforms
Figure 2. Switching Waveforms
5