SN65220, SN65240, SN75240 SINGLE AND DUAL UNIVERSAL SERIAL BUS PORT TRANSIENT SUPPRESSORS SLLS266C – FEBRUARY 1997 – REVISED MARCH 2000 D D D D D D Design to Protect Submicron 3-V or 5-V Silicon from Noise Transients Applicable to Two High- or Low-Speed Universal Serial Bus (USB) Host, Hub, or Peripheral Ports Port ESD Protection Capability Exceeds: – 15-kV Human Body Model – 2-kV Machine Model Low Current Leakage . . . 1 µA Max Stand-Off Voltage . . . 6.0 V Min Low Capacitance . . . 35 pF Typ SN65240, SN75240 (Marked as A65240 or A75240) P OR PW PACKAGE (TOP VIEW) SN65220 (Marked as SADI) DBV PACKAGE (TOP VIEW) NC 1 6 GND 2 5 NC 3 4 8 7 6 5 1 2 3 4 GND C GND GND D B A A GND B GND NC – No internal connection schematic A or C description The SN75240 is characterized for operation from 0°C to 70°C. The SN65220 and SN65240 are characterized for operation from –40°C to 85°C. IEC1000-4-2 ESD performance is measured at the system level and system design influences the results of these tests. A high compliance level may be attained with proper system design. IEC1000-4-2 Compliance Test Levels IEC1000-4-2 IEC1000 42 COMPLIANCE LEVEL GND B or D (One Suppressor Shown) NOTE A: All four GND terminals should be connected to ground. CURRENT vs VOLTAGE 7.5 5 2.5 Current – A The SN65220 is a single transient voltage suppressor and the SN75240 and SN65240 are dual transient voltage suppressors designed to provide additional electrical noise transient protection to two USB ports. Any cabled I/O can be subjected to electrical noise transients from various sources. These noise transients can cause damage to the USB transceiver and/or the USB ASIC if they are of sufficient magnitude and duration. The USB ports are typically implemented in 3-V or 5-V digital CMOS with very limited ESD protection. The SN65220, SN75240, and SN65240 can significantly increase the port ESD protection level and reduce the risk of damage to the large and expensive circuits of the USB port. 0 –2.5 MAXIMUM TEST VOLTAGE CONTACT DISCHARGE (kV) AIR DISCHARGE (kV) 1 2 2 2 4 4 3 6 8 4 8 15 –5 –7.5 –10 –30 –20 –10 0 10 20 30 40 Voltage – V NOTE A: Typical current versus voltage curve was derived using the IEC 1.2/50-µs surge waveform. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2000, Texas Instruments Incorporated PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN65220, SN65240, SN75240 SINGLE AND DUAL UNIVERSAL SERIAL BUS PORT TRANSIENT SUPPRESSORS SLLS266C – FEBRUARY 1997 – REVISED MARCH 2000 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Continuous total power dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Dissipation Rating Table Electrostatic discharge . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Class 3, A:15 kV, B: 2 kV Peak power dissipation, PD(peak) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60 W Peak forward surge current, IFSM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 A Peak reverse surge current, IRSM . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –9 A Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. DISSIPATION RATING TABLE PACKAGE TA ≤ 25°C POWER RATING DERATING FACTOR ABOVE TA = 25°C TA = 70°C POWER RATING TA = 85°C POWER RATING DBV 385 mW 3.1 mW/°C 246 mW 200 mW P 1150 mW 9.2 mW/°C 736 mW 598 mW PW 520 mW 4.2 mW/°C 331 mW 268 mW ‡ This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow. recommended operating conditions SN65240, SN65220 Operating free free-air air temperature temperature, TA SN75240 MIN MAX –40 85 0 70 UNIT °C electrical characteristics over recommended operating conditions (unless otherwise noted) PARAMETER Ilkg V(BR) TEST CONDITIONS Leakage current MIN VI = 6 V at A, B, C, or D terminals VI = 1 mA at A, B, C, or D terminals Breakdown voltage TYP MAX 1 7 UNIT µA V APPLICATION INFORMATION Full-Speed or Low-Speed USB Host-or-Hub Port Transceiver 1.5 kΩ (Full Speed Only) 27 Ω D+ 15 kΩ GND A SN65220 or 1/2 SNx5240 B 27 Ω D+ A 15 kΩ D– SN65220 or 1/2 SNx5240 D– B GND 1.5 kΩ (Low Speed Only) 27 Ω 27 Ω Figure 1. Typical USB Application 2 Full-Speed or Low-Speed USB Down Stream Transceiver POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN65220, SN65240, SN75240 SINGLE AND DUAL UNIVERSAL SERIAL BUS PORT TRANSIENT SUPPRESSORS SLLS266C – FEBRUARY 1997 – REVISED MARCH 2000 MECHANICAL INFORMATION DBV (R-PDSO-G6) PLASTIC SMALL-OUTLINE 0,50 0,30 0,95 6 0,20 M 4 1,70 1,50 1 0,15 NOM 3,00 2,60 3 Gage Plane 3,00 2,80 0,25 0°–8° 0,55 0,35 Seating Plane 1,45 0,95 0,05 MIN 0,10 4073253-5/E 05/99 NOTES: A. All linear dimensions are in millimeters. B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN65220, SN65240, SN75240 SINGLE AND DUAL UNIVERSAL SERIAL BUS PORT TRANSIENT SUPPRESSORS SLLS266C – FEBRUARY 1997 – REVISED MARCH 2000 MECHANICAL INFORMATION P (R-PDIP-T8) PLASTIC DUAL-IN-LINE PACKAGE 0.400 (10,60) 0.355 (9,02) 8 5 0.260 (6,60) 0.240 (6,10) 1 4 0.070 (1,78) MAX 0.310 (7,87) 0.290 (7,37) 0.020 (0,51) MIN 0.200 (5,08) MAX Seating Plane 0.125 (3,18) MIN 0.100 (2,54) 0.021 (0,53) 0.015 (0,38) 0°– 15° 0.010 (0,25) M 0.010 (0,25) NOM 4040082 / B 03/95 NOTES: A. All linear dimensions are in inches (millimeters). B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN65220, SN65240, SN75240 SINGLE AND DUAL UNIVERSAL SERIAL BUS PORT TRANSIENT SUPPRESSORS SLLS266C – FEBRUARY 1997 – REVISED MARCH 2000 MECHANICAL INFORMATION PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE 14 PIN SHOWN 0,32 0,19 0,65 14 0,13 M 8 0,15 NOM 4,50 4,30 6,70 6,10 Gage Plane 0,25 1 7 0°– 8° 0,75 0,50 A Seating Plane 1,20 MAX 0,10 0,10 MIN PINS ** 8 14 16 20 24 28 A MAX 3,10 5,10 5,10 6,60 7,90 9,80 A MIN 2,90 4,90 4,90 6,40 7,70 9,60 DIM 4040064 / D 10/95 NOTES: A. B. C. D. All linear dimensions are in millimeters. This drawing is subject to change without notice. Body dimensions do not include mold flash or protrusion not to exceed 0,15. Falls within JEDEC MO-153 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgment, including those pertaining to warranty, patent infringement, and limitation of liability. TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. Customers are responsible for their applications using TI components. In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof. Copyright 2000, Texas Instruments Incorporated