LTC1163/LTC1165 Triple 1.8V to 6V High-Side MOSFET Drivers U DESCRIPTIO FEATURES ■ ■ ■ ■ ■ ■ ■ ■ ■ ■ Operates from 1.8V to 6V 0.01µA Standby Current 95µA Operating Current per Channel at 3.3V Fully Enhances N-Channel Switches No External Charge Pump Components Built-In Gate Voltage Clamps Easily Protected Against Supply Transients Controlled Switching ON and OFF Times Compatible with 5V, 3V and Sub-3V Logic Families Available in 8-Pin SOIC The LTC1163/LTC1165 triple low voltage MOSFET drivers make it possible to switch supply or ground referenced loads through inexpensive, low RDS(ON) N-channel switches from as little as a 1.8V supply. The LTC1165 has inverting inputs and makes it possible to directly replace P-channel MOSFET switches while maintaining system drive polarity. The LTC1163 has noninverting inputs. UO APPLICATI ■ ■ ■ ■ ■ ■ ■ PCMCIA Card 3.3V/5V Switch 2-Cell High-Side Load Switching Boost Regulator Shutdown to Zero Standby Current Replacing P-Channel Switches Notebook Computer Power Management Palmtop Computer Power Management Portable Medical Equipment Mixed 3.3V and 5V Supply Switching The LTC1163/LTC1165 internal charge pumps boost the gate voltage 8V above a 3.3V rail, fully enhancing inexpensive N-channels for high- or low-side switch applications. The LTC1163/LTC1165 are available in both an 8-pin DIP and an 8-pin SOIC. UO ■ S Micropower operation, with 0.01µA standby current and 95µA operating current, coupled with a power supply range of 1.8V to 6V, make the LTC1163/LTC1165 ideally suited for 2- to 4-cell battery-powered applications. The LTC1163/LTC1165 are also well suited for sub-3V, 3.3V and 5V nominal supply applications. TYPICAL APPLICATI 2-Cell Triple High-Side Switch MOSFET Switch Gate Voltage (1.8V TO 3V) 18 BATTERY PACK + 16 10µF RFD14N05LSM IN1 CONTROL LOGIC OR µP VS RFD14N05LSM RFD14N05LSM OUT1 IN2 LTC1163 OUT2 LTC1165 IN3 OUT3 GND LTC1163 HAS NONINVERTING INPUTS LTC1165 HAS INVERTING INPUTS 2-CELL LOAD 2-CELL LOAD 2-CELL LOAD GATE OUTPUT VOLTAGE (V) + 2-CELL 14 12 10 8 6 4 2 LTC1163/65 • TA01 0 0 1 2 3 4 SUPPLY VOLTAGE (V) 5 6 LTC1163/65 • TA02 1 LTC1163/LTC1165 W W W AXI U U ABSOLUTE RATI GS Supply Voltage ......................................................... 7V Any Input Voltage .......................... 7V to (GND – 0.3V) Any Output Voltage ....................... 20V to (GND – 0.3V) Current (Any Pin)................................................. 50mA Operating Temperature Range LTC1163C/LTC1165C ........................... 0°C to 70°C Storage Temperature Range ................ – 65°C to 150°C Lead Temperature (Soldering, 10 sec)................. 300°C W U U PACKAGE/ORDER I FOR ATIO ORDER PART NUMBER TOP VIEW ORDER PART NUMBER TOP VIEW IN1 1 8 VS IN1 1 8 VS IN2 2 7 OUT1 IN2 2 7 OUT1 IN3 3 6 OUT2 IN3 3 6 OUT2 GND 4 5 OUT3 GND 4 5 OUT3 LTC1163CN8 LTC1165CN8 S8 PART MARKING N8 PACKAGE 8-LEAD PLASTIC DIP S8 PACKAGE 8-LEAD PLASTIC SOIC TJMAX = 100°C, θJA = 130°C/W TJMAX = 100°C, θJA = 150°C/W ELECTRICAL CHARACTERISTICS LTC1163CS8 LTC1165CS8 1163 1165 VS = 1.8V to 6V, TA = 25°C, unless otherwise noted. LTC1163C/LTC1165C MIN TYP MAX SYMBOL PARAMETER CONDITIONS IQ Quiescent Current OFF VS = 1.8V, VIN1 = VIN2 = VIN3 = VOFF (Note 1,2) VS = 3.3V, VIN1 = VIN2 = VIN3 = VOFF (Note 1,2) VS = 5V, VIN1 = VIN2 = VIN3 = VOFF (Note 1,2) 0.01 0.01 0.01 1 1 1 µA µA µA Quiescent Current ON VS = 1.8V, VIN = VON (Note 2,3) VS = 3.3V, VIN = VON (Note 2,3) VS = 5V, VIN = VON (Note 2,3) 60 95 180 120 200 400 µA µA µA VINH Input High Voltage 1.8V < VS < 2.7V 2.7V < VS < 6V ● ● VINL Input Low Voltage 1.8V < VS < 6V ● IIN Input Current 0V ≤ VIN ≤ VS ● CIN Input Capacitance VGATE – VS Gate Voltage Above Supply VS = 1.8V, VIN = VON (Note 2) VS = 2V, VIN = VON (Note 2) VS = 2.2V, VIN = VON (Note 2) VS = 3.3V, VIN = VON (Note 2) VS = 5V, VIN = VON (Note 2) tON Turn-ON Time 2 80% × VS 70% × VS UNITS V V 15% × VS V ±1 µA 5 pF 3.5 4.0 4.5 6.0 5.0 4.1 4.6 5.2 8.0 9.0 6.0 7.0 8.0 9.5 13.0 V V V V V VS = 3.3V, CGATE = 1000pF Time for VGATE > VS + 1V Time for VGATE > VS + 2V 40 60 120 180 400 600 µs µs VS = 5V, CGATE = 1000pF Time for VGATE > VS + 1V Time for VGATE > VS + 2V 30 40 95 130 300 400 µs µs ● ● ● ● ● LTC1163/LTC1165 ELECTRICAL CHARACTERISTICS VS = 1.8V to 6V, TA = 25°C, unless otherwise noted. LTC1163C/LTC1165C MIN TYP MAX SYMBOL PARAMETER CONDITIONS tOFF Turn-OFF Time VS = 3.3V, CGATE = 1000pF Time for VGATE < 0.5V 20 65 200 µs VS = 5V, CGATE = 1000pF Time for VGATE < 0.5V 15 45 150 µs The ● denotes specifications which apply over the full operating temperature range. Note 1: Quiescent current OFF is for all channels in OFF condition. UNITS Note 2: LTC1163: VOFF = 0V, VON = VS. LTC1165: VOFF = VS, VON = 0V Note 3: Quiescent current ON is per driver and is measured independently. U W TYPICAL PERFOR A CE CHARACTERISTICS Standby Supply Current Supply Current per Driver ON 5 12 TA = 25°C ALL THREE INPUTS = OFF 2 1 0 10 400 VGATE – VS (V) 3 TA = 25°C TA = 25°C ONE INPUT = ON OTHER INPUTS = OFF 500 SUPPLY CURRENT (µA) 300 200 100 0 1 2 3 4 SUPPLY VOLTAGE (V) 5 0 6 0 1 2 3 4 SUPPLY VOLTAGE (V) LTC1163/65 • TPC01 Input Threshold Voltage 0 6 TURN-ON TIME (µs) 3 VHI VLO 1 5 6 LTC1163/65 •TPC04 2 3 4 SUPPLY VOLTAGE (V) 400 300 200 0 5 6 Turn-OFF Time CGATE = 1000pF TIME FOR VGATE < 0.5V 250 VGS = 2V 100 2 3 4 SUPPLY VOLTAGE (V) 1 300 CGATE = 1000pF 4 1 0 LTC1163/65 • TPC03 500 0 4 Turn-ON Time TA = 25°C INPUT THRESHOLD VOLTAGE (V) 5 600 5 0 6 LTC1163/65 • TPC02 6 2 8 2 TURN-OFF TIME (µs) SUPPLY CURRENT (µA) 4 –1 Gate Voltage Above Supply 600 1 2 3 4 SUPPLY VOLTAGE (V) 150 100 50 VGS = 1V 0 200 5 6 LTC1163/65 • TPC05 0 0 1 2 3 4 SUPPLY VOLTAGE (V) 5 6 LTC1163/65 • TA06 3 LTC1163/LTC1165 U W TYPICAL PERFOR A CE CHARACTERISTICS Standby Supply Current Supply Current per Driver ON 5 300 4 250 MOSFET Gate Drive Current 1000 3 2 1 0 –1 GATE DRIVE CURRENT (µA) SUPPLY CURRENT (µA) SUPPLY CURRENT (µA) TA = 25°C 200 VS = 5V 150 VS = 3.3V 100 VS = 1.8V 100 VS = 5V 10 VS = 3.3V 1 50 0 10 50 20 30 40 TEMPERATURE (°C) 60 70 0 VS = 1.8V 0 10 20 30 40 50 TEMPERATURE (°C) LTC1163/65 • TPC07 60 70 LTC1163/65 • TPC08 VS = 2.2V 0.1 0 2 4 6 8 GATE VOLTAGE ABOVE SUPPLY (V) 10 LTC1163/65 • TPC09 U U U PI FU CTIO S Input Pins Output Pins The LTC1163 is noninverting; i.e., the MOSFET gate is driven above the supply when the input pin is held high. The LTC1165 is inverting and drives the MOSFET gate high when the input pin is held low. The inverting inputs of the LTC1165 allow P-channel switches to be replaced by lower resistance/cost N-channel switches while maintaining system drive polarity. The output pin is either driven to ground when the switch is turned OFF or driven above the supply rail when the switch is turned ON. The output is clamped to about 14V above ground by a built-in Zener clamp. This pin has a relatively high impedance when driven above the rail (the equivalent of a few hundred kΩ). Care should be taken to minimize any loading of this pin by parasitic resistance to ground or supply. The LTC1163/LTC1165 logic inputs are high impedance CMOS gates with ESD protection diodes to ground and therefore should not be forced below ground. The inputs can however, be driven above the power supply rail as there are no clamping diodes connected between the input pins and supply pin. This facilitates operation in mixed 5V/3V systems. OPERATIO A 150Ω resistor should be inserted in series with the ground pin or supply pin if negative supply voltage transients are anticipated. This will limit the current flowing from the power source into the LTC1163/LTC1165 to tens of milliamps during reverse battery conditions. U The LTC1163/LTC1165 are triple micropower MOSFET drivers designed for operation over the 1.8V to 6V supply range and include the following functional blocks: 3V Logic Compatible Inputs The LTC1163/LTC1165 inputs have been designed to accommodate a wide range of 3V and 5V logic families. 4 Supply Pin The input threshold voltage is set at roughly 50% of the supply voltage and approximately 200mV of input hysteresis is provided to ensure clean switching. The input enables all of the following circuit blocks: the bias generator, the high frequency oscillator and gate charge pump. Therefore, when the input is turned off, the entire circuit powers down and the supply current drops below 1µA. LTC1163/LTC1165 OPERATIO U Gate Charge Pump Controlled Gate Rise and Fall Times Gate drive for the power MOSFET is produced by an internal charge pump circuit which generates a gate voltage substantially higher than the power supply voltage. The charge pump capacitors are included on chip and therefore no external components are required to generate gate drive. When the input is switched ON and OFF, the gate is charged by the internal charge pump and discharged in a controlled manner. The charge and discharge rates have been set to minimize RFI and EMI emissions. W BLOCK DIAGRA (One Channel) LTC1165 HIGH FREQUENCY OSCILLATOR CHARGE PUMP BIAS GENERATOR GATE DISCHARGE LOGIC GATE LTC1163 INPUT 14V LTC1163/65 • BD W U U U APPLICATIO S I FOR ATIO Logic-Level MOSFET Switches The LTC1163/LTC1165 are designed to operate with logic-level N-channel MOSFET switches. Although there is some variation among manufacturers, logic-level MOSFET switches are typically rated with VGS = 4V with a maximum continuous VGS rating of ±10V. RDS(ON) and maximum VDS ratings are similar to standard MOSFETs and there is generally little price differential. Logic-level MOSFETs are frequently designated by an “L” and are usually available in surface mount packaging. Some logic-level MOSFETs are rated with VGS up to ±15V and can be used in applications which require operation over the entire 1.8V to 6V range. Powering Large Capacitive Loads Electrical subsystems in portable battery-powered equipment are typically bypassed with large filter capacitors to reduce supply transients and supply induced glitching. If not properly powered however, these capacitors may themselves become the source of supply glitching. For example, if a 100µF capacitor is powered through a switch with a slew rate of 0.1V/µs, the current during startup is: ISTART = C(∆V/∆t) = (100 × 10 – 6)(1 × 105) = 10A Obviously, this is too much current for the regulator (or output capacitor) to supply and the output will glitch by as much as a few volts. The startup current can be substantially reduced by limiting the slew rate at the gate of an N-channel as shown in Figure 1. The gate drive output of the LTC1163/LTC1165 is passed through a simple RC network, R1 and C1, which substantially slows the slew rate of the MOSFET gate to approximately 1.5 × 10 – 4V/µs. Since the MOSFET is operating as a source follower, the slew rate at the source is essentially the same as that at the gate, reducing the startup current to approximately 15mA which is easily 5 LTC1163/LTC1165 W U U U APPLICATIO S I FOR ATIO VIN on a 3.3V supply which is compatible with 5V TTL and CMOS logic. (The LTC1163/LTC1165 cannot however, be driven by 3V logic when powered from a 5V supply because the threshold is approximately 2.5V.) 3.3V LT1129-3.3 + 3.3µF R1 100k VS R2 1k OUT1 MTD3055EL C1 0.1µF 1/3 LTC1163 ON/OFF + IN1 GND CL 100µF 3.3V 3.3V LOAD VS 5V OUT1 1/3 LTC1163 LTC1163/65 • F01 IN1 3.3V LOAD GND Figure 1. Powering a Large Capacitive Load managed by the system regulator. R2 is required to eliminate the possibility of parasitic MOSFET oscillations during switch transitions. It is a good practice to isolate the gates of paralleled MOSFETs with 1k resistors to decrease the possibility of interaction between switches. Mixed 5V/3V Systems Because the input ESD protection diodes are referenced to ground instead of the supply pin, it is possible to drive the LTC1163/LTC1165 inputs from 5V CMOS or TTL logic even though the LTC1163/LTC1165 are powered from a 3.3V supply as shown in Figure 2. The input threshold voltage is approximately 50% of the supply voltage or 1.6V LTC1163/65 • F01 Figure 2. Direct Interface to 5V Logic Reverse Battery Protection The LTC1163/LTC1165 can be protected against reverse battery conditions by connecting a 150Ω resistor in series with the ground pin or supply pin. The resistor limits the supply current to less than 24mA with –3.6V applied. Because the LTC1163/LTC1165 draw very little current while in normal operation, the drop across the resistor is minimal. The 3.3V µP (or control logic) can be protected by adding 10k resistors in series with the input pins. U TYPICAL APPLICATIO S PCMCIA Card 3.3V/5V VCC Switch 5V + 10µF PCMCIA CONTROLLER VCC 5V 1/2 MMDF3N02HD IN1 VS VCC OUT1 + LTC1165 VCC 3V IN2 OUT2 IN3 OUT3 1µF MMDF3N02HD PC CARD SOCKET GND LTC1163/65 • TA03 3.3V NOTE: USE LTC1163 WITH NONINVERTING PCMCIA CONTROLLERS 6 MTD3055EL LTC1163/LTC1165 U TYPICAL APPLICATIO S 2-Cell to 3.3V, 5V and 12V High-Side Switch/Converter with 0.01µA Standby Current + 2-CELL + BATTERY PACK 100µF 6.3V VS CONTROL LOGIC OR µP RFD14N05LSM OUT1 LTC1163 OUT2 LTC1165 OUT3 IN3 GND IN1 IN2 RFD14N05LSM RFD14N05LSM 100µH MBRS120T3 3.3V 22µH 22µH MBRS120T3 1 3 47Ω MBRS120T3 12V 1 5V 3 2 1 3 7 LT1109CS8-12 8 7 + LT1109CS8-5 10µF 20V 4 8 LT1173CS8 + 39k 8 + 22µF 16V 24k 5 4 4 220µF 6.3V LTC1163/65 • TA04 PCMCIA Card Socket VPP Switch/Reglator 7,8 VCC = 3.3V OR 5V 1M 1N4148 + 1/4 74HC02 MMDF3N02HD 1 3 1 2 4 5,6 EN0 1/4 74HC02 LT1109ACS8-12 IN1 LTC1163 8 + 7 4 VS EN0 0 1 0 1 47µF 16V OUT1 EN1 0 0 1 1 OUTPUT 0V 12V VCC HI-Z OUT2 IN2 OUT3 IN3 EN1 VPP = 0V, 3.3V, 5V, 12V, OR HI-Z 3 100µF 6.3V 1N4148 1/4 74HC02 MURS120T3 33µH 2N7002 GND LTC1163/65 • TA05 Ultra-Low Drop Triple 3.3V High-Side Switch 3.3V + 10µF MTD 3055EL VS 3.3V LOGIC OR µP IN1 OUT1 LTC1163 OUT2 LTC1165 OUT3 IN3 GND IN2 MTD 3055EL MTD 3055EL (11V) (11V) (11V) 3.3V LOAD 3.3V LOAD 3.3V LOAD LTC1163/65 • TA06 Information furnished by Linear Technology Corporation is believed to be accurate and reliable. However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights. 7 LTC1163/LTC1165 UO TYPICAL APPLICATI S Mixed Voltage High- and Low-Side Switches 12V 3.3V 5V + + Si9956DY 10µF + 10µF VS OUT1 LTC1163 OUT2 LTC1165 OUT3 IN3 GND IN1 5V LOGIC OR µP 10µF 12V LOAD IN2 IRFR024 5V LOAD 3.3V LOAD LTC1163/65 • TA07 3-Cell to 3.3V Ultra-Low Drop Regulator with 2 Ramped Switches + + 3-CELL BATTERY PACK 10µF MTD3055EL 1 VS OUT1 IN1 CONTROL LOGIC OR µP 3 510pF LTC1163 OUT2 IN2 LTC1165 OUT3 IN3 GND 3.3k + MTD3055EL 220µF 6.3V 1k 1k LT1431 3.3V OUTPUT MTD3055EL 8 5 100k 3.3V LOAD 6 100k 680Ω 3.3V LOAD 0.1µF 10k 0.1µF LTC1163/65 • TA08 U PACKAGE DESCRIPTIO Dimensions in inches (millimeters) unless otherwise noted. 0.300 – 0.320 (7.620 – 8.128) N8 Package 8-Lead Plastic DIP 8 7 6 5 0.065 (1.651) TYP 0.009 – 0.015 (0.229 – 0.381) ( 0.400 (10.160) MAX 0.130 ± 0.005 (3.302 ± 0.127) 0.045 – 0.065 (1.143 – 1.651) +0.025 0.325 –0.015 +0.635 8.255 –0.381 0.250 ± 0.010 (6.350 ± 0.254) 0.125 (3.175) MIN 0.045 ± 0.015 (1.143 ± 0.381) ) 0.100 ± 0.010 (2.540 ± 0.254) 0.020 (0.508) MIN 1 2 4 3 0.018 ± 0.003 (0.457 ± 0.076) 0.189 – 0.197 (4.801 – 5.004) 8 0.010 – 0.020 × 45° (0.254 – 0.508) S8 Package 8-Lead Plastic SOIC 0.008 – 0.010 (0.203 – 0.254) 6 5 0.004 – 0.010 (0.101 – 0.254) 0.228 – 0.244 (5.791 – 6.197) 0°– 8° TYP 0.016 – 0.050 0.406 – 1.270 0.014 – 0.019 (0.355 – 0.483) 0.150 – 0.157 (3.810 – 3.988) 0.050 (1.270) BSC 1 8 7 0.053 – 0.069 (1.346 – 1.752) Linear Technology Corporation 2 3 4 LT/GP 1093 10K REV 0 • PRINTED IN USA 1630 McCarthy Blvd., Milpitas, CA 95035-7487 (408) 432-1900 ● FAX: (408) 434-0507 ● TELEX: 499-3977 LINEAR TECHNOLOGY CORPORATION 1993