19-3809; Rev 1; 10/05 I2C Port Expander with Eight Inputs and Maskable Transition Detection The MAX7319 is one device in a family of pin-compatible port expanders with a choice of input ports, open-drain I/O ports, and push-pull output ports (see Table 1). The MAX7319 is available in 16-pin QSOP and 16-pin TQFN packages, and is specified over the automotive temperature range (-40°C to +125°C). Applications Cell Phones SAN/NAS Servers Notebooks Satellite Radio Automotive Features ♦ 400kHz, +5.5V-Tolerant I2C Serial Interface ♦ +1.71V to +5.5V Operating Voltage ♦ Eight Input Ports with Maskable, Latching Transition Detection ♦ Input Ports are Overvoltage Protected to +6V ♦ Transient Changes are Latched, Allowing Detection Between Read Operations ♦ INT Output Alerts Change on Any Selection of Inputs ♦ AD0 and AD2 Inputs Select from 16 Slave Addresses ♦ Low 0.6µA (typ) Standby Current ♦ -40°C to +125°C Operating Temperature Range Ordering Information PART PIN-PACKAGE TOP MARK MAX7319AEE+ 16 QSOP MAX7319ATE+ 16 TQFN-EP* PKG CODE — E16-4 ADA T1633-4 Note: All devices specified over -40°C to +85°C operating range. +Denotes lead-free package. *EP = Exposed pad. Pin Configurations, Typical Application Circuit, and Functional Diagram appear at end of data sheet. Selector Guide PART INPUTS INTERRUPT MASK OPEN-DRAIN OUTPUTS PUSH-PULL OUTPUTS MAX7319 8 Yes — — MAX7320 — — — 8 MAX7321 MAX7322 Up to 8 4 — Yes Up to 8 — — 4 MAX7323 Up to 4 — Up to 4 MAX7328* MAX7329** Up to 8 — — Up to 8 4 — — *Second source to PCF8574. **Second source to PCF8574A. Purchase of I2C components from Maxim Integrated Products, Inc., or one of its sublicensed Associated Companies, conveys a license under the Philips I2C Patent Rights to use these components in an I2C system, provided that the system conforms to the I2C Standard Specification as defined by Philips. ________________________________________________________________ Maxim Integrated Products For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at 1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com. 1 MAX7319 General Description The MAX7319 2-wire serial-interfaced peripheral features eight input ports with selectable internal pullups, overvoltage protection to +6V, and transition detection with interrupt output. All input ports are continuously monitored for state changes (transition detection). Transitions are latched, allowing detection of transient changes. Any combination of inputs can be selected using the interrupt mask to assert the INT output. When the MAX7319 is subsequently accessed through the serial interface, any pending interrupt is cleared. The +5.5V tolerant RST input clears the serial interface, terminating any I 2 C communication to or from the MAX7319. The MAX7319 uses two address inputs with four-level logic to allow 16 I 2 C slave addresses. The slave address also enables or disables internal 40kΩ pullups in groups of four ports. The MAX7319 supports hot insertion. All eight input ports, the serial interface SDA, SCL, AD0, AD2, INT, and RST remain high impedance in power-down (V+ = 0) with up to +6V asserted on them. MAX7319 I2C Port Expander with Eight Inputs and Maskable Transition Detection ABSOLUTE MAXIMUM RATINGS (All voltages referenced to GND.) Supply Voltage V+....................................................-0.3V to +6V SCL, SDA, AD0, AD2, RST, INT, I0–I7......................-0.3V to +6V SDA Input Current.............................................................. 10mA INT Input Current ................................................................10mA Total V+ Current..................................................................50mA Total GND Current ...........................................................100mA Continuous Power Dissipation (TA = +70°C) 16-Pin QSOP (derate 8.3mW/°C over +70°C)..............667mW 16-Pin TQFN (derate 15.6mW/°C over +70°C) ..........1250mW Operating Temperature Range .........................-40°C to +125°C Junction Temperature ......................................................+150°C Storage Temperature Range .............................-65°C to +150°C Lead Temperature (soldering, 10s) .................................+300°C Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. ELECTRICAL CHARACTERISTICS (V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1) PARAMETER Operating Supply Voltage SYMBOL CONDITIONS VPOR Standby Current (Interface Idle) ISTB Supply Current (Interface Running) I+ Input High Voltage SDA, SCL, AD0, AD2, RST, I0–I7 VIH Input Low Voltage SDA, SCL, AD0, AD2, RST, I0–I7 VIL Input Leakage Current SDA, SCL, AD0, AD2, RST, I0–I7 IIH, IIL UNITS 5.50 V 1.6 V 0.6 1.5 µA fSCL = 400kHz; other digital inputs at V+ 23 55 µA V+ < 1.8V 0.8 x V+ V+ ≥ 1.8V 0.7 x V+ V V+ < 1.8V 0.2 x V+ V+ ≥ 1.8V 0.3 x V+ SDA, SCL, AD0, AD2, RST, I0–I7 at V+ or GND -0.2 +0.2 10 Output Low Voltage SDA VOLSDA ISINK = 6mA Output Low Voltage INT VOLINT ISINK = 5mA 2 MAX SCL and SDA and other digital inputs at V+ Input Capacitance SDA, SCL, AD0, AD2, RST, I0–I7 Port Input Pullup Resistor TYP 1.71 V+ Power-On Reset Voltage MIN RPU 25 V µA pF 250 mV 100 250 mV 40 55 kΩ _______________________________________________________________________________________ I2C Port Expander with Eight Inputs and Maskable Transition Detection (V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Port Input Setup Time tPSU CL ≤ 100pF 0 Port Input Hold Time tPH CL ≤ 100pF 4 INT Input Data Valid Time tIV CL ≤ 100pF 4 µs INT Reset Delay Time from STOP tIP CL ≤ 100pF 4 µs INT Reset Delay Time from Acknowledge tIR CL ≤ 100pF 4 µs µs µs TIMING CHARACTERISTICS (V+ = +1.71V to +5.5V, TA = -40°C to +125°C, unless otherwise noted. Typical values are at V+ = +3.3V, TA = +25°C.) (Note 1) PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS 400 kHz Serial Clock Frequency fSCL Bus Free Time Between a STOP and a START Condition tBUF 1.3 µs Hold Time (Repeated) START Condition tHD, STA 0.6 µs Repeated START Condition Setup Time tSU, STA 0.6 µs STOP Condition Setup Time tSU, STO Data Hold Time tHD, DAT Data Setup Time tSU, DAT 100 ns tLOW tHIGH 1.3 0.7 µs µs SCL Clock Low Period SCL Clock High Period 0.6 µs (Note 2) 0.9 µs Rise Time of Both SDA and SCL Signals, Receiving tR (Notes 3, 4) 20 + 0.1Cb 300 ns Fall Time of Both SDA and SCL Signals, Receiving tF (Notes 3, 4) 20 + 0.1Cb 300 ns Fall Time of SDA, Transmitting tF,TX (Notes 3, 4) 20 + 0.1Cb 250 ns Pulse Width of Spike Suppressed tSP (Note 5) Capacitive Load for Each Bus Line Cb (Note 3) RST Pulse Width tW 500 ns tRST 1 µs RST Rising to START Condition Setup Time 50 ns 400 pF Note 1: All parameters are tested at TA = +25°C. Specifications over temperature are guaranteed by design. Note 2: A master device must provide a hold time of at least 300ns for the SDA signal (referred to VIL of the SCL signal) to bridge the undefined region of SCL’s falling edge. Note 3: Guaranteed by design. Note 4: Cb = total capacitance of one bus line in pF. tR and tF measured between 0.3 x V+ and 0.7 x V+, ISINK ≤ 6mA. Note 5: Input filters on the SDA and SCL inputs suppress noise spikes less than 50ns. _______________________________________________________________________________________ 3 MAX7319 PORT AND INTERRUPT INT TIMING CHARACTERISTICS Typical Operating Characteristics (TA = +25°C, unless otherwise noted.) 1.4 1.2 V+ = +5.0V 1.0 V+ = +3.3V V+ = +2.5V 0.8 0.6 0.4 V+ = +1.71V fSCL = 400kHz V+ = +5.0V 50 SUPPLY CURRENT (µA) 1.6 MAX7319 toc01 fSCL = 0kHz 1.8 60 MAX7319 toc02 SUPPLY CURRENT vs. TEMPERATURE STANDBY CURRENT vs. TEMPERATURE 2.0 STANDBY CURRENT (µA) MAX7319 I2C Port Expander with Eight Inputs and Maskable Transition Detection 40 V+ = +3.3V 30 20 V+ = +2.5V 10 0.2 V+ = +1.71V 0 0 -40 -25 -10 5 20 35 50 65 80 95 110 125 -40 -25 -10 5 20 35 50 65 80 95 110 125 TEMPERATURE (°C) TEMPERATURE (°C) Pin Description PIN NAME FUNCTION QSOP TQFN 1, 3 15, 1 AD0, AD2 2 16 RST Reset Input, Active Low. Drive RST low to clear the 2-wire interface. 4–7, 9–12 2–5, 7–10 I0–I7 Input Ports. I0 to I7 are CMOS logic inputs protected to +6V. 8 6 GND 13 11 INT Interrupt Output, Active Low. INT is an open-drain output rated at +6V. 14 12 SCL I2C-Compatible Serial Clock Input 15 13 SDA 16 14 V+ Positive Supply Voltage. Bypass V+ to GND with a ceramic capacitor of at least 0.047µF. — EP EP Exposed Pad. Connect exposed pad to GND. 4 Address Inputs. Select device slave address with AD0 and AD2. Connect AD0 and AD2 to either GND, V+, SCL, or SDA to give four logic combinations (see Table 3). Ground I2C-Compatible Serial Data I/O _______________________________________________________________________________________ I2C Port Expander with Eight Inputs and Maskable Transition Detection MAX7319–MAX7329 Family Comparison The MAX7319–MAX7323 family consists of five pincompatible, eight-port expanders. Each version is optimized for different applications. The MAX7328 and MAX7329 are second sources to the PCF8574 and PCF8574A. The MAX7324–MAX7327 family consists of four pincompatible, 16-port expanders that integrate the functions of the MAX7320 and one of either the MAX7319, MAX7321, MAX7322, or MAX7323. Functional Overview The MAX7319 is a general-purpose port expander, operating from a +1.71V to +5.5V supply that provides eight CMOS input ports that are overvoltage protected to +6V independent of supply voltage. The MAX7319 is set to one of 16 I2C slave addresses (0x60 to 0x6F) using the address-select inputs AD2 and AD0, and is accessed over an I2C serial interface. The RST input clears the serial interface in case of a hung bus, terminating any serial transaction to or from the MAX7319. The input ports offer latching transition detection functionality. All input ports are continuously monitored for Table 1. MAX7319–MAX7329 Family Comparison PART I2C SLAVE INPUTS ADDRESS INPUT INTERRUPT MASK OPENDRAIN OUTPUTS PUSHPULL OUTPUTS APPLICATION 8-PORT EXPANDERS MAX7319 110xxxx 8 Yes — — MAX7320 101xxxx — — — 8 MAX7321 110xxxx Up to 8 — Up to 8 — MAX7322 110xxxx 4 Yes — 4 Input-only versions: Eight input ports with programmable latching transition detection interrupt and selectable pullups. Offers maximum versatility for automatic input monitoring. An interrupt mask selects which inputs cause an interrupt on transitions, and transition flags identify which inputs have changed (even momentarily) since the ports were last read. Output-only versions: Eight push-pull outputs with selectable power-up default levels. Push-pull outputs offer faster rise time than opendrain outputs, and require no pullup resistors. I/O versions: Eight open-drain I/O ports with latching transition detection interrupt and selectable pullups. Open-drain outputs can level shift the logic-high state to a higher or lower voltage than V+ using external pullup resistors. Any port can be used as an input by setting the open-drain output to logic-high. Transition flags identify which inputs have changed (even momentarily) since the ports were last read. Four input-only, four output-only versions: Four input ports with programmable latching transition detection interrupt and selectable pullups. Four push-pull outputs with selectable power-up default levels. _______________________________________________________________________________________ 5 MAX7319 Detailed Description MAX7319 I2C Port Expander with Eight Inputs and Maskable Transition Detection Table 1. MAX7319–MAX7329 Family Comparison (continued) PART I2C SLAVE INPUTS ADDRESS INPUT INTERRUPT MASK OPENDRAIN OUTPUTS PUSHPULL OUTPUTS MAX7323 110xxxx Up to 4 — Up to 4 4 MAX7328 MAX7329 0100xxx 0111xxx Up to 8 — Up to 8 — APPLICATION Four I/O, four output-only versions: Four open-drain I/O ports with latching transition detection interrupt and selectable pullups. Four push-pull outputs with selectable power-up default levels. PCF8574-, PCF8574A-compatible versions: Eight open-drain I/O ports with nonlatching transition detection interrupt and pullups on all ports. All ports power up as inputs (or logic-high outputs). Any port can be used as an input by setting the open-drain output to logic-high. 16-PORT EXPANDERS MAX7324 MAX7325 MAX7326 MAX7327 101xxxx and 110xxxx 8 Yes — 8 Software equivalent to a MAX7320 plus a MAX7321. Up to 8 — Up to 8 8 Software equivalent to a MAX7320 plus a MAX7319. 4 Yes — 12 Software equivalent to a MAX7320 plus a MAX7322. Up to 4 — Up to 4 12 Software equivalent to a MAX7320 plus a MAX7323. changes. An input change sets one of eight flag bits that identify changed input(s). All flags are cleared upon a subsequent read or write transaction to the MAX7319. A latching interrupt output, INT, is programmed to flag input data changes on input ports through an interrupt mask register. By default, data changes on any input port force INT to a logic-low. The interrupt output, INT, and all transition flags are cleared when the MAX7319 is next accessed through the serial interface. Internal pullup resistors to V+ are selected by the address-select inputs, AD0 and AD2. Pullups are enabled on the input ports in groups of four (see Table 3). Initial Power-Up On power-up, the transition detection logic is reset, and INT is released to a high-impedance state. The interrupt mask register is set to 0xFF, enabling the interrupt output for transitions on all eight input ports. The transition flags are cleared to indicate no data changes. RST Input The RST input voids any I2C transaction involving the MAX7319, forcing the MAX7319 into the I2C STOP condition. A reset does not affect the interrupt output (INT) or change the contents of the interrupt mask register. RST is overvoltage tolerant to +6V. 6 Standby Mode When the serial interface is idle, the MAX7319 automatically enters standby mode, drawing minimal supply current. Slave Address and Input Pullup Selection Address inputs AD0 and AD2 determine the MAX7319 slave address and select which inputs have pullup resistors. Pullups are enabled on the input ports in groups of four (see Table 3). The MAX7319, MAX7321, MAX7322, and MAX7323 use a different range of slave addresses (110xxxx) than the MAX7320 (101xxxx). The MAX7319 slave address is determined on each I2C transmission, regardless of whether the transmission is actually addressing the MAX7319. The MAX7319 distinguishes whether address inputs AD2 and AD0 are connected to SDA or SCL instead of fixed logic levels V+ or GND during this transmission. This means that the MAX7319 slave address can be configured dynamically in the application without cycling the device supply. On initial power-up, the MAX7319 cannot decode the address inputs AD2 and AD0 fully until the first I2C transmission. AD0 and AD2 initially appear to be connected to V+ or GND. This is important because the address selection determines which inputs have pullups applied. However, at power-up, the I2C SDA and SCL bus interface lines are high impedance at the pins of every device (master or slave) connected to the bus, including the MAX7319. This is guaranteed as part _______________________________________________________________________________________ I2C Port Expander with Eight Inputs and Maskable Transition Detection MAX7319 Table 2. Read and Write Access to Eight-Port Expander Family PART I2C SLAVE ADDRESS INPUTS INTERRUPT MASK OPENDRAIN OUTPUTS PUSHPULL OUTPUTS I2C DATA WRITE I2C DATA READ MAX7319 110xxxx 8 Yes — — <I7–I0 interrupt mask> <I7–I0 port inputs> <I7–I0 transition flags> MAX7320 101xxxx — — — 8 <O7–O0 port outputs> <O7–O0 port inputs> MAX7321 110xxxx Up to 8 — Up to 8 — <P7–P0 port outputs> <P7–P0 port inputs> <P7–P0 transition flags> <O7, O6, I5–I2, O1, O0 port inputs> <0, 0, I5–I2 transition flags, 0, 0> <O7, O6, P5–P2, O1, O0 port inputs> <0, 0, P5–P2 transition flags, 0, 0> MAX7322 110xxxx 4 Yes — 4 <O7, O6 outputs, I5–I2 interrupt mask, O1, O0 outputs> MAX7323 110xxxx Up to 4 — Up to 4 4 <port outputs> MAX7328 0100xxx Up to 8 — Up to 8 — <P7–P0 port outputs> <P7–P0 port inputs> MAX7329 0111xxx Up to 8 — Up to 8 — <P7–P0 port outputs> <P7–P0 port inputs> of the I2C specification. Therefore, address inputs AD2 and AD0 that are connected to SDA or SCL normally appear at power-up to be connected to V+. The pullup selection logic uses AD0 to select whether pullups are enabled for ports I3–I0, and uses AD2 to select whether pullups are enabled for ports I7–I4. The rule is that a logic-high SDA or SCL connection selects the pullups, while a logic-low deselects the pullups (Table 3). The pullup configuration is correct on power-up for a standard I2C configuration, where SDA and SCL are pulled up to V+ by the external I2C pullup resistors. There are circumstances where the assumption that SDA = SCL = V+ on power-up is not true, for example, in true hot-swap applications, in which there is legitimate bus activity during power-up. Also, if SDA and SCL are terminated with pullup resistors to a different supply voltage than the MAX7319’s supply voltage, and if that pullup supply rises later than the MAX7319’s supply, then SDA or SCL may appear at power-up to be connected to GND. In such applications, use the four address combinations that are selected by connecting address inputs AD2 and AD0 to V+ or GND (shown in bold in Table 3). These selections are guaranteed to be correct at power-up, independent of SDA and SCL behavior. If one of the other 12 address combinations is used, be aware that an unexpected combination of pullups might be asserted until the first I2C transmission (to any device, not necessarily the MAX7319) is put on the bus. Port Inputs Port inputs switch at CMOS logic levels as determined by the expander’s supply voltage, and are overvoltage tolerant to +6V, independent of the expander’s supply voltage. Port-Input Transition Detection All eight input ports are monitored for changes since the expander was last accessed through the serial interface. The state of the input ports is stored in an internal “snapshot” register for transition monitoring. The snapshot is continuously compared with the actual input conditions, and if a change is detected for any port input, an internal transition flag is set for that port. The eight port inputs are sampled (internally latched into the snapshot register) and the old transition flags cleared during the I2C acknowledge of every MAX7319 read and write access. The previous port transition flags are read through the serial interface as the second byte of a 2-byte read sequence. _______________________________________________________________________________________ 7 MAX7319 I2C Port Expander with Eight Inputs and Maskable Transition Detection Table 3. MAX7319 Address Map PIN CONNECTION DEVICE ADDRESS AD0 A6 A5 A4 A3 A2 A1 A0 I7 I6 I5 I4 I3 I2 I1 I0 SCL GND 1 1 0 0 0 0 0 Y Y Y Y — — — — SCL V+ 1 1 0 0 0 0 1 Y Y Y Y Y Y Y Y SCL SCL 1 1 0 0 0 1 0 Y Y Y Y Y Y Y Y SCL SDA 1 1 0 0 0 1 1 Y Y Y Y Y Y Y Y SDA GND 1 1 0 0 1 0 0 Y Y Y Y — — — — SDA V+ 1 1 0 0 1 0 1 Y Y Y Y Y Y Y Y SDA SCL 1 1 0 0 1 1 0 Y Y Y Y Y Y Y Y SDA SDA 1 1 0 0 1 1 1 Y Y Y Y Y Y Y Y GND GND 1 1 0 1 0 0 0 — — — — — — — — GND V+ 1 1 0 1 0 0 1 — — — — Y Y Y Y Y GND SCL 1 1 0 1 0 1 0 — — — — Y Y Y GND SDA 1 1 0 1 0 1 1 — — — — Y Y Y Y V+ GND 1 1 0 1 1 0 0 Y Y Y Y — — — — V+ V+ 1 1 0 1 1 0 1 Y Y Y Y Y Y Y Y V+ SCL 1 1 0 1 1 1 0 Y Y Y Y Y Y Y Y V+ SDA 1 1 0 1 1 1 1 Y Y Y Y Y Y Y Y A long read sequence (more than 2 bytes) can be used to poll the expander continuously without the overhead of resending the slave address. If more than 2 bytes are read from the expander, the expander repeatedly returns the input port data followed by the transition flags. The inputs are repeatedly resampled and the transition flags repeatedly reset for each pair of bytes read. All changes that occur during a long read sequence are detected and reported. The MAX7319 includes an 8-bit interrupt mask register that selects which inputs generate an interrupt upon change. Each input’s transition flag is set when its input changes, independent of the interrupt mask register settings. The interrupt mask register allows the processor to be interrupted for critical events, while the inputs and the transition flags can be polled periodically to detect less critical events. The INT logic ensures that unnecessary interrupts are not asserted, yet data transitions are detected and reported regardless of when the transition occurs. The INT output is not reasserted during a read sequence to avoid recursive reentry into an interrupt service routine. If transition occurs during read sequence, the INT assertion is delayed until the STOP condition, however, INT is not reasserted upon a STOP condition if the changed input data is read before the STOP occurs. 8 40kΩ INPUT PULLUP ENABLED AD2 Transition-Detection Masks The transition-detection logic incorporates a transition flag and an interrupt mask bit for each input port. The eight change flags can be read through the serial interface, and the 8-bit interrupt mask is set through the serial interface. Each port’s transition flag is set when that port’s input changes, and the transition flag remains set even if the input returns to its original state. The port’s interrupt mask determines whether a transition on that input port generates an interrupt. Enable interrupts for high-priority inputs using the interrupt mask. The interrupt allows the system to respond quickly to changes on these inputs. Poll the MAX7319 periodically to monitor lessimportant inputs. The transition flags indicate whether a permanent or transient change has occurred on any input since the MAX7319 was last accessed. Serial Interface Serial Addressing The MAX7319 operates as a slave that sends and receives data through an I2C interface. The interface uses a serial data line (SDA) and a serial clock line (SCL) to achieve bidirectional communication between master(s) and slave(s). The master initiates all data transfers to and from the MAX7319 and generates the SCL clock that synchronizes the data transfer (Figure 1). _______________________________________________________________________________________ I2C Port Expander with Eight Inputs and Maskable Transition Detection MAX7319 SDA tLOW tBUF tSU,STA tSU,DAT tHD,STA tSU,STO tHD,DAT tHIGH SCL tHD,STA tR tF START CONDITION REPEATED START CONDITION START CONDITION STOP CONDITION Figure 1. 2-Wire Serial-Interface Timing Details SDA operates as both an input and an open-drain output. A pullup resistor, typically 4.7kΩ, is required on SDA. SCL operates only as an input. A pullup resistor, typically 4.7kΩ, is required on SCL if there are multiple masters on the 2-wire interface, or if the master in a single-master system has an open-drain SCL output. Each transmission consists of a START condition sent by a master, followed by the MAX7319’s 7-bit slave address plus R/W bit, then 1 or more data bytes, and finally a STOP condition (Figure 2). START and STOP Conditions Both SCL and SDA remain high when the interface is not busy. A master signals the beginning of a transmission with a START (S) condition by transitioning SDA from high to low while SCL is high. When the master has finished communicating with the slave, the master issues a STOP (P) condition by transitioning SDA from low to high while SCL is high. The bus is then free for another transmission (Figure 2). Bit Transfer One data bit is transferred during each clock pulse. The data on SDA must remain stable while SCL is high (Figure 3). Acknowledge The acknowledge bit is a clocked 9th bit the recipient uses to acknowledge receipt of each byte of data (Figure 4). Each byte transferred effectively requires 9 bits. The master generates the 9th clock pulse, and the recipient pulls down SDA during the acknowledge clock pulse, so the SDA line is stable low during the high period of the clock pulse. When the master is transmitting to the MAX7319, the MAX7319 generates the acknowledge bit because the device is the recipient. SDA SCL S P START CONDITION STOP CONDITION Figure 2. START and STOP Conditions SDA SCL DATA LINE STABLE; CHANGE OF DATA DATA VALID ALLOWED Figure 3. Bit Transfer CLOCK PULSE FOR ACKNOWLEDGMENT START CONDITION SCL 1 2 8 9 SDA BY TRANSMITTER SDA BY RECEIVER S Figure 4. Acknowledge When the MAX7319 is transmitting to the master, the master generates the acknowledge bit because the master is the recipient. _______________________________________________________________________________________ 9 MAX7319 I2C Port Expander with Eight Inputs and Maskable Transition Detection Slave Address The MAX7319 has a 7-bit slave address (Figure 5). The 8th bit following the 7-bit slave address is the R/W bit. It is low for a write command, and high for a read command. The 1st (A6), 2nd (A5), and 3rd (A4) bits of the MAX7319 slave address are always 1, 1, and 0. Connect AD2 and AD0 to GND, V+, SDA, or SCL to select slave address bits A3, A2, A1, and A0. The MAX7319 has 16 possible slave addresses (Table 3), allowing up to 16 MAX7319 devices on an I2C bus A 2-byte read returns the status of the eight input ports (as for a single-byte read), followed by the transition flags. The internal transition flags and the INT output are cleared when the MAX7319 acknowledges the slave address byte, but the previous transition flag data is sent as the second byte (Figure 8). A multibyte read (more than 2 bytes before the I2C STOP bit) repeatedly returns the input port data, alternating with the transition flags. As the input data is resampled for each transmission, and the transition flags are reset each time, a multibyte read continuously returns the current data and identifies any changing input ports. Accessing the MAX7319 I2C-interface access to the MAX7319 is summarized as follows (Table 2). A single-byte read from the MAX7319 returns the status of the eight input ports, and clears both the internal transition flags and the INT output (Figure 7). If a port input data change occurs during the read sequence, INT is reasserted after the I2C STOP bit. The MAX7319 does not generate another interrupt during a single-byte or multibyte read. . 1 SDA 1 0 A2 A3 A1 A0 R/W ACK LSB MSB SCL Figure 5. Slave Address PORT INPUTS I6 I7 S 1 1 0 MAX7319 SLAVE ADDRESS R/W 1 A D7 I5 D6 I4 D5 I3 D4 PORT SNAPSHOT I1 I2 D3 D2 I0 D1 D0 N P PORT SNAPSHOT SCL tPH PORT INPUT tIV tPSU tIR INT OUTPUT INT REMAINS HIGH UNTIL STOP CONDITION S = START CONDITION P = STOP CONDITION SHADED = SLAVE TRANSMISSION N = NOT ACKNOWLEDGE Figure 6. Reading from the MAX7319 (1 Data Byte) 10 tIP ______________________________________________________________________________________ I2C Port Expander with Eight Inputs and Maskable Transition Detection When the master reads 1 byte from the MAX7319 and subsequently issues a STOP condition (Figure 6), the MAX7319 transmits the current port data, clears the transition flags, and resets the transition detection. INT deasserts during the slave address acknowledge. The new snapshot data is the current port data transmitted to the master; therefore, port transitions ocurring during the transmission are detected. INT remains high until the STOP condition. When the master reads 2 bytes from the MAX7319 and subsequently issues a STOP condition (Figure 7), the MAX7319 transmits the current port data, followed by the transition flags. The transition flags are cleared, and transition detection reset. INT deasserts during the slave address acknowledge. The new snapshot data is the current port data transmitted to the master; therefore, port transitions occurring during the transmission are detected. INT remains high until the STOP condition. When the master reads more than 2 bytes, the input port data alternates with the transition flag. A single-byte write to the MAX7319 sets the interrupt mask register, and clears both the internal transition flags and the INT output. A multibyte write to the MAX7319 sets the interrupt mask register repeatedly. Reading from the MAX7319 A read from the MAX7319 starts with the master transmitting the MAX7319’s slave address with the R/W bit set high. The MAX7319 acknowledges the slave address and samples the input ports during acknowledge bit. INT deasserts during the slave address acknowledge. Typically, the master reads 1 or 2 bytes from the MAX7319, with each byte, except the last one, being acknowledged by the master upon reception. PORT INPUTS I7 S 1 1 0 MAX7319 SLAVE ADDRESS 1 A D7 R/W I6 D6 I5 D5 PORT SNAPSHOT I4 I3 D4 INTERRUPT FLAGS I1 I2 D3 D2 D1 I0 D0 PORT SNAPSHOT F7 A D7 F6 D6 F5 D5 F4 D4 F3 D3 F2 D2 F1 F0 D1 D0 N P PORT SNAPSHOT SCL tPH PORTS tPSU tIV INT OUTPUT tIR tIP INT REMAINS HIGH UNTIL STOP CONDITION S = START CONDITION P = STOP CONDITION SHADED = SLAVE TRANSMISSION N = NOT ACKNOWLEDGE Figure 7. Reading from the MAX7319 (2 Data Bytes) ______________________________________________________________________________________ 11 MAX7319 Input port data is sampled during the preceding I2C acknowledge bit (the acknowledge bit for the I2C slave address in the case of a single-byte or 2-byte read). MAX7319 I2C Port Expander with Eight Inputs and Maskable Transition Detection 1 SCL 2 3 4 5 6 7 8 DATA TO INTERRUPT MASK SLAVE ADDRESS SDA S START CONDITION 0 A DATA TO INTERRUPT MASK DATA 1 DATA 2 A A R/W tPV tPV S = START CONDITION P = STOP CONDITION SHADED = SLAVE TRANSMISSION N = NOT ACKNOWLEDGE Figure 8. Writing to the MAX7319 Writing to the MAX7319 A write to the MAX7319 starts with the master transmitting the MAX7319’s slave address with the R/W bit set low. The MAX7319 acknowledges the slave address, and samples the input ports during the acknowledge bit. INT deasserts during the slave address acknowledge. The master can now transmit 1 or more bytes of data. The MAX7319 acknowledges these subsequent bytes of data and updates the interrupt mask register with each new byte until the master issues a STOP condition (Figure 8). Applications Information Port Input and I2C Interface Level Translation from Higher or Lower Logic Voltages The MAX7319 I 2C interface (SDA, SCL, AD0, AD2), reset input RST, interrupt output INT, and the eight input ports I0–I7 are overvoltage protected to +6V independent of V+. This allows the MAX7319 to operate from a lower supply voltage, such as +3.3V, while the I2C interface and/or any of the eight input ports are driven from a higher logic level, such as +5V. The MAX7319 can operate from a higher supply voltage, such as +3V, while the I2C interface and/or some of the input ports I0–I7 are driven from a lower logic level, such as +2.5V. Apply a minimum voltage of 0.7 x V+ to assert a logic-high on any input. For example, a MAX7319 operating from a +5V supply may not recognize a +3.3V nominal logic-high. One solution for input level translation is to drive the MAX7319 inputs from open-drain outputs. Use a pullup resistor to V+ or a higher supply to ensure a high logic voltage of greater than 0.7 x V+. 12 Hot Insertion RST, SCL, SDA, AD0, and AD2 remain high impedance with up to +6V asserted on them when the MAX7319 is powered down (V+ = 0). The MAX7319 can therefore be used in hot-swap applications. Each of the input ports I0–I7 has a protection diode to GND (Figure 9). When a port input is driven to a voltage lower than GND, the protection diode clamps the voltage to a diode drop below GND. Each of the input ports I0–I7 also has a 40kΩ (typ) pullup resistor that can be enabled or disabled. When a port input is driven to a voltage higher than V+, the body diode of the pullup enable switch conducts and the 40kΩ pullup resistor is enabled. When the MAX7319 is powered down (V+ = 0), every input port appears as a 40kΩ resistor in series with a diode connected to GND. Input ports are protected to +6V under any of these circumstances (Figure 9). V+ V+ MAX7319 PULLUP ENABLE P 40kΩ I0–I7 INPUT Figure 9. Input Port Structure ______________________________________________________________________________________ I2C Port Expander with Eight Inputs and Maskable Transition Detection Compatibility with MAX6965, MAX7315, and MAX7316 The MAX7319 is subset pin compatible with the MAX6965, MAX7315, and MAX7316. The pin differences are shown in Table 4. The MAX7319 is not software compatible with MAX6965, MAX7315, or MAX7316. In many cases, it is possible to design a PC board to work with all these port expanders, providing design flexibility. Table 4. MAX7319, MAX6965, MAX7315, and MAX7316 Pin Compatibility PIN-PACKAGE 16 QSOP 16 TQFN MAX7319 MAX7315 MAX6965 AND MAX7316 1 15 AD0 AD0 BLINK 2 16 RST AD1 RST 3 1 AD2 AD2 AD0 SCL INT I7 I6 Pin Configurations 12 11 10 9 TOP VIEW 8 I5 V+ 14 7 I4 AD0 15 * EP GND I3 3 4 47nF V+ µC SCL SCL SDA SDA I6 RST RST I5 INT INT MAX7319 I7 I4 I3 I2 AD0 AD2 2 I2 AD2 1 5 I1 + 6 I0 RST 16 Typical Application Circuit 3.3V SDA 13 MAX7319 PIN FUNCTION I1 I0 INPUT 7 INPUT 6 INPUT 5 INPUT 4 INPUT 3 INPUT 2 INPUT 1 INPUT 0 GND TQFN 3mm x 3mm * EXPOSED PAD CONNECTED TO GND. AD0 1 + 16 V+ RST 2 15 SDA AD2 3 I0 4 14 SCL MAX7319 13 INT I1 5 12 I7 I2 6 11 I6 I3 7 10 I5 GND 8 9 I4 QSOP ______________________________________________________________________________________ 13 MAX7319 Power-Supply Considerations The MAX7319 operates with a +1.71V to +5.5V supply voltage over the -40°C to +125°C temperature range. Bypass V+ to GND with a ceramic capacitor of at least 0.047µF as close to the device as possible. For the TQFN version, connect the exposed pad to GND. MAX7319 I2C Port Expander with Eight Inputs and Maskable Transition Detection Functional Diagram AD0 AD2 SCL SDA INPUT FILTER I2C CONTROL INPUT PORTS I7 I6 I5 I4 I3 I2 I1 I0 INT RST POWER-ON RESET MAX7319 Chip Information PROCESS: BiCMOS CONNECT EXPOSED PAD TO GND 14 ______________________________________________________________________________________ I2C Port Expander with Eight Inputs and Maskable Transition Detection 12x16L QFN THIN.EPS (NE - 1) X e E MARKING E/2 D2/2 (ND - 1) X e AAAA D/2 e CL D D2 k b CL 0.10 M C A B E2/2 L E2 CL 0.10 C CL 0.08 C A A2 L A1 L e e PACKAGE OUTLINE 12, 16L THIN QFN, 3x3x0.8mm F 21-0136 PKG 12L 3x3 MIN. NOM. MAX. MIN. NOM. MAX. A 0.70 0.75 0.80 0.70 0.75 0.80 b 0.20 0.25 0.30 0.20 0.25 0.30 D 2.90 3.00 3.10 2.90 3.00 3.10 E e 2.90 3.00 3.10 2.90 3.00 3.10 L 0.45 0.50 BSC. 0.50 BSC. 0.65 0.30 0.40 0.50 EXPOSED PAD VARIATIONS PKG. CODES T1233-1 E2 D2 DOWN BONDS ALLOWED PIN ID JEDEC 1.25 0.35 x 45¡ WEED-1 NO MIN. NOM. MAX. MIN. NOM. MAX. 0.95 1.10 1.25 0.95 1.10 T1233-3 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45¡ WEED-1 YES T1233-4 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45¡ WEED-1 YES T1633-1 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45¡ WEED-2 NO N 12 16 T1633-2 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45¡ WEED-2 YES ND 3 4 T1633F-3 0.65 0.80 0.95 0.65 0.80 0.95 0.225 x 45¡ WEED-2 N/A T1633FH-3 0.65 0.80 0.95 0.65 0.80 0.95 0.225 x 45¡ WEED-2 N/A T1633-4 0.95 1.10 1.25 0.95 1.10 1.25 0.35 x 45¡ WEED-2 NO NE A1 A2 k 3 0 0.02 0.20 REF 0.25 2 16L 3x3 REF. 0.55 1 4 0.05 - 0 0.02 0.05 0.25 0.20 REF - - NOTES: 1. DIMENSIONING & TOLERANCING CONFORM TO ASME Y14.5M-1994. 2. ALL DIMENSIONS ARE IN MILLIMETERS. ANGLES ARE IN DEGREES. 3. N IS THE TOTAL NUMBER OF TERMINALS. 4. THE TERMINAL #1 IDENTIFIER AND TERMINAL NUMBERING CONVENTION SHALL CONFORM TO JESD 95-1 SPP-012. DETAILS OF TERMINAL #1 IDENTIFIER ARE OPTIONAL, BUT MUST BE LOCATED WITHIN THE ZONE INDICATED. THE TERMINAL #1 IDENTIFIER MAY BE EITHER A MOLD OR MARKED FEATURE. 5. DIMENSION b APPLIES TO METALLIZED TERMINAL AND IS MEASURED BETWEEN 0.20 mm AND 0.25 mm FROM TERMINAL TIP. 6. ND AND NE REFER TO THE NUMBER OF TERMINALS ON EACH D AND E SIDE RESPECTIVELY. 7. DEPOPULATION IS POSSIBLE IN A SYMMETRICAL FASHION. 8. COPLANARITY APPLIES TO THE EXPOSED HEAT SINK SLUG AS WELL AS THE TERMINALS. 9. DRAWING CONFORMS TO JEDEC MO220 REVISION C. 10. MARKING IS FOR PACKAGE ORIENTATION REFERENCE ONLY 11. NUMBER OF LEADS SHOWN ARE FOR REFERENCE ONLY PACKAGE OUTLINE 12, 16L THIN QFN, 3x3x0.8 21-0136 F 2 2 ______________________________________________________________________________________ 15 MAX7319 Package Information (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) Package Information (continued) (The package drawing(s) in this data sheet may not reflect the most current specifications. For the latest package outline information, go to www.maxim-ic.com/packages.) QSOP.EPS MAX7319 I2C Port Expander with Eight Inputs and Maskable Transition Detection PACKAGE OUTLINE, QSOP .150", .025" LEAD PITCH 21-0055 E 1 1 Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time. 16 ____________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 408-737-7600 © 2005 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products, Inc.