TI SN74ABTH32245PZG4

SN54ABTH32245, SN74ABTH32245
36-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS228G – JUNE 1992 – REVISED MAY 1997
D
D
D
D
D
D
D
Members of the Texas Instruments
Widebus+ Family
State-of-the-Art EPIC-ΙΙB BiCMOS Design
Significantly Reduces Power Dissipation
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
Typical VOLP (Output Ground Bounce)
< 0.8 V at VCC = 5 V, TA = 25°C
High-Impedance State During Power Up
and Power Down
Released as DSCC SMD 5962-9557701NXD
PZ Package Qualified for Military Per
MIL-PRF-38535 (QML)
D
D
D
D
Distributed VCC and GND Pin Configuration
Minimizes High-Speed Switching Noise
High-Drive Outputs (–32-mA IOH, 64-mA IOL)
Bus Hold on Data Inputs Eliminates the
Need for External Pullup/Pulldown
Resistors
Package Options Include 100-Pin Plastic
Thin Quad Flat (PZ) Package With
14 × 14-mm Body Using 0.5-mm Lead Pitch
and Space-Saving 100-Pin Ceramic Quad
Flat (HS) Package†
1A8
1A7
1A6
GND
1A5
1A4
1A3
1A2
1A1
GND
1DIR
1OE
VCC
2OE
2DIR
GND
1B1
1B2
1B3
1B4
1B5
GND
1B6
1B7
1B8
’ABTH32245 . . . PZ PACKAGE
(TOP VIEW)
100 99 98 97 96 95 94 93 92 91 90 89 88 87 86 85 84 83 82 81 80 79 78 77 76
1A9
2A1
GND
2A2
2A3
2A4
2A5
GND
2A6
2A7
2A8
2A9
VCC
3A1
3A2
3A3
3A4
GND
3A5
3A6
3A7
3A8
GND
3A9
4A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
1B9
2B1
GND
2B2
2B3
2B4
2B5
GND
2B6
2B7
2B8
2B9
VCC
3B1
3B2
3B3
3B4
GND
3B5
3B6
3B7
3B8
GND
3B9
4B1
4A2
4A3
4A4
GND
4A5
4A6
4A7
4A8
4A9
GND
4DIR
4OE
VCC
3OE
3DIR
GND
4B9
4B8
4B7
4B6
4B5
GND
4B4
4B3
4B2
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
† The HS package is not production released.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Widebus+ and EPIC-ΙΙB are trademarks of Texas Instruments Incorporated.
Copyright  1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303
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1
SN54ABTH32245, SN74ABTH32245
36-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS228G – JUNE 1992 – REVISED MAY 1997
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
80
79
78
77
76
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
1B7
1B8
1B9
2B1
GND
2B2
2B3
2B4
2B5
GND
2B6
2B7
2B8
2B9
VCC
3B1
3B2
3B3
3B4
GND
3B5
3B6
3B7
3B8
GND
3B9
4B1
4B2
4B3
4B4
4A4
GND
4A5
4A6
4A7
4A8
4A9
GND
4DIR
4OE
VCC
3OE
3DIR
GND
4B9
4B8
4B7
4B6
4B5
GND
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
1A6
1A7
1A8
1A9
2A1
GND
2A2
2A3
2A4
2A5
GND
2A6
2A7
2A8
2A9
VCC
3A1
3A2
3A3
3A4
GND
3A5
3A6
3A7
3A8
GND
3A9
4A1
4A2
4A3
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
GND
1A5
1A4
1A3
1A2
1A1
GND
1DIR
1OE
VCC
2OE
2DIR
GND
1B1
1B2
1B3
1B4
1B5
GND
1B6
SN54ABTH32245 . . . HS PACKAGE†
(TOP VIEW)
† For HS package availability, please contact the factory or your local TI Field Sales Office.
description
The ’ABTH32245 are 36-bit (quad 9-bit) noninverting 3-state transceivers designed for synchronous two-way
communication between data buses. The control-function implementation minimizes external timing
requirements.
These devices can be used as four 9-bit transceivers, two18-bit transceivers, or one 36-bit transceiver. They
allow data transmission from the A bus to the B bus or from the B bus to the A bus, depending on the logic level
at the direction-control (DIR) inputs. The output-enable (OE) inputs can be used to disable the device so that
the buses are effectively isolated.
When VCC is between 0 and 2.1 V, the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 2.1 V, OE should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
Active bus-hold circuitry holds unused or floating data inputs at a valid logic level.
2
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SN54ABTH32245, SN74ABTH32245
36-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS228G – JUNE 1992 – REVISED MAY 1997
description (continued)
The SN54ABTH32245 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABTH32245 is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
(each 9-bit section)
INPUTS
OPERATION
OE
DIR
L
L
B data to A bus
L
H
A data to B bus
H
X
Isolation
logic diagram (positive logic)
1DIR
90
3DIR
89
1A1
92
39
1OE
One of Nine
Channels
3A1
84
40
14
2DIR
62
4DIR
87
2A1
3B1
To Eight Other Channels
86
2
One of Nine
Channels
1B1
To Eight Other Channels
3OE
37
2OE
One of Nine
Channels
4A1
74
36
25
One of Nine
Channels
51
2B1
To Eight Other Channels
4OE
4B1
To Eight Other Channels
Pin numbers shown are for the PZ package.
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3
SN54ABTH32245, SN74ABTH32245
36-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS228G – JUNE 1992 – REVISED MAY 1997
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)†
Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Input voltage range, VI (except I/O ports) (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –0.5 V to 7 V
Voltage range applied to any output in the high or power-off state, VO . . . . . . . . . . . . . . . . . . . –0.5 V to 5.5 V
Current into any output in the low state, IO: SN54ABTH32245 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA
SN74ABTH32245 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA
Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –18 mA
Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –50 mA
Package thermal impedance, θJA (see Note 2): PZ package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50°C/W
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –65°C to 150°C
† Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51.
recommended operating conditions (see Note 3)
SN54ABTH32245
MIN
MAX
4.5
5.5
4.5
5.5
Supply voltage
VIL
VI
Low-level input voltage
IOH
IOL
High-level output current
∆t/∆v
Input transition rise or fall rate
∆t/∆VCC
TA
Power-up ramp rate
200
Operating free-air temperature
–55
2
2
0.8
Input voltage
0
Low-level output current
Outputs enabled
NOTE 3: Unused control pins must be held high or low to prevent them from floating.
4
MAX
VCC
VIH
High-level input voltage
SN74ABTH32245
MIN
POST OFFICE BOX 655303
• DALLAS, TEXAS 75265
VCC
–24
V
V
0.8
0
UNIT
VCC
–32
V
V
mA
48
64
mA
10
10
ns/V
µs/V
200
125
–40
85
°C
SN54ABTH32245, SN74ABTH32245
36-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS228G – JUNE 1992 – REVISED MAY 1997
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER
VIK
VOH
II = –18 mA
IOH = –3 mA
VCC = 5 V,
IOH = –3 mA
IOH = –24 mA
MIN
–1.2
–1.2
2.5
2.5
3
3
0.55
IOL = 64 mA
0.55
100
A or B ports
II
Control inputs
A or B ports
II(hold)
I(h ld)
A or B ports
VCC = 0 to 5.5 V,
VCC = 2.1 V to 5.5 V,
VI = VCC or GND
VI = VCC or GND
VCC = 5
5.5
5 V,
V
VI = VCC or GND
VCC = 4
4.5
5V
VI = 0.8 V
VI = 2 V
IOZPU‡
IOZPD‡
VCC = 0 to 2.1 V, VO = 0.5 V to 2.7 V, OE = X
VCC = 2.1 V to 0, VO = 0.5 V to 2.7 V, OE = X
Ioff
ICEX
IO§
VCC = 0,
VCC = 5.5 V, VO = 5.5 V
VI or VO ≤ 4.5 V
Outputs high
VCC = 5.5 V,
VO = 2.5 V
Outputs high
ICC
VCC = 5.5 V,
IO = 0,
VI = VCC or GND
∆ICC¶
VCC = 5.5 V, One input at 3.4 V,
Other inputs at VCC or GND
Ci
Control inputs
Cio
A or B ports
V
2
0.55
Vhys
Control inputs
UNIT
V
2
IOH = –32 mA
IOL = 48 mA
VCC = 4
4.5
5V
SN74ABTH32245
TYP†
MAX
MIN
VCC = 4.5 V,
VCC = 4.5 V,
VCC = 4
4.5
5V
VOL
SN54ABTH32245
TYP†
MAX
TEST CONDITIONS
100
mV
±1
±20
±1
100
100
–100
–100
µA
±50
±50
µA
±50
±50
µA
±100
µA
50
–100
–180
Outputs low
Outputs disabled
VI = 2.5 V or 0.5 V
VO = 2.5 V or 0.5 V
µA
µA
±20
–50
V
–50
–100
50
µA
–180
mA
3
3
20
20
2
2
1
1
mA
mA
3.5
3.5
pF
9.5
9.5
pF
† All typical values are at VCC = 5 V, TA = 25°C.
‡ This parameter is specified by characterization.
§ Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
¶ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND.
switching characteristics over recommended ranges of supply voltage and operating free-air
temperature, CL = 50 pF (unless otherwise noted) (see Figure 1)
FROM
(INPUT)
TO
(OUTPUT)
tPLH
tPHL
A or B
B or A
tPZH
tPZL
OE
B or A
tPHZ
tPLZ
OE
B or A
PARAMETER
VCC = 5 V,
TA = 25°C#
SN54ABTH32245
SN74ABTH32245
MIN
TYP
MAX
MIN
MAX
MIN
1.7
3.2
4.4
1
5.3
1.7
5
1.7
3.3
4.6
1
5.3
1.7
5.2
1.6
4.2
6.1
1
7.6
1.6
7.3
2.7
5.2
7
1.5
8.2
2.7
8.1
1.3
3.9
6.1
0.8
6.7
1.3
6.5
2
4.4
6.6
1
7.2
2
6.9
UNIT
MAX
ns
ns
ns
# These limits apply only to the SN74ABTH32245
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5
SN54ABTH32245, SN74ABTH32245
36-BIT BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS228G – JUNE 1992 – REVISED MAY 1997
PARAMETER MEASUREMENT INFORMATION
500 Ω
From Output
Under Test
S1
7V
Open
GND
CL = 50 pF
(see Note A)
500 Ω
TEST
S1
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
Open
7V
Open
3V
LOAD CIRCUIT
Timing Input
1.5 V
0V
tw
tsu
3V
th
3V
1.5 V
Input
1.5 V
0V
Data Input
1.5 V
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
VOLTAGE WAVEFORMS
PULSE DURATION
3V
1.5 V
Input
1.5 V
0V
VOH
1.5 V
Output
1.5 V
VOL
VOH
1.5 V
1.5 V
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
1.5 V
1.5 V
0V
tPZL
tPLZ
Output
Waveform 1
S1 at 7 V
(see Note B)
tPLH
tPHL
Output
3V
Output
Control
tPHL
tPLH
1.5 V
Output
Waveform 2
S1 at Open
(see Note B)
1.5 V
3.5 V
VOL + 0.3 V
VOL
tPHZ
tPZH
1.5 V
VOH – 0.3 V
VOH
≈0V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
6
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PACKAGE OPTION ADDENDUM
www.ti.com
6-Feb-2007
PACKAGING INFORMATION
Orderable Device
Status (1)
Package
Type
Package
Drawing
Pins Package Eco Plan (2)
Qty
5962-9557701NXD
ACTIVE
LQFP
PZ
100
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
SN74ABTH32245PZ
ACTIVE
LQFP
PZ
100
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
SN74ABTH32245PZG4
ACTIVE
LQFP
PZ
100
90
Green (RoHS &
no Sb/Br)
CU NIPDAU
Level-3-260C-168 HR
Lead/Ball Finish
MSL Peak Temp (3)
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in
a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check
http://www.ti.com/productcontent for the latest availability information and additional product content details.
TBD: The Pb-Free/Green conversion plan has not been defined.
Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements
for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered
at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes.
Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and
package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS
compatible) as defined above.
Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame
retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)
(3)
MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder
temperature.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is
provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the
accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take
reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on
incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited
information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI
to Customer on an annual basis.
Addendum-Page 1
MECHANICAL DATA
MTQF013A – OCTOBER 1994 – REVISED DECEMBER 1996
PZ (S-PQFP-G100)
PLASTIC QUAD FLATPACK
0,27
0,17
0,50
75
0,08 M
51
76
50
100
26
1
0,13 NOM
25
12,00 TYP
Gage Plane
14,20
SQ
13,80
16,20
SQ
15,80
0,05 MIN
1,45
1,35
0,25
0°– 7°
0,75
0,45
Seating Plane
0,08
1,60 MAX
4040149 /B 11/96
NOTES: A. All linear dimensions are in millimeters.
B. This drawing is subject to change without notice.
C. Falls within JEDEC MS-026
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1
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