September 1999 ML6421* Triple Phase and Sinx/x Equalized, Low-Pass Video Filter GENERAL DESCRIPTION FEATURES The ML6421 monolithic BiCMOS 6th-order filter provides fixed frequency low pass filtering for video applications. This triple phase-equalized filter with Sinx/x correction is designed for reconstruction filtering at the output of a Video DAC. ■ 5.5, 8.0, 9.3, or 3.0MHz bandwidth ■ 1x or 2x gain ■ 6th-order filter with phase and amplitude equalizer ■ >40dB stopband rejection Cut-off frequencies are either 5.5, 8.0, or 3.0MHz. Each channel incorporates a 6th-order lowpass filter, a first order all-pass filter, a gain boost circuit, and a 75Ω coax cable driver. A control pin (Range) is provided to allow the inputs to swing from 0 to 1V, or 0.5 to 1.5V, by providing a 0.5V offset to the input. ■ No external components or clocks ■ ±10% frequency accuracy over maximum supply and temperature variation ■ <2% differential gain <2° differential phase ■ <25ns group delay variation ■ Drives 1VP-P into 75Ω, or 2VP-P into 150Ω ■ 5V ±10% operation The unity gain filters are powered from a single 5V supply, and can drive 1VP-P over 75Ω (0.5V to 1.5V), or 2VP-P over 150Ω (0.5V to 2.5V) with the internal coax drivers. BLOCK DIAGRAM VINA 15 VCCB VCCC VCC VCCA 8 6 5 11 BUF 3kΩ LOW PASS FILTER A ALL PASS FILTER SINX/X EQUALIZER ALL PASS FILTER SINX/X EQUALIZER ALL PASS FILTER SINX/X EQUALIZER *Some Packages Are Obsolete 1X/2X BUF 10 VOUTA 3.33kΩ IBIAS 1kΩ VINB 16 BUF 3kΩ LOW PASS FILTER B 1X/2X BUF 9 VOUTB 7 VOUTC 3.33kΩ IBIAS 1kΩ VINC 2 BUF 3kΩ LOW PASS FILTER C 1X/2X BUF 3.33kΩ IBIAS RANGE 14 1kΩ FilterA Filter B Filter C 12 13 4 1 3 GND GNDA GNDC GNDB GND ML6221-1 5.5MHz 5.5MHz 5.5MHz 1x GAIN ML6421-3 8.0MHz 8.0MHz 8.0MHz ML6421-4 8.0MHz 3.0MHz 3.0MHz 2x GAIN ML6421-5 ML6421-7 5.5MHz 9.3MHz 5.5MHz 9.3MHz 5.5MHz 9.3MHz Triple Input/Anti-aliasing Video Filter 1 ML6421 PIN CONFIGURATION ML6421 16-Pin Wide SOIC (S16W) GNDB 1 16 VINB VINC 2 15 VINB GND 3 14 RANGE GNDC 4 13 GNDA VCC 5 12 GND VCCC 6 11 VCCA VOUTC 7 10 VOUTA VCCB 8 9 VOUTA TOP VIEW PIN DESCRIPTION PIN NAME FUNCTION PIN NAME FUNCTION 1 GNDB Ground pin for filter B. 11 VCC A Power supply for filter A. 2 VINC Signal input to filter C. Input impedance is 4kΩ. 12 GND Power and logic ground. 13 GNDA Ground pin for filter A. 3 GND Power and logic ground. 14 RANGE 4 GNDC Ground pin for filter C. 5 VCC Positive supply. 6 VCCC Power supply for filter C. 7 VOUTC Output of filter C. Drive is 1VP-P into 75Ω (0.5V to 1.5V), or 2VP-P into 150Ω (0.5V to 2.5V). 8 VCCB Power supply for filter B: 4.5V to 5.5V. Input signal range select. For –1 to –4; when RANGE is low (0), the input signal range is 0.5V to 2.5V, with an output range of 0.5V to 2.5V. When RANGE is high (1), the input signal range is 0V to 2V, with an output range of 0.5V to 2.5V. For –5 to –7; when RANGE is low (0), the input signal range is 0.5V to 1.5V, with an output range of 0.5V to 2.5V. When RANGE is high (1), the input signal range is 0V to 1V, with an output range of 0.5V to 2.5V. 9 VOUTB Output of filter B. Drive is 1VP-P into 75Ω (0.5V to 1.5V), or 2VP-P into 150Ω (0.5V to 2.5V). 15 VINA Signal input to filter A. Input impedance is 4kΩ. VOUTA Output of filter A. Drive is 1VP-P into 75Ω (0.5V to 1.5V), or 2VP-P into 150Ω (0.5V to 2.5V). 16 VINB Signal input to filter B. Input impedance is 4kΩ. 10 2 ML6421 ABSOLUTE MAXIMUM RATINGS Absolute maximum ratings are those values beyond which the device could be permanently damaged. Absolute maximum ratings are stress ratings only and functional device operation is not implied. Supply Voltage (VCC) ....................... –5.5MHz0.3 to +7V GND .................................................. –0.3 to VCC +0.3V Logic Inputs ........................................ –0.3 to VCC +0.3V Input Current per Pin ............................................ ±25mA Storage Temperature .................................. –65° to 150°C Package Dissipation at TA = 25°C .............................. 1W Lead Temperature (Soldering 10 sec) ...................... 260°C Thermal Resistance (θJA) ..................................... 65°C/W OPERATING CONDITIONS TSupply Voltage ............................................... 5V ± 10% Temperature Range ................................ 0°C < to < 70°C ELECTRICAL CHARACTERISTICS Unless otherwise specified VCC = 5V ± 10% and TA = TMIN to TMAX, RL =75Ω or 150Ω, VOUT = 2VP-P for 150Ω Load and VOUT = 1VP-P for 75Ω Load (Note 1) SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS 3 4 5 kΩ ±2 % GENERAL RIN Input Impedance DR/RIN Input R Matching IBIAS Input Current Small Signal Gain Differential Gain VIN = 0.5V, ML6421(–1 to –4) –80 µA range = low ML6421(–5 to –7) 45 µA VIN = 0.0V, ML6421(–1 to –4) –125 µA range = high ML6421(–5 to –7) –210 µA VIN = 100mVP-P ML6421(–1 to –4) –0.5 0 0.5 dB at 100kHz ML6421(–5 to –7) 5.5 6 6.5 dB VIN = 1.1V to 2.5V ML6421(–1 to –4) 1 % ML6421(–5 to –7) 1 % ML6421(–1 to –4) 1 deg ML6421(–5 to –7) 1 deg at 3.58 & 4.43 MHz VIN = 0.8V to 1.5V at 3.58 & 4.43 MHz Differential Phase VIN = 1.1V to 2.5V at 3.58 & 4.43 MHz VIN = 0.8V to 1.5V at 3.58 & 4.43 MHz V IN Input Range Range = 0 ML6421(–1 to –4) 0.5 ML6421(–5 to –7) 0.5 1.5 V ML6421(–1 to –4) 0.0 2.0 V ML6421(-5 to -8) 0.0 1 V Peak Overshoot 2T, 0.7VP-P pulse 2.0 % Crosstalk Rejection fIN = 3.58, ML6421(–1 to –4) 50 dB fIN = 4.43MHz (Note 6) ML6421(–5 to –7) 45 dB Range = 1 2.5 V Channel to Channel Group Delay Matching (fC = 5.5MHz) fIN = 100kHz ±10 ns Channel to Channel Group Matching fIN = 100kHz ±2 % 3 ML6421 ELECTRICAL CHARACTERISTICS SYMBOL (Continued) PARAMETER CONDITIONS MIN TYP MAX UNITS GENERAL (Continued) Output Current CL RL = 0 (short circuit) 175 Load Capacitance Composite Chroma mA 35 fC = 5.5MHz /Luma delay pF ML6421(–1 to –4) ±15 ns ML6421(–5 to –7) ±15 ns ±8 ns fC = 8.0MHz/9.3MHz 5.50MHZ FILTER (ML6421-1, -5) Bandwidth –0.75dB (Note 5) ML6421(–1 to –4) 4.95 5.50 6.05 MHz (monotonic passband) –0.55dB (Note 5) ML6421(–5 to –7) 4.95 5.50 6.05 MHz Subcarrier Frequency Gain fIN = 3.58MHz ML6421(–1 to –4) –0.3 0.2 0.7 dB ML6421(–5 to –7) –0.9 1.4 1.9 dB ML6421(–1 to – 4) – 0.35 0.1 0.65 dB ML6421(–5 to –7) 1.1 1.6 2.1 dB ML6421(–1 to –4) 16 18 dB ML6421(–5 to –7) 20 25 dB 40 45 dB ML6421-1 fIN = 4.43MHz Attenuation fIN = 10MHz fIN = 50MHz Output Noise BW = 30MHz (Note 6) 1000 Group Delay 145 µV RMS ns 8.0MHZ FILTER Bandwidth (monotonic passband) Subcarrier Frequency Gain ML6421-3 or ML6421 4/ML6421-7 Attenuation Output Noise –3dB (Note 5) 7.2 8 8.8 MHz fIN = 3.58MHz –0.25 0.25 0.75 dB fIN = 4.43MHz –0.11 0.39 0.89 dB fIN = 17MHz 20 25 dB fIN = 85MHz 40 42 dB BW = 30MHz (Note 6) 1000 Group Delay 120 µV RMS ns 9.3MHZ FILTER Bandwidth (monotonic passband) Subcarrier Frequency Gain ML6421-3 or ML6421 4/ML6421-7 Attenuation Output Noise Group Delay 4 –2dB (Note 5) 8.4 9.3 10.2 MHz fIN = 3.58MHz –0.01 0.4 0.9 dB fIN = 4.43MHz –0.1 0.6 1.1 dB fIN = 17MHz 20 25 dB fIN = 85MHz 40 42 dB BW = 30MHz (Note 6) 1000 120 µV RMS ns ML6421 ELECTRICAL CHARACTERISTICS SYMBOL (CONTINUED) PARAMETER CONDITIONS MIN TYP MAX UNITS –2.5dB (Note 5) 2.7 3 3.3 MHz fIN = 9.82MHz 30 33 dB fIN = 60MHz 43 50 dB 3.0MHZ FILTER Bandwidth (monotonic passband) Attenuation Output Noise BW = 30MHz (Note 6) Bandwidth (monotonic passband) –2dB (Note 5) 3 3.3 fIN = 9.82MHz 30 33 dB 43 50 dB Attenuation fIN = 60MHz Output Noise 700 µV RMS 3.6 MHz BW = 30MHz (Note 6) 700 µV RMS 0.8 V DIGITAL AND DC VIL Logic Input Low Range V IH Logic Input High Range IIL Logic Input Low VIN = GND IIH Logic Input High VIN = VCC ICC Supply Current RL = 75Ω VCC – 0.8 V –1 µA 1 µA VIN = 0.5V (Note 4) 110 135 mA VIN = 1.5V 140 175 mA Note 1: Limits are guaranteed by 100% testing, sampling or correlation with worst case test conditions. Note 2: Maximum resistance on the outputs is 500Ω in order to improve step response. Note 3: Connect all ground pins to the ground plane via the shortest path. Note 4: Power dissipation: PD = (ICC × VCC) – [3(VOUT2/RL)] Note 5: The bandwidth is the –3dB frequency of the unboosted filter. This represents the attenuation that results from boosting the gain from the –3dB point at the specified frequency. Note 6: These parameters are guaranteed by characterization only. 5 10 10 0 0 –10 –10 –20 –20 –30 –30 AMPLITUDE (dB) AMPLITUDE (dB) ML6421 –30 –40 –50 –50 –60 –70 –70 –80 –80 1M 10M FREQUENCY (Hz) –90 100K 100M Figure 1. Stop-Band Amplitude vs Frequency (fC = 5.5MHz). 10 2 0 1 –10 0 100M ML6421-5 ML6420-5 RELATIVE AMPLITUDE (dB) –30 –30 –40 –50 –60 –1 –2 –3 –4 –5 –70 –6 –80 –7 –90 100K 1M 10M FREQUENCY (Hz) Figure 2. Stop-Band Amplitude vs Frequency (fC = 8.0MHz). –20 AMPLITUDE (dB) –40 –60 –90 100K 1M 10M FREQUENCY (Hz) 100M Figure 3. Stop-Band Amplitude vs Frequency (fC = 3.0MHz). 6 –30 –8 100K 1M FREQUENCY (Hz) Figure 4. Pass-Band Amplitude vs Frequency (fC = 5.5MHz). 10M ML6421 2 220 ML6421-7 1 210 ML6421-5 0 200 –1 GROUP DELAY (ns) RELATIVE AMPLITUDE (dB) ML6420-7 –2 –3 –4 –5 190 180 170 160 –6 150 –7 –8 100K 1M FREQUENCY (Hz) 140 10M ML6421-1 2 3 4 5 6 7 FREQUENCY (MHz) Figure 5. Pass-Band Amplitude vs Frequency (fC = 9.3MHz). Figure 6. Group Delay vs Frequency (fC = 5.5MHz). 232 140 222 ML6421-7 212 202 ML6421-3 GROUP DELAY (ns) GROUP DELAY (ns) 130 120 110 192 182 172 162 100 152 142 90 1 2 3 4 5 6 7 8 9 FREQUENCY (mHz) Figure 7. Group Delay vs Frequency (fC = 8.0MHz). 10 11 132 100K 3.5MHz FREQUENCY (Hz) 7MHz Figure 8. Group Delay vs Frequency (fC = 3.0MHz). 7 ML6421 FUNCTIONAL DESCRIPTION APPLICATION GUIDELINES The ML6421 single-chip Triple Video Filter IC is intended for consumer and low cost professional video applications. Each of the three channels incorporates an input buffer amplifier, a sixth order lowpass filter, a first order allpass equalizer, Sinx/x equalizer and an output amplifier capable of driving 75Ω to ground. OUTPUT CONSIDERATIONS The ML6421 can be driven by a DAC with Range down to 0V. When Range is low the input and output signal range is 0.5V to 2.5V. When the input signal includes 0V, Range should be tied high. In this case, an offset is added to the input so that the output swing is kept between 0.5V to 2.5V. The output amplifier is capable of driving up to 24mA of peak current; therefore the output voltage should not exceed 1.8V when driving 75Ω to ground. The triple filters have unity gain. The circuit has unity gain (0dB) when connected to a 150Ω load, and a –6dB gain when driving a 75Ω load via a 75Ω series output resistor. The output may be either AC or DC coupled. For AC coupling, the –3dB point should be 5Hz or less. There must also be a DC path of -500Ω to ground for output biasing. INPUT CONSIDERATIONS The input resistance is 4kΩ. The input may be either DC or AC coupled. (Note that each input sources 80 to 125µA of bias current). The ML6421 is designed to be directly driven by a DAC. For current output video DACs, a 75Ω or 150Ω resistor to ground may need to be added to the DAC output (filter input). +5V FB2 0.001µF 0.1µF SUPPLY NOISE CLAMPING 100µF 47Ω 47Ω 47Ω 1µF 3.1kΩ 0.1µF INB 1µF INPUT DECOUPLING 0.1µF 85Ω 1 1kΩ 2 100µF INPUT SIGNAL = 2VP-P DC BIAS 15 VINC VINA GND RANGE 1kΩ 3 85Ω 14 1nF 4 13 GNDC 0.1µF GNDA 0.1µF VCC GND VCCC VCCA 11 7 75Ω INA 12 1nF 5 1nF 6 OUTC 1kΩ 0.1µF INPUT TERMINATION FB1 3.1kΩ VINB 3.1kΩ INC 100µF 16 GNDB 100µF VOUTA VCCB VOUTB 85Ω 0.1µF 10 VOUTC 1nF 8 OUTA 75Ω 9 0.1µF Figure 9. ML6421 AC Coupled DC Bias Test Circuit 8 1µF OUTB 75Ω ML6421 LAYOUT CONSIDERATIONS ML6421 VIDEO LOW PASS FILTER In order to obtain full performance from these triple filters, layout is very important. Good high frequency decoupling is required between each power supply and ground. Otherwise, oscillations and/or excessive crosstalk may occur. A ground plane is recommended. Filter Selection: The ML6421 provides several choices in filter cut-off frequencies depending on the application. Each filter has its own supply and ground pins. In the test circuit, 0.1µF capacitors are connected in parallel with 1nF capacitors on VCC, VCCC, VCCB and VCCA for maximum noise rejection (Figure 9). Further noise reduction is achieved by using series ferrite beads. In typical applications, this degree of bypassing may not be necessary. Since there are three filters in one package, space the signal leads away from each other as much as possible. Power Considerations The ML6421 power dissipation follows the formula: 6 V RL ! 1 PD = ICC × VCC – OUT 2 "# #$ ×3 (1) This is a measure of the amount of current the part sinks (current in – current out to the load). Under worst case conditions: " . × 3 # = 872.5mW 5 1575 #$ ! 0 2 PD = 0.175 × 5.5 – RGB: When the BW of each signal is the same, then the ML6421-1 (5.5MHz) or ML6421-3 (8MHz) are appropriate depending on the sampling rate. YUV: When the luminance bandwidth is different from the color bandwidth, the ML6421-4 with the 8.0, and two 3.0MHz filters are most appropriate. S-Video: For Y/C (S-video) and Y/C + CV (Composite Video) systems the 5.5MHz or 8MHz filters are appropriate. In NTSC the C signal occupies the bandwidth from about 2.6MHz to about 4.6MHz, while in PAL the C signal occupies the bandwidth from about 3.4MHz to about 5.4MHz. In both cases, a 5.5MHz low pass filter provides adequate rejection for both sampling and reconstruction. In addition, using the same filter for both Y/C and CV maintains identical signal timing without adjustments. Composite: When one or more composite signals need to be filtered, then the 5.5MHz and 8MHz filters permit filtering of one, two or three composite signals. NTSC/PAL: A 5.5MHz cut-off frequency provides good filtering for 4.2MHz, 5.0MHz and 5.5MHz signals without the need to change filters on a production basis. Sinx/x: For digital video system with output D/A converters, there is a fall-off in response with frequency 4 THEORETICAL SINX/X CORRECTION FOR 13.5MHz SAMPLING R 2 AMPLITUDE +5V DIGITAL INPUTS G 8 RED DAC (CURRENT SOURCING 8 GREEN DAC (CURRENT SOURCING 8 BLUE DAC (CURRENT SOURCING 0 B –2 ANALOG OUTPUTS ML6421 75Ω R G 75Ω B 75Ω DAC LOAD ADJUSTED FOR 2VP-P SINX/X ERROR FOR TYPICAL DAC AT 13.5MHz –4 0 1 2 3 4 5 FREQUENCY (MHz) 6 Figure 10. Sinx/x Frequency Response 7 Figure 11. Typical ML6421 Reconstruction Application 9 ML6421 ML6421 VIDEO LOW PASS FILTER (CONTINUIED due to discrete sampling. The fall-off follows a sinx/x response. The ML6421 filters have a complementary boost to provide a flatter overall response. The boost is designed for 13.5MHz Y/C and CV sampling and 6.75MHz U/V sampling. Note: The ML6421 has the same pin-out as the ML6420. In a typical application the ML6421 is used as the final output device in a video processing chain. In this case, inputs to the ML6421 are supplied by DAC outputs with their associated load resistors (typically 75Ω or 150Ω). Resistance values should be adjusted to provide 2VP-P at the input of the ML6421. The ML6421 will drive 75Ω source termination resistors (making the total load 150Ω) so that no external drivers or amplifiers are required. FILTER PERFORMANCE The reconstruction performance of a filter is based on its ability to remove the high band spectral artifacts (that result from the sampling process) without distorting the valid signal spectral contents within the passband. For video signals, the effect of these artifacts is a variation of the amplitude of small detail elements in the picture (such as highlights or fine pattern details) as the elements move relative to the sampling clock. The result is similar to the aliasing problem and causes a “winking” of details as they move in the picture. the sampled waveform through the ML6421 filter. It is clear that the distortion artifacts are reduced significantly. Ultimately it is the time domain signal that is viewed on a TV monitor, so the effect of the reconstruction filter on the time domain signal is important. Figure 13 shows the sampling artifacts in the time domain. Curve A is the original signal, Curve B. is the result of CCIR601 sampling, and Curve C. is the same signal filtered through the ML6421. Again the distortions in the signal are essentially removed by the filter. In an effort to measure the time domain effectiveness of a reconstruction filter, Figure 14 was generated from a swept frequency waveform. Curves A, B, and C are generated as in Figure 13, but additional curves D and E help quantify the effect of filtering in the time domain. Curve D and Curve E represent the envelopes (instantaneous amplitudes) of Curves B and C. Again it is evident in Curve D that the envelope varies significantly due to the sampling process. In Curve E, filtering with the ML6421 removes these artifacts and generates an analog output signal that rivals the oversampled (and more ideal) signal waveforms. The ML6421 reduces the amplitude variation from over 6% to less than 1%. Figure 12 shows the problem in the frequency domain. Curve A shows the amplitude response of the ML6421 filter, while Curve B shows the signal spectrum as it is distorted by the sampling process. Curve C shows the composite of the two curves which is the result of passing Figure 12. ML6421 Reconstruction Performance in the Frequency Domain 10 ML6421 Figure 13. ML6421 Reconstruction Performance in the Time Domain Figure 14. Amplitude Ripple of Reconstructed Swept Pulses 11 ML6421 PHYSICAL DIMENSIONS Package: S16W 16-Pin Wide SOIC 0.400 - 0.414 (10.16 - 10.52) 16 0.291 - 0.301 0.398 - 0.412 (7.39 - 7.65) (10.11 - 10.47) PIN 1 ID 1 0.024 - 0.034 (0.61 - 0.86) (4 PLACES) 0.050 BSC (1.27 BSC) 0.095 - 0.107 (2.41 - 2.72) 0º - 8º 0.090 - 0.094 (2.28 - 2.39) 12 0.012 - 0.020 (0.30 - 0.51) SEATING PLANE 0.005 - 0.013 (0.13 - 0.33) 0.022 - 0.042 (0.56 - 1.07) 0.009 - 0.013 (0.22 - 0.33) ML6421 ORDERING INFORMATION PART NUMBER BW (MHZ) GAIN TEMPERATURE RANGE PACKAGE ML6421CS-1 ML6421CS-3 ML6421CS-4 5.5/5.5/5.5 8.0/8.0/8.0 8.0/3.0/3.0 1X 1X 1X 0°C to 70°C 0°C to 70°C 0°C to 70°C 16-pin SOIC wide (S16W) 16-pin SOIC wide (S16W) 16-pin SOIC wide (S16W)(OBS) ML6421CS-5 ML6421CS-7 5.5/5.5/2.5 9.3/9.3/9.3 2X 2X 0°C to 70°C 0°C to 70°C 16-pin SOIC wide (S16W) 16-pin SOIC wide (S16W) Micro Linear Corporation 2092 Concourse Drive San Jose, CA 95131 Tel: (408) 433-5200 Fax: (408) 432-0295 www.microlinear.com © Micro Linear 1999. property of their respective owners. is a registered trademark of Micro Linear Corporation. All other trademarks are the Products described herein may be covered by one or more of the following U.S. patents: 4,897,611; 4,964,026; 5,027,116; 5,281,862; 5,283,483; 5,418,502; 5,508,570; 5,510,727; 5,523,940; 5,546,017; 5,559,470; 5,565,761; 5,592,128; 5,594,376; 5,652,479; 5,661,427; 5,663,874; 5,672,959; 5,689,167; 5,714,897; 5,717,798; 5,742,151; 5,747,977; 5,754,012; 5,757,174; 5,767,653; 5,777,514; 5,793,168; 5,798,635; 5,804,950; 5,808,455; 5,811,999; 5,818,207; 5,818,669; 5,825,165; 5,825,223; 5,838,723; 5.844,378; 5,844,941. Japan: 2,598,946; 2,619,299; 2,704,176; 2,821,714. Other patents are pending. Micro Linear makes no representations or warranties with respect to the accuracy, utility, or completeness of the contents of this publication and reserves the right to make changes to specifications and product descriptions at any time without notice. No license, express or implied, by estoppel or otherwise, to any patents or other intellectual property rights is granted by this document. The circuits contained in this document are offered as possible applications only. Particular uses or applications may invalidate some of the specifications and/or product descriptions contained herein. The customer is urged to perform its own engineering review before deciding on a particular application. Micro Linear assumes no liability whatsoever, and disclaims any express or implied warranty, relating to sale and/or use of Micro Linear products including liability or warranties relating to merchantability, fitness for a particular purpose, or infringement of any intellectual property right. Micro Linear products are not designed for use in medical, life saving, or life sustaining applications. DS6421-01 13