System Reset PST573 MITSUMI System Reset Monolithic IC PST573 Outline This IC functions in a variety of CPU systems and other logic systems, to detect power supply voltage and reset the system accurately when power is turned on or interrupted. This ultra-low current consumption high reset type system reset IC was developed using high resistance process and low current circuit design technology. Features 1. 2. 3. 4. 5. Ultra-low current consumption Low operating limit voltage Output current high for ON Hysteresis voltage provided in detection voltage 10 ranks of detection voltage ICCH=450µA typ. ICCL=1µA typ. 0.65V typ. -6mA typ. 50mV typ. PST573 C : 4.5V typ. D : 4.2V typ. E : 3.9V typ. F : 3.6V typ. G : 3.3V typ. H : 3.1V typ. I : 2.9V typ. J : 2.7V typ. K : 2.5V typ. L : 2.3V typ. Package MMP-3A (PST573 M) TO-92A (PST573 ) contains detection voltage rank . * Applications 1. 2. 3. 4. 5. Reset circuits in microcomputers, CPUs and MPUs. Logic circuit reset circuits. Battery voltage check circuits. Back-up power supply switching circuits. Level detection circuits. Pin Assignment 1 2 1 VCC 2 GND 3 VOUT 1 3 2 3 TO-92A MMP-3A 1 VCC 2 GND 3 VOUT System Reset PST573 MITSUMI Equivalent Circuit Diagram Absolute Maximum Ratings (Ta=25°C) Item Symbol Rating Units Storage temperature TSTG -40~+125 °C Operating temperature TOPR -20~+75 °C Power supply voltage VCC max. -0.3~10 V Allowable loss Pd Electrical Characteristics Item Symbol Detection voltage VS Measurement circuit 1 Detection voltage temperature coefficient VS/ T 1 High level output voltage VOH 1 Output leakage current IOH 1 Circuit current while on ICCL 1 Circuit current while off ICCH 1 "H"transport delay time tpLH 2 "L"transport delay time tpHL 2 Operation limit voltage VopL 1 Output current while on I IOL I 1 Output current while on II IOL II 1 *1 : tpLH : V =(V typ.-0.4V) *2 : V =V min.-0.15V CC CC S S mW 300(TO-92A) (Ta=25°C) (Except where noted otherwise, resistance unit is Ω) 1 VS Hysteresis voltage 200(MMP-3A) Measurement conditions Min. Typ. Max. Units PST573C PST573D PST573E PST573F RL=4.7k PST573G < VOL = VCC-0.4V PST573H VCC=H L PST573I PST573J PST573K PST573L RL=4.7kΩ VCC=L H L 4.3 4.0 3.7 3.4 3.1 2.9 2.75 2.55 2.35 2.15 4.5 4.2 3.9 3.6 3.3 3.1 2.90 2.70 2.50 2.30 4.7 4.4 4.1 3.8 3.5 3.3 3.05 2.85 2.65 2.45 V 25 50 100 mV RL=4.7kΩ Ta=-20°C~+75°C VCC=VS min. -0.05V RL=4.7kΩ VCC=7.5V VCC=VS min. -0.05V RL=∞ VCC=VS typ. /0.85V RL=∞ RL=4.7kΩ 1 CL=100pF RL=4.7kΩ 1 CL=100pF RL=4.7kΩ VOL >= VCC-0.4V VCC=VS min.-0.05V RL=0 Ta=-20°C~+75°C 2 RL=0 ±0.01 VCC -0.4 * * * (VS typ.+0.4V), tpHL : VCC=(VS typ.+0.4V) %/°C -2.0 V ±0.1 µA 450 700 µA 1.0 1.8 µA 25 60 µS 8 20 µS 0.65 0.85 V -6.0 -1.5 (VS typ.-0.4V) mA mA System Reset PST573 MITSUMI Measuring Circuit [1] [2] INPUT PULSE 4.9V 4.1V 0V 0.8V 4.9 VS 4.1 0V Note: Input model is an example for PST573C. Characteristics (Example: PST573C) VCC vs. VOUT VCC vs. ICC 600 8 7 Ta=-20°C 500 6 ICC (µA) 300 VOUT (V) 4 3 1 1 2 3 4 VCC (V) Ta=75°C 200 Ta=-20°C Ta=25°C Ta=75°C 2 0 Ta=25°C 400 5 100 5 6 7 8 0 0 1 2 3 4 VCC (V) 5 6 7 8 System Reset PST573 MITSUMI VS vs. Ta VS vs. Ta 4.53 80 4.52 70 4.51 60 VS 4.50 (V) VS 50 (mV) 4.49 40 4.48 30 4.47 -40 20 -20 0 20 40 60 80 -40 -20 0 Ta (°C) 60 80 40 60 80 40 60 80 VOH vs. Ta -9 4.25 -8 4.20 -7 4.15 IOL -6 (mA) VOH (V) 4.10 -5 4.05 -4 4.00 -3 4.95 -20 40 Ta (°C) IOL vs. Ta -40 20 0 20 40 60 -40 80 -20 0 Ta (°C) 20 Ta (°C) ICCH vs. Ta ICCL vs. Ta 700 1.8 600 1.6 500 1.4 ICCH (µA) lCCL 400 (µA) 1.2 300 1.0 200 0.8 0.6 -40 100 -20 0 20 40 60 80 -40 -20 Ta (°C) Pd vs. Ta VS (CPU)=0.7VCC 10.0 300 0k =1 k L R 1.0 CL (µF) 20 Ta (°C) CL (RL) vs. tPLH 7 5 3 2 0 7 5 3 2 00 =1 RL 0k 200 7 =4 Pd (mW) L R 100 0.1 7 5 3 2 0.01 0 1 2 345 7 10 2 3 4 5 7 100 TPLH (mS) 2 3 4 5 7 1000 0 25 50 75 Ta (°C) 100 125 System Reset PST573 MITSUMI Timing Chart VCC/VOUT (V) 7 6 5 4 3 2 1 0 VCC VS VOUT VS (CPU) Time Undefined RESET ON OFF Application circuits 1. Normal hard reset Delay time (tpLH) VCC-0.2 . =. CL RL ln Vscpu CL : µF [ RL : kΩ Vs cpu : ]+0.025 (mS) Reset threshold voltage of CPU, MPU, etc. Voltage: V Note: Connect a capacitor between IC pins 1 and 2 if VCC line impedance is high. 2. Manual reset added Note 1: Use RL, CL and Rm to prevent manual switch chattering. Note that Rm should be set to the following conditions. Rm < = 1/20RL Note 2: Connect a capacitor between IC pins 1 and 2 if VCC line impedance is high. 3. Battery checker (LED ON for high voltage) Note: Connect a capacitor between IC pins 1 and 2 if VCC line impedance is high. MITSUMI System Reset PST573 4 Battery checker (LED ON for low voltage) Note: Connect a capacitor between IC pins 1 and 2 if VCC line impedance is high. 5. Hysteresis voltage UP method When increasing hysteresis voltage for stable system operation, determine RH as follows and connect externally. However, ICCH is -5000PPM/°C, so perform temperature compensation at RH when using over a wide temperature range. Hysteresis voltage UP amount ( Vsup) is . Vsup =. RH ICCL Total hysteresis voltage ( Vstotal) is . Vstotal =. Vs + Vsup Note: Connect a capacitor between IC pins 1 and 2 if VCC line impedance is high.