MITSUMI PST591

System Reset PST591~595
MITSUMI
System Reset
Monolithic IC PST591~595 Series
Outline
These ICs function in a variety of CPU systems and other logic systems, to detect power supply voltage and
reset the system accurately when power is turned on or interrupted, and has a built-in fixed delay time
generating circuit. This series has been represented in the past by PST574/PST575, but these new low reset
type system reset ICs expand the delay time series with a counter timer using an analog/digital hybrid circuit.
Features
1. Fixed delay time setting by counter timer
Excellent delay time temperature characteristics
2. Low operating limit voltage
3. Hysteresis voltage provided in detection voltage
4. Current consumption for no-load
5. 5 delay time products available
6. Each product has 9 detection voltage ranks.
±800ppm/°C
0.65V typ.
50mV typ.
ICCL=300µA typ. ICCH=200µA typ.
PST591 50mS
PST592 100mS
PST593 200mS
C : 4.5V typ.
D : 4.2V typ.
E : 3.9V typ.
F : 3.6V typ.
G : 3.3V typ.
PST594 400mS
PST595 800mS
H : 3.1V typ.
I : 2.9V typ.
J : 2.7V typ.
K : 2.5V typ.
Package
MMP-4A (PST59
M)
TO-92A (PST59
)
contains detection voltage rank.
(MMP-4A has a manual reset pin, which should be set at GND or NC during normal operation.)
*
Applications
1. Reset circuits in microcomputers, CPUs and MPUs
2. Logic circuit reset circuits.
3. Battery voltage check circuits.
4. Back-up power supply switching circuits.
5. Level detection circuits.
6. Mechanical reset circuits
System Reset PST591~595
MITSUMI
Pin Assignment
VOUT
1
1
2
1
VCC
2
GND
3
VOUT
4
3
Manual
2
1
3
2
Reset
3
VCC
4
GND
MMP-4A
TO-92A
Equivalent Circuit Diagram
Absolute Maximum Ratings
(Ta=25°C)
Item
Symbol
Rating
Units
Storage temperature
TSTG
-40~+125
°C
Operating temperature
TOPR
-20~+75
°C
Power supply voltage
VCC max.
-0.3~10
V
Manual reset input voltage
VRES max.
-0.3~10
V
Allowable loss
Pd
200 (MMP-4P)
300 (TO-92)
mW
System Reset PST591~595
MITSUMI
Electrical Characteristics
Item
(Ta=25°C) (Except where noted otherwise, resistance unit isΩ)
1
Measurement conditions
C
D
E
RL=470
F
<
VOL = 0.4V
G
H
VCC=H L
I
J
K
RL=470, VCC=L H L
V S/ T
1
RL=470, Ta=-20°C~+75°C
±0.01
VOL
IOH
ICCL
ICCH
1
1
1
1
0.1
"H" transport delay time
tPLH
2
"L" transport delay time
Operating power supply voltage
Output current while on 1
Output current while on 2
Manual Input high voltage
reset
Input high current
pin
Input low voltage
tPHL
VOPL
IOL1
IOL2
VRESH
VRESH
VRESL
2
1
1
1
VCC=Vs min.-0.05V, RL=470
VCC=10V
VCC=Vs min.-0.05V, RL=∞
VCC=Vs typ./0.85V, RL=∞
PST591
PST592
RL=4.7k
PST593
CL=100PF 1
PST594
PST595
RL=4.7k, CL=100PF 1
RL=4.7k, VOL <= 0.4V
VCC=VS min.-0.05V, RL=0
Ta=-20°C~+75°C, RL=0 2
Detection voltage
Hysteresis voltage
Detection voltage
temperature coefficient
Low-level output voltage
Output leakage current
Circuit current while on
Circuit current while off
*1 tpLH : V = (V typ.-0.4V)
*2 V =V min.-0.15V
CC
CC
S
Symbol Measuring circuit
VS
VS
1
*
*
*
VRES=2V
(VS typ.+0.4V), tpHL : VCC= (VS typ.+0.4V)
Min.
4.3
4.0
3.7
3.4
3.1
2.9
2.75
2.55
2.35
30
Typ.
4.5
4.2
3.9
3.6
3.3
3.1
2.90
2.70
2.50
50
Max. Unit
4.7
4.4
4.1
3.8
3.5
V
3.3
3.05
2.85
2.65
100 mV
%/°C
0.4
±0.1
600
350
75
150
300
600
1200
V
µA
µA
µA
300
200
30
50
60 100
120 200
mS
240 400
480 800
10
µS
0.65 0.85 V
8
mA
6
mA
2.0
V
80 µA
0.8
V
(VS typ.-0.4V)
S
Note 3: VOUT pin is low when manual reset pin is high.
VOUT pin is high when manual reset pin is low.
Measuring Circuit
[1]
[2]
Note: Input model is an example for PST591C.
System Reset PST591~595
MITSUMI
Characteristics
(Example: PST591D)
VCC vs. VOUT
VOUT
(V)
8
7
6
5
4
3
2
1
0
0
VS vs. Ta
4.4
4.3
VS
(V)
Ta=-25°C
Ta=25°C
Ta=75°C
1
2
3
4.2
4.1
4.0
4
5
6
7
3.9
-40
8
-20
0
VCC (V)
20
Ta
VS vs. Ta
40
60
80
40
60
80
40
60
80
40
60
80
(°C)
VOL vs. Ta
90
80
250
70
200
VS 60
(mV) 50
VOL
(mV)
40
100
50
30
-40
150
0
-20
0
20
Ta
40
60
-40
80
ICCH vs. Ta
450
230
400
220
350
ICCH
(µA)
300
250
210
200
-20
0
20
40
60
180
-40
80
-20
0
Ta(°C)
20
Ta
IOL vs. Ta
(°C)
tPLH vs. Ta
40
53
35
52
IOL 30
(mA) 25
tPLH
51
(mS)
50
20
49
15
48
-40
20
190
200
-40
0
Ta (°C)
ICCL vs. Ta
ICCL
(µA)
-20
(°C)
-20
0
20
Ta (°C)
40
60
80
-40
-20
0
20
Ta (°C)
System Reset PST591~595
MITSUMI
tPHL vs. Ta
Pd vs. Ta
300
12
11
tPHL
(µS)
10
Pd
(mW)
9
TO92
100
8
MMP4
7
-40
200
-20
0
20
40
60
0
80
0
25
50
75
Ta
Ta (°C)
100
125
(°C)
Timing Chart
7
6
5
VCC/VOUT
(V)
4
3
2
1
0
VCC
VS
VOUT
Time
Undefined
RESET
ON
OFF
Application circuits
1. Normal hard reset
Note: Connect a capacitor between IC VCC and GND
pins if VCC line impedance is high.
MITSUMI
System Reset PST591~595
2. Manual reset
VOUT pin low for manual switch ON.
VOUT pin high for manual switch OFF.
Note: Connect a capacitor between IC VCC and GND
pins if VCC line impedance is high.
3. Mute circuit
Note: Connect a capacitor between IC VCC and GND
pins if VCC line impedance is high.