DATA SHEET BIPOLAR ANALOG INTEGRATED CIRCUIT µPC8002 SECOND MIXER + IF AMPLIFIER FOR DIGITAL CORDLESS TELEPHONES The µPC8002 is a monolithic IC developed for use in digital cordless telephones. Its internal equivalent circuits comprise a double balanced mixer (DBM), IF amplifier circuit, and RSSI (Received Signal Strength Indicator) circuit. The µPC8002 can operate on a wide range of power supply voltages from 2.7 V to 5.5 V, and incorporates a poweroff function, making it ideal for achieving low set power consumption. The package is a 20-pin plastic shrink SOP (225 mil) suitable for high-density surface mounting. FEATURES • Low-voltage, low-consumption-current operation possible (VCC = 2.7 to 5.5 V, ICC = 3.4 mA at VCC = 3 V) • Wide mixer input frequency range (fMIX = 250 MHz (TYP.) to 500 MHz (MAX.)) • Wide IF amplifier input frequency range (fIF = 8 MHz (MIN.) to 12 MHz (MAX.), 10.7 MHz (TYP.)) • High limiting sensitivity (SL = –100 dBm (TYP.)) • Wide RSSI dynamic range (DR = 85 dB (TYP.)) • On-chip power-off function • Use of 20-pin plastic shrink SOP (225 mil) allows high-density surface mounting BLOCK DIAGRAM BYPASS1 IF1 IN 20 19 BYPASS2 IF1 OUT BYPASS4 IF2 IN 18 17 16 15 GND VCC BYPASS3 (IF OUT) (IF OUT) IF2 OUT 14 IF Amp 1 13 12 11 IF Amp 2 Output Stage Power ON/OFF RSSI RSSI 2nd MIXER 1 PD 2 3 4 5 MIX OUT VCC (IF) VCC (MIX) LO IN 6 7 8 9 10 GND(IF) GND(MIX) MIX IN1 MIX IN2 RSSI OUT ORDERING INFORMATION Part Number Package µPC8002GR 20-pin plastic shrink SOP (225 mil) µPC8002GR-E1 20-pin plastic shrink SOP (225 mil) Embossed carrier taping (pin 1 is tape unwinding direction) µPC8002GR-E2 20-pin plastic shrink SOP (225 mil) Embossed carrier taping (pin 1 is tape winding direction) The information in this document is subject to change without notice. Document No. S10717EJ2V0DS00 (2nd edition) Date Published March 1997 N Printed in Japan © 1997 µPC8002 VCC VCC 1 PD BYPASS1 20 2 MIX OUT 3 VCC (IF) 4 VCC (MIX) 5 LO IN 6 GND (IF) 7 GND (MIX) 8 MIX IN1 GND (IF OUT) 13 9 MIX IN2 VCC (IF OUT) 12 1000 pF BPF CFEC10.7MK1 (MURATA) Application Circuit Example 1 (Using 2 BPFs) IF1 IN 19 BYPASS2 18 1000 pF 1 µF IF1 OUT 17 1st Mixer Lo OSC 1 µF 1000 pF 470 pF 470 pF 470 pF BYPASS4 16 0.01 µF BPF CFEC10.7MK1 (MURATA) 1000 pF VCC IF2 IN 15 BYPASS3 14 0.01 µF VCC Caution 10 RSSI OUT Ensure that the pin voltage does not exceed the power supply voltage. Remark The VCC pass capacitors (1 µF, 1000 pF) should be located close to the respective VCC pins. Chip laminated ceramic capacitors (MURATA GRM36 or equivalent) should be used. 2 DEM ADC 1 µF 1000 pF IF2 OUT 11 µPC8002 330 pF Application Circuit Example 2 (Using 1 BPF) VCC VCC 1 PD BYPASS1 20 2 MIX OUT 3 VCC (IF) 4 VCC (MIX) 5 LO IN 6 GND (IF) 7 GND (MIX) 8 MIX IN1 GND (IF OUT) 13 9 MIX IN2 VCC (IF OUT) 12 1000 pF IF1 IN 19 BYPASS2 18 1000 pF 1µ F IF1 OUT 17 Lo OSC 1µ F 1000 pF 1st Mixer 470 pF 470 pF 470 pF BYPASS4 16 0.01 µ F BPF CFEC10.7MK1 (MURATA) 1000 pF VCC IF2 IN 15 BYPASS3 14 0.01 µ F VCC 10 RSSI OUT Cautions 1. 2. DEM ADC 1µ F 1000 pF IF2 OUT 11 Ensure that the pin voltage does not exceed the power supply voltage. With this application circuit, confirm that there is not problem with interfering wave characteristics. Remark The VCC pass capacitors (1 µF, 1000 pF) should be located close to the respective VCC pins. Chip laminated ceramic capacitors (MURATA GRM36 or equivalent) should be used. 3 µPC8002 VCC VCC 1 PD BYPASS1 20 2 MIX OUT 3 VCC (IF) 4 VCC (MIX) 5 LO IN 6 GND (IF) 7 GND (MIX) 8 MIX IN1 GND (IF OUT) 13 9 MIX IN2 VCC (IF OUT) 12 1000 pF BPF CFEC10.7MK1 (MURATA) Application Circuit Example 3 (Using 1 BPF) IF1 IN 19 BYPASS2 18 1000 pF 1µ F 1000 pF VCC IF1 OUT 17 390 Ω Lo OSC 1µ F 1000 pF 1st Mixer 470 pF 470 pF 470 pF BYPASS4 16 IF2 IN 15 BYPASS3 14 0.01 µF 1000 pF 0.01 µF VCC 10 RSSI OUT Cautions 1. 1000 pF IF2 OUT 11 With this application circuit, good interfering wave characteristics are obtained with a single BPF. However, there is a drop in sensitivity. 2. Ensure that the pin voltage does not exceed the power supply voltage. Remark The VCC pass capacitors (1 µF, 1000 pF) should be located close to the respective VCC pins. Chip laminated ceramic capacitors (MURATA GRM36 or equivalent) should be used. 4 DEM ADC 1 µF µPC8002 VCC VCC 1 PD 2 MIX OUT 3 VCC (IF) 4 VCC (MIX) 5 LO IN 6 GND (IF) BYPASS1 20 1000 pF BPF CFEC10.7MK1 (MURATA) Application Circuit Example 4 (Using 1 BPF) IF1 IN 19 BYPASS2 18 1000 pF 1µF IF1 OUT 17 390 Ω 1000 pF 1000 pF VCC Lo OSC 1µF 1000 pF 470 pF BYPASS4 16 0.01 µ F IF2 IN 15 1000 pF 1st Mixer 1.5 µ H 470 pF 470 pF 7 GND (MIX) 8 MIX IN1 GND (IF OUT) 13 9 MIX IN2 VCC (IF OUT) 12 BYPASS3 14 0.01 µ F 150 pF VCC 10 RSSI OUT 1000 pF IF2 OUT 11 DEM ADC 1 µF Cautions 1. With this application circuit, good interfering wave characteristics are obtained with a single BPF (and sensitivity is better than in Application Circuit Example 3). 2. Ensure that the pin voltage does not exceed the power supply voltage. Remark The VCC pass capacitors (1 µF, 1000 pF) should be located close to the respective VCC pins. Chip laminated ceramic capacitors (MURATA GRM36 or equivalent) and a chip coil (MURATA LQHIN or equivalent) should be used. 5 µPC8002 CONTENTS 1. PIN CONFIGURATION AND PIN FUNCTIONS .................................................................................... 7 2. INPUT/OUTPUT EQUIVALENT CIRCUIT DIAGRAMS ........................................................................ 9 3. ELECTRICAL SPECIFICATIONS .......................................................................................................10 4. CHARACTERISTIC DIAGRAMS ........................................................................................................ 13 5. LEVEL DIAGRAMS .............................................................................................................................17 6. TEST METHODS ................................................................................................................................ 18 7. TEST CIRCUIT EXAMPLES ............................................................................................................... 19 8. EVALUATION BOARD MOUNTING EXAMPLE ................................................................................. 25 9. WIRING PATTERN CAPACITANCE DIAGRAM (REFERENCE) ........................................................ 28 10. PACKAGE DRAWINGS .......................................................................................................................29 11. RECOMMENDED SOLDERING CONDITIONS .................................................................................. 30 6 µPC8002 1. PIN CONFIGURATION AND PIN FUNCTIONS (1) Pin Configuration (Top View) • 20-pin plastic shrink SOP (225 mil) PD 1 20 BYPASS1 MIX OUT 2 19 IF1 IN VCC (IF) 3 18 BYPASS2 VCC (MIX) 4 17 IF1 OUT LO IN 5 16 BYPASS4 GND (IF) 6 15 IF2 IN GND (MIX) 7 14 BYPASS3 MIX IN1 8 13 GND (IF OUT) MIX IN2 9 12 VCC (IF OUT) 10 11 IF2 OUT RSSI OUT Pin Names BYPASS1-BYPASS4 : Bypass GND (IF) : Ground (Intermediate Frequency Amp.) GND (IF OUT) : Ground (Intermediate Frequency Amp. Output) GND (MIX) : Ground (Mixer) IF1 IN, IF2 IN : Intermediate Frequency Amp. Input IF1 OUT, IF2 OUT : Intermediate Frequency Amp. Output LO IN : Local Input MIX IN1, MIX IN2 : Mixer Input MIX OUT : Mixer Output PD : Power Down RSSI OUT : Received Signal Strength Indicator Output V CC (IF) : Power Supply (Intermediate Frequency Amp.) V CC (IF OUT) : Power Supply (Intermediate Frequency Amp. Output) V CC (MIX) : Power Supply (Mixer) 7 µPC8002 (2) Pin Functions No. 8 Pin Name I/O Function 1 PD I Power on/off control signal input 2 MIX OUT O Mixer output 3 VCC (IF) – IF amplifier and RSSI power supply pin 4 VCC (MIX) – Mixer power supply pin 5 LO IN I Local input 6 GND (IF) – IF amplifier and RSSI ground pin 7 GND (MIX) – Mixer ground pin 8 MIX IN1 I Mixer input 9 MIX IN2 I Filter capacitor connection 10 RSSI OUT O RSSI output 11 IF2 OUT O IF amplifier 2 output 12 VCC (IF OUT) – IF amplifier output stage power supply pin 13 GND (IF OUT) – IF amplifier output stage ground pin 14 BYPASS3 – Filter capacitor connection (IF2 side) 15 IF2 IN I IF amplifier 2 input 16 BYPASS4 – Filter capacitor connection (IF2 side) 17 IF1 OUT O IF amplifier 1 output 18 BYPASS2 – Filter capacitor connection (IF1 side) 19 IF1 IN I IF amplifier 1 input 20 BYPASS1 – Filter capacitor connection (IF1 side) µPC8002 2. INPUT/OUTPUT EQUIVALENT CIRCUIT DIAGRAMS Mixer Output Mixer Input 1 kΩ 276 Ω 2 1 kΩ 700 µ A 8 9 IF Amplifier 1 Output Local Input 1 kΩ 207 Ω 17 1 kΩ 250 µ A 5 IF Amplifier 2 Output IF Amplifier 1 Input 19 20 330 Ω 330 Ω 14.9 kΩ 14.9 kΩ 11 18 290 µ A RSSI Output IF Amplifier 2 Input VCC 32 kΩ 15 16 330 Ω 330 Ω 11.8 kΩ 11.8 kΩ 10 14 2 kΩ Power On/Off Input 50 kΩ 1 150 kΩ 9 µPC8002 3. ELECTRICAL SPECIFICATIONS Absolute Maximum Ratings (TA = 25 °C) Parameter Symbol Test Condition Rating Unit 7 V 120 mW Power supply voltage VCC Total power dissipation PT Storage temperature Tstg –40 to +125 °C VPIN VCC+0.2 V Pin voltage Caution TA = 85 °C Product quality may suffer if the absolute rating is exceeded for any parameter, even momentarily. In other words, an absolute maximum rating is a value at which the possibility of physical damage to the product cannot be ruled out. Care must therefore be taken to ensure that the these ratings are not exceeded during use of the product. Recommended Operating Ratings (TA = 25 °C) Parameter Symbol 0 dBm = 223.6 mVrms (at 50 Ω) Test Condition MIN. TYP. MAX. Unit Power supply voltage VCC 2.7 3.0 5.5 V Operating ambient temperature TA –30 +25 +85 °C dBm Mixer input level Local input level VMIX VLOC 50 Ω resistance termination –98 –18 LC matching (reference value) –107 –27 50 Ω resistance termination –5 +5 LC matching (reference value) –20 –10 –99 –14 dBm 250 500 MHz dBm IF amplifier input level VIF Mixer input frequency fMIX Mixer output frequency fOM 8 10.7 12 MHz IF amplifier input frequency fIF 8 10.7 12 MHz RSSI output load capacitance IF2 output load capacitance Note 10 COI COR Includes all capacitances (board, pattern, etc.) applied to the pin. 10Note pF 10Note pF µPC8002 Electrical Specifications (TA = 25 °C, VCC = 3 V) (1) Mixer Section (fMIX = 250 MHz, fLOC = 239.3 MHz, VLOC = –5 dBm) 0 dBm = 223.6 mVrms (at 50 Ω) (Where not specified in the Test Condition, input has 50 Ω termination) Parameter Symbol Test Condition Power supply current ICCM No signal Conversion gain GC 50 Ω resistance termination –1 dB compression output level VOM Third order intercept point IP3 Noise factor NF MIN. 4 LC matching (reference value) Note 1 LC matching (reference value) Local separation ISL Mixer non-input MAX. Unit 1.7 2.2 mA 8 11.0 dB –7 dBm 17.0 –14 Stipulated by output TYP. Note 2 40 –10 –3 dBm 16 dB 7 dB 54 dB Mixer input impedance ZINM 31-j156 Ω Local input impedance ZINL 31-j169 Ω Output resistance ROM 330 430 Ω VNote 3 230 Power-on rise time tONM VPO = 3 8 15 µs Power-off fall time tOFM VPO = 0 VNote 4 1 3 µs Power-off power supply current ILM VPO = 0 V 0 5 µA Notes 1. f1 = 250.3 MHz, f2 = 250.6 MHz 2. Leakage from local input to mixer output 3. Time until the difference between the local input pin power-on and power-off voltages reaches 90 % Power-on input voltage (VPO) rise time: 10 ns 4. Time until the power supply current reaches 10 % of the power-on value Power-on input voltage (VPO) fall time: 10 ns 11 µPC8002 (2) IF Amplifier Section (fIF = 10.7 MHz) Parameter 0 dBm = 223.6 mVrms (at 50 Ω) Symbol Test Condition Power supply current ICCI No signal Limiting sensitivity SL –3 dB point IF amplifier phase fluctuation SP VIF = –70 to –14 dBm IF amplifier output amplitude VO IF2 OUT, VIF = –14 dBm IF amplifier output amplitude rise time tR IF amplifier output amplitude fall time MIN. Note 1 TYP. MAX. Unit 1.7 2.3 mA –100 –97 dBm 10 0.2 deg 0.3 0.4 Vp-p IF2 OUT, VIF = –14 dBm 8 20 ns tF IF2 OUT, VIF = –14 dBm 15 25 ns IF amplifier input resistance Rin IF1 IN, IF2 IN 330 430 Ω IF amplifier input capacitance Cin IF1 IN, IF2 IN 3.5 6.0 pF IF amplifier output resistance RO IF1 OUT 330 430 Ω RSSI linearity LR VIF = –94 to –14 dBm ±2 dB RSSI slope SR 18 20 22 mV/dB RSSI intercept IR –164.7 –148 –134.4 dBm 230 230 RSSI output voltage 1 VR1 VIF = –14 dBm 2.58 2.68 2.78 V RSSI output voltage 2 VR2 VIF = –54 dBm 1.76 1.88 2.0 V RSSI output voltage 3 VR3 VIF = –94 dBm 0.88 1.08 1.28 V RSSI output voltage 4 VR4 No signal 0.96 1.23 V RSSI output temperature stability ST VIF = –94 to –14 dBm RSSI output dynamic range DR Note 3 RSSI rise time trf1 VIF = –14 dBm Note 4 1.0 4 µs RSSI fall time trf2 VIF = –14 dBm Note 4 1.6 4 µs RSSI output ripple RR VIF = –14 dBm 20 mVp-p RSSI output resistance ROR 32 38.4 kΩ 5 10 µs 1 3 µs 6 10 µA Power-on rise time tONI Note 2 80 25.6 VPO = 3 V, no signalNote 5 VNote 6 Power-off fall time tOFI VPO = 0 Power-off power supply current ILI VPO = 0 V ±2 dB 90 dB Notes 1. Network analyzer RBW = 3 Hz 2. TA = –30 °C to +85 °C 3. Input level range for which drift from the regression expression with VIF = –94 to –14 dBm is ≤ 2 dB 4. Time until the RSSI output reaches the final value ±10 % 5. Time until the RSSI output is within ±10 % of the power-on value Power-on input voltage (VPO) rise time: 10 ns 6. Time until the power supply current reaches 10 % of the power-on value Power-on input voltage (VPO) fall time: 10 ns (3) Power-On/Off Section Parameter Symbol Test Condition Power-on input voltage VON Power-on at VON or above, VCC or below Power-off input voltage VOF Power-off at VOF or below, GND or above Power-on input current ION VPO = 3 V 12 MIN. 0.6 TYP. MAX. Unit 1.5 2.4 V 1.2 40 V 60 µA µPC8002 4. CHARACTERISTIC DIAGRAMS (1) Power supply current vs power supply voltage (IF amplifier section) Power supply current [mA] 4 3 2 1 0 0 1 2 3 4 5 6 7 5 6 7 [V] Power supply voltage (2) Power supply current vs power supply voltage (Mixer section) 5 Power supply current [mA] 4 3 2 1 0 0 1 2 3 4 [V] Power supply voltage 13 µPC8002 (3) IF amplifier output level vs IF amplifier input level IF amplifier output level [dBm] 0 _ 3dB _ 10 _ 20 Limiting sensitivity _ 30 _ 120 _ 100 _ 80 _ 60 _ 40 _ 20 0 [dBm] IF amplifier input level (4) IF amplifier output phase vs IF amplifier input level Input/output phase difference [deg] 140 130 120 Phase fluctuation 110 Test input level range 100 _ 70 _ 60 _ 50 _ 40 _ 30 [dBm] IF amplifier input level 14 _ 20 _ 10 _ 14 µPC8002 (5) RSSI characteristics (a) Regression line 3 RSSI output voltage [V] 2.5 2 1.5 1 0.5 0 _ 120 _ 100 _ 80 Regression line _ 40 _ 20 0 _ 40 _ 20 0 _ 60 [dBm] IF amplifier input level (6) RSSI characteristics (b) 5 4 3 RSSI error [dB] 2 1 0 _1 _2 _3 _4 _5 _ 120 _ 100 _ 80 _ 60 [dBm] IF amplifier input level 15 µPC8002 (7) Mixer output level vs mixer input level 50 Ω resistance termination 0 _ 10 Mixer output level [dBm] _ 20 _ 30 _ 40 _ 50 _ 60 _ 70 _ 80 _ 70 _ 60 _ 50 _ 40 _ 30 [dBm] Mixer input level 16 _ 20 _ 10 0 µPC8002 5. LEVEL DIAGRAMS (1) For Application Circuit 1 µ PC8002GR MIXER BPF IF Amp1 BPF IF Amp2 + 8 dBNote 1 + 17 dBNote 2 _ 4 dB + 42 dB _ 4 dB + 66 dB _ 10 dBm _ 18 _ 27 dBmNote 2 _ 6.5 dBm _ 12 dBm _ 14 dBm dBmNote 1 IF OUT 0.3 Vp-p _ 16 dBm _ 52 dBm 80 dB _ 98 dBmNote 1 _ 107 dBmNote 2 _ 56 dBm 80 dB _ 90 dBm _ 94 dBm (2) For Application Circuit 2 µ PC8002GR MIXER IF Amp1 BPF IF Amp2 + 42 dB _ 4 dB + 66 dB IF OUT 0.3 Vp-p 330 pF + 8 dBNote 1 + 17 dBNote 2 _ 10 dBm _ 6.5 dBm _ 12 dBm _ 18 dBmNote 1 _ 27 dBmNote 2 _ 16 dBm _ 48 dBm 80 dB 80 dB _ 98 dBmNote 1 _ 107 dBmNote 2 _ 52 dBm _ 90 dBm Notes 1. 50 Ω resistance termination 2. LC matching (reference value) 17 µPC8002 6. TEST METHODS (1) Mixer input section (a) With 50 Ω resistance termination (b) With 50 Ω LC matching 470 pF 470 pF 8 8 MIX IN1 MIX IN1 VMIX VMIX 50 Ω Note CNote LNote Since the values of L and C are affected by the board’s parasitic capacitance and inductance, L and C should be adjusted so that the impedance looking at the MIX IN pin side from the signal source is 50 Ω. (2) Third order intercept MIX IN1 MIX OUT LO IN 8 2 5 470 p 470 p 50 Ω 82 pF 50 Ω 16.7 Ω VMIX fOSC = 239.3 MHz 16.7 Ω f1 = 250.3 MHz 18 16.7 Ω f2 = 250.6 MHz µPC8002 7. TEST CIRCUIT EXAMPLES In test circuit example 2 onward, only the portion that differs from test circuit example 1 is shown. Test Circuit Example 1. VCC 1 PD 2 MIX OUT BYPASS1 20 IF1 IN 19 1000 pF 330 pF 50 Ω 82 pF VCC BYPASS2 18 IF1 OUT 17 BYPASS4 16 IF2 IN 15 BYPASS3 14 MIX IN1 GND (IF OUT) 13 MIX IN2 VCC (IF OUT) 12 3 VCC (IF) 4 VCC (MIX) 5 LO IN 6 GND (IF) 7 GND (MIX) 8 9 1000 pF 1 µF 1 µF 1000 pF 0.01 µ F 470 pF 50 Ω BPF CFEC10.7MK1 (MURATA) 1000 pF VCC 0.01 µ F 470 pF 50 Ω 470 pF VCC 1 µF 1000 pF 10 RSSI OUT IF2 OUT 11 1000 pF 10 pF 10 pF 10 kΩ Caution The 10 pF capacitor value for IF2 OUT and RSSI OUT includes all the capacitances (board, pattern, etc.) applied to the pin. Ensure that the recommended load condition (10 pF) is not exceeded for IF2 OUT and RSSI OUT. Remark Chip laminated ceramic capacitors (MURATA GRM36 or equivalent) should be used. 19 µPC8002 Test Circuit Example 2. (Power supply current, power-off power supply current) VCC (IF) VCC (IF OUT) VCC (MIX) 3 12 4 A A 1 µF 1000 pF 1µ F 1000 pF VCC 1000 pF VCC Test Circuit Example 3. (Limiting sensitivity, IF amplifier output amplitude, IF amplifier output amplitude rise time, IF amplifier output amplitude fall time, RSSI linearity, RSSI slope, RSSI intercept, RSSI output voltage, RSSI temperature stability, RSSI output ripple) IF1 IN RSSI OUT IF2 OUT 19 10 11 330 pF 50 Ω 1000 pF 10 pF 10 kΩ Digital voltmeter Oscilloscope SG (Signal generator) 10.7 MHz Caution 10 pF Spectrum analyzer Oscilloscope The 10 pF capacitor value for IF2 OUT and RSSI OUT includes all the capacitances (board, pattern, etc.) applied to the pin. Ensure that the recommended load condition (10 pF) is not exceeded for IF2 OUT and RSSI OUT. 20 µPC8002 Test Circuit Example 4. (IF amplifier phase fluctuation) IF1 IN IF2 OUT 19 11 1000 pF 330 pF Attenuator 50 Ω 10 kΩ 10 pF Network analyzer Caution The 10 pF capacitor value for IF2 OUT includes all the capacitance (board, pattern, etc.) applied to the pin. Ensure that the recommended load condition (10 pF) is not exceeded. Test Circuit Example 5. (RSSI rise time, RSSI fall time) ... Time until RSSI output is within ±10 % of the final value) IF1 IN IF1 OUT IF2 IN RSSI OUT 19 17 15 10 330 pF 330 pF For IF1 input 10 pF 50 Ω 50 Ω For IF2 input SG 10.7 MHz, _14 dBm SG 10.7 MHz, _14 dBm Storage oscilloscope 2 Storage oscilloscope 1 Input signal from SG 1 SEC Caution 50 µ SEC The 10 pF capacitor value for RSSI OUT includes all the capacitances (board, pattern, etc) applied to the pin. 21 µPC8002 Test Circuit Example 6. (Power-on rise time) Mixer section : Time until the difference between the local input pin power-on and power-off voltage reaches 90 % : Time until RSSI output is within ±10 % of the power-on value. IF section PD LO IN RSSI OUT 1 5 10 10 pF SG Storage oscilloscope 1 Storage oscilloscope 2 Input signal from SG 3V 0V 50 µ SEC 1 SEC Remark Power-on input voltage (VPO) rise time: 10 ns Caution The 10 pF capacitor value for RSSI OUT includes all the capacitances (board, pattern, etc.) applied to the pin. Ensure that the recommended load condition (10 pF) is not exceeded. Test Circuit Example 7. (Power-off fall time) PD VCC (IF OUT) VCC (IF) VCC (MIX) 1 12 3 4 VCC VCC SG Storage oscilloscope Current probe Input signal from SG 3V 0V 1 SEC 22 50 µ SEC µPC8002 Test Circuit Example 8. (Conversion gain, –1 dB compression level) MIX OUT LO IN MIX IN1 2 5 8 470 pF 470 pF 82 pF 50 Ω See 6. TEST METHODS (1) Spectrum analyzer SG 239.3 MHz SG 250 MHz Test Circuit Example 9. (Third order intercept output level) MIX OUT LO IN MIX IN1 2 5 8 470 pF 470 pF 82 pF 50 Ω See 6. TEST METHODS (2) Spectrum analyzer SG 239.3 MHz Test Circuit Example 10. (Local separation) MIX OUT LO IN 2 5 470 pF 82 pF 50 Ω Spectrum analyzer SG 239.3 MHz 23 µPC8002 Test Circuit Example 11. (Power-on input voltage, power-off input voltage, power-on input current) PD 1 A V VCC Test Circuit Example 12. (Noise factor) MIX OUT LO IN MIX IN1 2 5 8 470 pF 470 pF 82 pF See 6. TEST METHODS (1) 50 Ω NF meter 24 Noise Source Remark indicates a through-hole. C5 C3 50 mm µPC8002 1 C1 VCC C6 C4 C7 R1 Plated wire 8. EVALUATION BOARD MOUNTING EXAMPLE 70 mm C2 IF2 OUT KC-8002GR µPC8002 25 26 Remark indicates a through-hole. IF1 IN R2 MIX OUT C9 C 8 BPF C11 VCC C 10 1 C 10 BPF C 9 R3 C11 C10 LOCAL IN C12 C 13 R4 L2 RSSI OUT L1 IF2 OUT MIX IN µPC8002 µPC8002 C1 : 1 µF R1 : 10 kΩ C2 : 1000 pF R2 : 50 Ω C3 : 1000 pF R3 : 50 Ω C4 : 1 µF R4 : 50 Ω C5 : 1 µF L1 : 58 nH (reference value) C6 : 1000 pF L2 : 10 nH (reference value) C7 : 10 pF Note C8 : 330 pF C9 : 0.01 µ F C10 : 0.01 µ F C11 : 470 pF C12 : 470 pF C13 : 10 pF Note Note For the IF2 OUT and RSSI OUT capacitance values, see 9. WIRING PATTERN CAPACITANCE DIAGRAM (REFERENCE). Remarks 1. Both L in the case of LC matching and R in the case of 50 Ω termination are connected to MIX IN. Remove R4 in the case of LC matching, and L1 and L2 in the case of 50 Ω termination. 2. Change the location of the plated wires according to the evaluation items. 3. Cut the wiring pattern to connect L2 . 27 µPC8002 9. WIRING PATTERN CAPACITANCE DIAGRAM (REFERENCE) The wiring pattern capacitances to ground are shown here. For pin 11, the capacitance is 8.1 pF when the entire pattern (from pin 11 to point B) is used. In this case, the usable probe input capacitance is 1.9 pF (MAX.). From pin 11 up to point A, the capacitance is 1.4 pF, and therefore an 8.6 pF (MAX.) probe can be used. For pin 10, the capacitance is 4 pF when the entire pattern is used. A Pin 11 IF2 OUT 3.0 pF 0.9 pF 0.5 pF 2.9 pF 0.8 pF Pin 10 RSSI OUT 28 B µPC8002 10. PACKAGE DRAWINGS 20 PIN PLASTIC SHRINK SOP (225mil) 20 11 P detail of lead end 1 H 10 A I E K F G J N B C D M L M NOTE Each lead centerline is located within 0.10 mm (0.004 inch) of its true position (T.P.) at maximum material condition. ITEM MILLIMETERS INCHES A 7.00 MAX. 0.276 MAX. B 0.575 MAX. 0.023 MAX. C 0.65 (T.P.) 0.026 (T.P.) D 0.22 +0.10 –0.05 0.009 +0.004 –0.003 E 0.1±0.1 0.004±0.004 F 1.45 MAX. 0.057 MAX. G 1.15±0.1 0.045 +0.005 –0.004 H 6.4±0.2 0.252±0.008 I 4.4±0.1 0.173 +0.005 –0.004 J 1.0±0.2 0.039 +0.009 –0.008 K 0.15 +0.10 –0.05 0.006 +0.004 –0.002 L 0.5±0.2 0.020 +0.008 –0.009 M 0.10 0.004 N 0.10 0.004 P 3˚ +7˚ –3˚ 3˚ +7˚ –3˚ P20GR-65-225C-1 29 µPC8002 11. RECOMMENDED SOLDERING CONDITIONS The following conditions ( see table below) must be met when soldering this product. For more details, refer to our document "SEMICONDUCTOR DEVICE MOUNTING TECHNOLOGY MANUAL" (C10535E). Please consult with our sales offices in case other soldering process or condition is used. TYPE OF SURFACE MOUNT DEVICE µ PC8002GR Soldering process Infrared Ray Reflow Soldering conditions Peak package's surface temperature: 235 ˚C or below. Symbol IR35-107-2 Reflow time : 30 seconds or below (210 ˚C or higher), Number of reflow processes : MAX.2 Exposure limit Note : 7 days (10 hours pre-baking is required at 125 ˚C afterwards) Peak package's temperature: 215 ˚C or below. VPS VP15-107-2 Reflow time : 40 seconds or below (200 ˚C or higher), Number of reflow processes : MAX. 2 Exposure limit Note : 7 days (10 hours pre-baking is required at 125 ˚C afterwards) Partial heating Terminal temperature : 300 ˚C or below, method Time : 3 seconds or below (Per side of pin position) Note Exposure limit before soldering after dry-pack package is opened. Storage conditions : 25 ˚C and relative humidity at 65 % or less. Caution Do not apply more than one soldering method at any one time, except for " Partial heating method". 30 µPC8002 [MEMO] 31 µPC8002 The application circuits and their parameters are for references only and are not intended for use in actual design-in's. No part of this document may be copied or reproduced in any form or by any means without the prior written consent of NEC Corporation. NEC Corporation assumes no responsibility for any errors which may appear in this document. NEC Corporation does not assume any liability for infringement of patents, copyrights or other intellectual property rights of third parties by or arising from use of a device described herein or any other liability arising from use of such device. No license, either express, implied or otherwise, is granted under any patents, copyrights or other intellectual property rights of NEC Corporation or others. While NEC Corporation has been making continuous effort to enhance the reliability of its semiconductor devices, the possibility of defects cannot be eliminated entirely. To minimize risks of damage or injury to persons or property arising from a defect in an NEC semiconductor device, customers must incorporate sufficient safety measures in its design, such as redundancy, fire-containment, and anti-failure features. NEC devices are classified into the following three quality grades: "Standard", "Special", and "Specific". The Specific quality grade applies only to devices developed based on a customer designated "quality assurance program" for a specific application. The recommended applications of a device depend on its quality grade, as indicated below. Customers must check the quality grade of each device before using it in a particular application. Standard: Computers, office equipment, communications equipment, test and measurement equipment, audio and visual equipment, home electronic appliances, machine tools, personal electronic equipment and industrial robots Special: Transportation equipment (automobiles, trains, ships, etc.), traffic control systems, anti-disaster systems, anti-crime systems, safety equipment and medical equipment (not specifically designed for life support) Specific: Aircrafts, aerospace equipment, submersible repeaters, nuclear reactor control systems, life support systems or medical equipment for life support, etc. The quality grade of NEC devices is "Standard" unless otherwise specified in NEC's Data Sheets or Data Books. If customers intend to use NEC devices for applications other than those specified for Standard quality grade, they should contact an NEC sales representative in advance. Anti-radioactive design is not implemented in this product. M4 96.5 32