NPC SM1124

SM1124 Series
Multimelody IC for Pagers
NIPPON PRECISION CIRCUITS INC.
PINOUT
The SM1124 Series are melody pager multi-melody
ICs fabricated in NPC’s Molybdenum-gate CMOS.
A maximum of 16 tunes can be stored in
programmable ROM, and the Molybdenum-gate
CMOS process realizes small-sized packages and
low power dissipation.
8-pin SOP
CLK
SI
ST
■
■
■
■
VDD
TEST
PACKAGE DIMENSIONS
4.4 0.2
6.2 0.3
Unit: mm
+ 0.10
0.15− 0.05
5.2 0.3
1.27
0.4 0.1
0.695TYP
1.5 0.1
■
■
5
4
0.05 0.05
■
■
Maximum of 16 tune selections (with up to 512
steps)
Level hold playback mode
External reference clock input. The frequency can
be selected from the following 12 settings.
• Playback frequency of each song varies (8
frequencies)
- 32.768 kHz system: 32.768 and 65.536 kHz
- 37.5 kHz system: 37.5 and 75.0 kHz
- 38.4 kHz system: 38.4 and 76.8 kHz
- 48.0 kHz system: 48.0 and 96.0 kHz
• Playback frequency of all songs is fixed (4
frequencies)
- 32.768 kHz system: 131.072 kHz
- 37.5 kHz system: 150.0 kHz
- 38.4 kHz system: 153.6 kHz
- 48.0 kHz system: 192.0 kHz
2-pin serial data tune selection
Power save function
External clock gating in non-play mode.
2.4 to 3.6 V supply voltage
8-pin plastic SOP package
Molybdenum-gate CMOS process
VSS
MTO
SC
FEATURES
■
8
1
124
OVERVIEW
0 10
0.4 0.2
NIPPON PRECISION CIRCUITS—1
SM1124 Series
BLOCK DIAGRAM
CLK*
Gate
1/2 or 1/4
Divider
1/128
VSS
SW
Scale
Counter
VDD
Scale
ROM
MTO
Main
ROM
TEST
SI*
Control
Circuit
SC*
ST*
Multiplexer
Tempo
Latch
Tempo
Counter
Rhythm
Counter
Address
Counter
Start
Address
Latch
*: Built-in Schmmit-Triger Circuit.
PIN DESCRIPTION
Number
Name
I/O
Function
1
CLK
I
External reference clock input (Schmitt-trigger circuit and gate circuit built-in)
2
SI
I
Playback control serial interface data input pin1
3
SC
I
Playback control serial interface clock input pin1
4
ST
I
Playback start/stop control signal input pin1
5
TEST
I
Test input pin. Leave open or tie to VSS. (Pull-down resistance built-in)
6
MTO
O
Playback signal output pin
7
VDD
–
Supply pin (+)
8
VSS
–
Ground pin
1. Pins SI, SC and ST have a built-in Schmitt-trigger circuit.
SPECIFICATIONS
Absolute Maximum Ratings
P arameter
Symbol
Condition
Rating
Unit
Supply voltage range
V DD
−0.3 to 5.0
V
Input voltage range
V IN
V SS − 0.2 to V DD + 0.2
V
Power dissipation
PD
150
mW
Storage temperature range
Tstg
−40 to 125
°C
Soldering temperature
Tsld
255
°C
Soldering time
tsld
10
s
NIPPON PRECISION CIRCUITS—2
SM1124 Series
Recommended Operating Conditions
VSS = 0 V unless otherwise specified
Rating
P arameter
Symbol
Condition
Unit
min
typ
max
Supply voltage
V DD
2.4
–
3.6
V
Operating temperature
Topr
−20
–
70
°C
DC Characteristics
Ta = −20 to 70 °C, VSS = 0 V, VDD = 2.4 to 3.6 V unless otherwise specified
Rating
P arameter
Symbol
Condition
Unit
min
typ
max
2.4
3.0
3.6
V
Supply voltage
V DD
Current consumption (1)
IDD1
Non-playback mode, 25°C
–
–
0.5
µA
Current consumption (2)
IDD2
Playback mode, MTO pin
open
–
25
200
µA
V DD − 0.2
–
V DD
V
V SS
–
V SS + 0.2
V
0.2
1.0
–
V
V IH
Input voltage
V IL
Hysteresis width
Input current
Open voltage
Output voltage
ST, SI, SC and CLK pins
VT
IIH1
ST, SI, SC and CLK pins,
V IH = V DD, 25°C
–
–
0.5
µA
IIL1
ST, SI, SC and CLK pins,
V IL = 0 V, 25°C
–
–
0.5
µA
IIH2
TEST pin, V IH = V DD
–
–
200
µA
VOPN
TEST pin
–
–
0.1
V
VOH
MTO pin, IOH = 1 mA
V DD − 0.4
–
V DD
V
VOL
MTO pin, IOL = 1 mA
V SS
–
V SS + 0.4
V
AC Characteristics
Ta = −20 to 70 °C, VSS = 0 V, VDD = 2.4 to 3.6 V unless otherwise specified
Rating
P arameter
Symbol
Condition
Unit
min
typ
max
5.0
–
–
µs
2.0
–
–
µs
CLK pulse cycle
tCLK
CLK HIGH-level pulsewidth
tCWH
CLK LOW-level pulsewidth
tCWL
2.0
–
–
µs
tSC
5.0
–
–
µs
2.0
–
–
µs
2.0
–
–
µs
2.0
–
–
µs
2.0
–
–
µs
SC pulsewidth
SC HIGH-level pulsewidth
tSWH
SC LOW-level pulsewidth
tSWL
SI-SC setup time
tDS
SI-SC hold time
tDH
“CLK input clock” timing
“SC input clock” timing
“Serial input” timing
NIPPON PRECISION CIRCUITS—3
SM1124 Series
CLK input clock
VIH
0.5VDD
VIL
CLK
t CWH
t CWL
t CLK
SC input clock
VIH
0.5VDD
VIL
SC
t SWH
t SWL
t SC
Serial input
VIH
0.5VDD
VIL
SC
t DS
SI
t DH
VIH
0.5VDD
VIL
FUNCTIONAL DESCRIPTION
Control Functions
External reference clock
The SM1124 can operate at 12 selectable external
reference clock frequencies. Of these, 8 are
selectable for each tune. When multiple external
clock frequencies are input to a single IC, the clock
must be switched during playback mode. Note that
when the frequency in parentheses is selected, all
tunes can only be played using that single fixed
frequency.
The external reference clock input is used at any time
as well as during playback mode. If a clock signal is
input when not in playback mode (when ST is
LOW), the gate circuit switches to cutoff the external
reference clock signal from entering the device,
preventing unwanted current flow.
• 32.768 kHz system: 32.768 kHz, 65.536 kHz,
(131.072 kHz)
• 37.5 kHz system: 37.5 kHz, 75.0 kHz,
(150.0 kHz)
• 38.4 kHz system: 38.4 kHz, 76.8 kHz,
(153.6 kHz)
• 48.0 kHz system: 48.0 kHz, 96.0 kHz,
(192.0 kHz)
NIPPON PRECISION CIRCUITS—4
SM1124 Series
Input during playback mode only
ST
CLK
Input during non-playback mode
ST
CLK
Playback control
The ST pin controls the start of playback. While ST
is HIGH (VDD), the tune is played repeatedly, and
when ST goes LOW (VSS), playback stops. Tunes
are selected by the input serial data on pins SI and
Invalid
Data
SI
SC. The final 4 bits form the valid selection data, and
this data is retained even after playback.
If serial data is input during playback, the SM1124
ignores this data and playback continues.
Valid
Data
Invalid
Data
B3 B2 B1 B0
SC
ST
,,,,,,,,,,,,,,,,,,,
,,,,,,,,,,,,,,,,,,,
,,,,,,,,,,,,,,,,,,,
MTO
* Pin SC should be LOW when either a LOW-to-HIGH or HIGH-to-LOW transition occurs on pin ST.
Serial data selection1
B3
B2
B1
B0
ST
Music selection
B3
B2
B1
B0
ST
Music selection
L
L
L
L
L→H
1st tune
H
L
L
L
L→H
9th tune
L
L
L
H
L→H
2nd tune
H
L
L
H
L→H
10th tune
L
L
H
L
L→H
3rd tune
H
L
H
L
L→H
11th tune
L
L
H
H
L→H
4th tune
H
L
H
H
L→H
12th tune
L
H
L
L
L→H
5th tune
H
H
L
L
L→H
13th tune
L
H
L
H
L→H
6th tune
H
H
L
H
L→H
14th tune
L
H
H
L
L→H
7th tune
H
H
H
L
L→H
15th tune
L
H
H
H
L→H
8th tune
H
H
H
H
L→H
16th tune
1. H = VDD level, L = VSS level
NIPPON PRECISION CIRCUITS—5
SM1124 Series
SI
#n1 Data
#n2 Data
ST
#n1 Play
MTO
#n1 Play #n1 Play
#n2 Play
*: Tune plays repeatedly when ST is HIGH, and stops immediately when ST goes LOW.
Playback timing diagrams
Playback start
Playback starts 128 ± 1 SCK clock cycles after ST
goes HIGH.
Invalid
Data
SI
Valid
Data
MSB
LSB
SC
ST
CLK
128
1 Clock
Internal
Clock
,,,,,,
,,,,,,
MTO
Playback stop
Playback stops immediately when ST goes LOW.
The IC internal clock also stops, regardless of
whether or not there is a clock input signal on pin
CLK.
ST
CLK
Internal
Clock
MTO
,,,,,,,,,,,,,,,,,
,,,,,,,,,,,,,,,,,
,,,,,,,,,,,,,,,,,
NIPPON PRECISION CIRCUITS—6
SM1124 Series
Musical Specifications
Maximum program steps
The mask for the built-in ROM can be programmed
with up to a maximum of 512 steps, where each step
represents either a note (sound pitch and length) or a
rest.
Note length (including rests)
Eight rhythm values for notes (rests) can be
programmed. Also, 2 or more notes can be
programmed as tied notes using a tie.
Note
Rest
0
1
2
3
4
5
6
7
x
e
e.
q
e
q.
q
h
Å
ä
ä.
Î
ä
Î.
Î
î
3
3
3
3
Pitch and scale
The SM1124 performs uniform interval length
processing to reduce the error at high pitches. This
maintains the relative phase when the frequency
varies from the input value.
The pitch varies with the external reference clock
frequency, as shown in the frequency on the
following page.
The frequency variation from the input frequency is
the sum of the relative error, shown in the frequency
table, plus the pitch error.
(Ex) 38.4 kHz system, A4 note
Relative error: 8.99 cent
Pitch error: −3.58 cent
Total: +5.41 cent
Error calculation method:
Output frequency
log 10 ------------------------------------------------Output frequency
Reference frequency
1200 × log 2 ------------------------------------------------- = 1200 × --------------------------------------------------------------Reference frequency
log 10 2
Output frequency
≈ 3986.3 × log 10 ------------------------------------------------Reference frequency
441.379
≈ 3986.3 × log 10 ------------------440.000
≈ 5.41 cent
NIPPON PRECISION CIRCUITS—7
SM1124 Series
Frequency tables
F r e q u e n cy
Number
divider
Relative
error
(cent)
32.768 kHz
system
Pitch
37.5 kHz system
38.4 kHz system
48 kHz system
F r e q u e n cy
F r e q u e n cy
F r e q u e n cy
F r e q u e n cy
Pitch
Pitch
Pitch
(Hz)
(Hz)
(Hz)
(Hz)
Pitch
Reference
frequency
C3
130.8128
C#3
138.5913
1
247
2.49
C3
132.664
D#3
151.822
D#3
155.466
G3
194.332
D3
146.8325
2
233
3.50
C#3
140.635
E3
160.944
E3
164.807
G#3
206.009
D#3
155.5635
3
220
2.89
D3
148.945
F3
170.455
F3
174.545
A3
218.182
E3
164.8138
4
208
0.00
D#3
157.538
F#3
180.288
F#3
184.615
A#3
230.769
F3
174.6143
5
196
2.88
E3
167.184
G3
191.327
G3
195.918
B3
244.898
F#3
184.9973
6
185
2.87
F3
177.124
G#3
202.703
G#3
207.568
C4
259.459
195.9978
175
−0.93
G3
7
F#3
187.246
A3
214.286
A3
219.429
C#4
274.286
G#3
207.6525
8
165
0.94
G3
198.594
A#3
227.273
A#3
232.727
D4
290.909
220.0000
156
−1.96
A3
9
G#3
210.051
B3
240.385
B3
246.154
D#4
307.692
A#3
233.0820
10
147
0.93
A3
222.912
C4
255.102
C4
261.224
E4
326.531
246.9418
11
139
−2.21
B3
A#3
235.741
C#4
269.784
C#4
276.259
F4
345.324
C4
261.6255
12
131
0.42
B3
250.137
D4
286.260
D4
293.130
F#4
366.412
277.1825
124
−4.50
C#4
13
C4
264.258
D#4
302.419
D#4
309.677
G4
387.097
293.6650
14
117
−3.91
D4
C#4
280.068
E4
320.513
E4
328.205
G#4
410.256
D#4
311.1270
15
110
2.89
D4
297.891
F4
340.909
F4
349.091
A4
436.364
E4
329.6275
16
104
0.00
D#4
315.077
F#4
360.577
F#4
369.231
A#4
461.538
F4
349.2285
17
98
2.88
E4
334.367
G4
382.653
G4
391.837
B4
489.796
369.9945
93
−6.46
F#4
18
F4
352.344
G#4
403.226
G#4
412.903
C5
516.129
G4
391.9955
19
87
8.99
F#4
376.644
A4
431.034
A4
441.379
C#5
551.724
G#4
415.3050
20
83
−9.52
G4
394.795
A#4
451.807
A#4
462.651
D5
578.313
440.0000
78
−1.96
A4
21
G#4
420.103
B4
480.769
B4
492.308
D#5
615.385
466.1640
22
74
−10.81
A#4
A4
442.811
C5
506.757
C5
518.919
E5
648.649
B4
493.8835
23
69
10.29
A#4
474.899
C#5
543.478
C#5
556.522
F5
695.652
523.2510
24
66
−12.74
C5
B4
496.485
D5
568.182
D5
581.818
F#5
727.273
554.3650
62
−4.50
C#5
25
C5
528.516
D#5
604.839
D#5
619.355
G5
774.194
D5
587.3300
26
58
10.95
C#5
564.966
E5
646.552
E5
662.069
G#5
827.586
D#5
622.2540
27
55
2.89
D5
595.782
F5
681.818
F5
698.182
A5
872.727
E5
659.2550
28
52
0.00
D#5
630.154
F#5
721.154
F#5
738.462
A#5
923.077
F5
698.4570
29
49
2.88
E5
668.735
G5
765.306
G5
783.673
B5
979.592
F#5
739.9890
30
46
12.26
F5
712.348
G#5
815.217
G#5
834.783
C6
1043.478
783.9910
44
−10.79
G5
31
F#5
744.727
A5
852.273
A5
872.727
C#6
1090.909
G#5
830.6100
32
41
11.47
G5
799.220
A#5
914.634
A#5
936.585
D6
1170.732
880.0000
39
−1.96
A5
33
G#5
840.205
B5
961.538
B5
984.615
D#6
1230.769
932.3280
37
−10.81
A#5
34
A5
885.622
C6
1013.514
C6
1037.838
E6
1297.297
987.7670
35
35
−14.62
B5
A#5
936.229
C#6
1071.429
C#6
1097.143
F6
1371.429
1046.5020
36
33
−12.74
C6
B5
992.970
D6
1136.364
D6
1163.636
F#6
1454.545
1108.7300
31
−4.50
C#6
37
C6
1057.032
D#6
1209.677
D#6
1238.710
G6
1548.387
D6
1174.6600
38
29
10.95
C#6
1129.931
E6
1293.103
E6
1324.138
G#6
1655.172
1244.5080
39
28
−28.30
D#6
D6
1170.286
F6
1339.286
F6
1371.429
A6
1714.286
E6
1318.5100
40
26
0.00
D#6
1260.308
F#6
1442.308
F#6
1476.923
A#6
1846.154
1396.9140
41
25
−32.09
F6
E6
1310.720
G6
1500.000
G6
1536.000
B6
1920.000
F#6
1479.9780
42
23
12.26
F6
1424.696
G#6
1630.435
G#6
1669.565
C7
2086.957
1567.9820
43
22
−10.79
G6
F#6
1489.455
A6
1704.545
A6
1745.455
C#7
2181.818
1661.2200
44
21
−30.25
G#6
G6
1560.381
A#6
1785.714
A#6
1828.571
D7
2285.714
+21.84 cent pitch
error
(Note) A4 is the following note.
ú
A4 (440Hz)
&
===
−44.64 cent pitch
error
−3.58 cent pitch
error
−17.26 cent pitch
error
A6
1760.0000
A#6
1864.6560
B6
1975.5340
C7
2093.0040
C#7
2217.4600
D7
2349.3200
NIPPON PRECISION CIRCUITS—8
SM1124 Series
Tempo
There are 29 tempos that can be selected for each
tune. The tempo varies with the external reference
frequency.
Tempo table
RO M
32.768 kHz system
Code
F r e q u e n cy
divider
03
4
04
5
Te m p
q=
37.5 kHz system
Te m p
320.0
Prestissimo
q=
6
Te m p
366.2
256.0
293.0
Prestissimo
05
38.4 kHz system
213.3
q=
48 kHz system
Te m p
q=
375.0
468.8
300.0
375.0
Prestissimo
244.1
250.0
312.5
Prestissimo
06
7
07
8
08
9
09
10
Presto
182.9
160.0
Allegro
209.3
Presto
142.2
183.1
162.8
128.0
146.5
Allegro
0A
11
Presto
214.3
267.9
187.5
234.4
166.7
208.3
150.0
Allegro
187.5
Presto
116.4
133.2
136.4
170.5
122.1
125.0
156.3
Moderato
0B
12
106.7
0C
13
98.5
Moderato
112.7
115.4
Moderato
0D
14
144.2
Allegro
91.4
104.6
107.1
133.9
97.7
100.0
125.0
91.6
93.8
Andante
0E
15
85.3
0F
16
80.0
Andante
10
17
11
18
12
19
13
20
Adagio
117.2
Moderato
75.3
86.2
71.1
Andante
88.2
110.3
81.4
83.3
104.2
67.4
77.1
78.9
98.7
64.0
73.2
75.0
93.8
Larghetto
14
21
61.0
15
22
58.2
16
23
55.7
Adagio
69.8
Adagio
71.4
Andante
89.3
66.6
68.2
85.2
63.7
65.2
81.5
62.5
78.1
75.0
Larghetto
17
24
53.3
61.0
Larghetto
18
25
51.2
58.6
60.0
19
26
49.2
56.3
57.7
72.1
Adagio
1A
27
1B
28
Largo
47.4
45.7
54.3
55.6
69.4
52.3
53.6
67.0
51.7
64.7
Largo
Largo
1C
29
44.1
50.5
1D
30
42.7
48.8
50.0
1E
31
41.3
47.3
48.4
1F
32
40.0
45.8
46.9
Larghetto
62.5
60.5
Largo
58.6
Quarter note (q) length = 1536 × tempo counter frequency divider ÷ CLK frequency
(Ex) Tempo code = 1F (divider = 32), CLK frequency = 32.768 kHz
1536 × 32 ÷ 32768 = 1.5 (seconds)
NIPPON PRECISION CIRCUITS—9
SM1124 Series
TYPICAL APPLICATION
Speaker drive with switching circuit
1.5V
SP
2.4 to 3.6V
R2
SM1124
VDD
DC-DC
Converter
CPU
VSS
CLK
R3
VSS
SI
VDD
SC
MTO
ST
TEST
SW1
R1
Q1
For example
Q1: hfe 100 MIN SP: Impedance 16Ω MIN
R1: 1.2kΩ
R2, R3: to be decided by sound volume
Speaker drive with Linear amplifier
1.5V
2.4 to 3.6V
SM1124
VDD
DC-DC
Converter
CLK
SI
CPU
VSS
VSS
VDD
C1
VCC
IN OUT
SC
MTO
ST
TEST
+
C2 SP
GND
VR1
For example
VR1: 10kΩ MIN
(As the output impedance of MTO terminal
is up to 1kΩ MAX, the value above is given
under the condition that output shall be over
90% of supply voltage amplitude. If it is set
below 10kΩ, output amplitude becomes
smaller.)
C1: to be decided by Input impedance of
amplifier.
C2, SP: to be decided by Output impedance
of amplifier.
NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to
improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for
the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits
are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision
Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification.
The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or
malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter,
including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or
indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies.
NIPPON PRECISION CIRCUITS INC.
NIPPON PRECISION CIRCUITS INC.
4-3, Fukuzumi 2-chome
Koto-ku, Tokyo 135-8430, Japan
Telephone: 03-3642-6661
Facsimile: 03-3642-6698
NC9503AE
1996.01
NIPPON PRECISION CIRCUITS—10