SM8230A NIPPON PRECISION CIRCUITS INC. OVERVIEW The DTMF frequencies can be set to correspond to the DTMF standards of any country. The output level is also adjustable under software control. These features, combined with its small package and low power dissipation, make the SM8230A a very use device to use. PINOUT SD 1 8230AS The SM8230A is a dual-tone signal generator LSI developed for DTMF (dual tone multi-frequency) dialing. It features a built-in piezo-electric speaker driver for direct connection to a piezo-electric buzzer. Tone Dialer with Built-in Piezo Driver SCL OE VSS 4 8 VDD BZH BZL 5 CLK PACKAGE DIMENSIONS ■ ■ ■ ■ ■ 3-line serial interface to external CPU 2 independent, adjustable frequency outputs Piezo driver for direct connection to a piezoelectric buzzer 4 system clock frequencies selectable (480 kHz, 960 kHz, 1.92 MHz, 3.84 MHz) 2.6 to 3.3 V supply voltage Low current consumption • 3.0 mA (max) operating current • 1 µA (max) standby current 8-pin plastic SOP + 0.10 0.15− 0.05 5.2 0.3 1.27 0.4 0.1 1.5 0.1 ■ 0.05 0.05 ■ 4.4 0.2 6.2 0.3 FEATURES 0 10 0.4 0.2 NIPPON PRECISION CIRCUITS—1 SM8230A BLOCK DIAGRAM VDD Programmable Counter High Group ROM D/A Converter Output Control BZH Output Control BZL SD LATCH SELECTOR SCL OE CLK Programmable Counter Low Group VSS ROM D/A Converter PIN DESCRIPTION Number Name I/O Description 1 SD I Serial data input 2 SCL I Serial data transfer clock input. (For valid transfer, OE must stay LOW for 16 clock cycles.) 3 OE I DTMF output enable/serial data transfer select input. Serial data transfer is selected when LOW. 4 VSS – Ground 5 CLK I System clock input. The clock can be set to one of four frequencies (480 kHz, 960 kHz, 1.92 MHz, 3.84 MHz). 6 BZL O DTMF low-frequency group analog output 7 BZH O DTMF high-frequency group analog output 8 VDD – Supply voltage NIPPON PRECISION CIRCUITS—2 SM8230A SPECIFICATIONS Absolute Maximum Ratings VSS = 0 V P arameter Symbol Rating Unit Supply voltage range V DD −0.3 to 7.0 V Input voltage range V IN V SS − 0.3 to V DD + 0.3 V VOUT V SS − 0.3 to V DD + 0.3 V Storage temperature range Tstg −55 to 125 °C Power dissipation PD 250 mW Soldering temperature Tsld 255 °C Soldering time tsld 10 s Output voltage range Recommended Operating Conditions VSS = 0 V Rating P arameter Symbol Condition Unit min typ max Supply voltage range V DD 2.6 3.0 3.3 V Operating temperature Topr −20 25 70 °C DC Characteristics VDD = 2.6 to 3.3V, VSS = 0 V, Ta = −20 to 70 °C Rating P arameter Symbol Condition Unit min typ max Operating current consumption IDD V DD = 3.0 V, Ta = 25 °C, fCLK = 480 kHz – 1.5 3 mA Standby current consumption IST V DD = 3.3 V, OE = LOW – – 1 µA V IH HIGH-level input 1.1 – V DD V IL LOW-level input V SS – 0.6 IIL HIGH/LOW-level input −1 – 1 µA 0.86VDD 0.93VDD 1.0VDD Vp-p – 1.0 – dB −1 – 1 dB 100 150 200 Ω Input voltage (all inputs) Input leakage current BZH/BZL tone output voltage VBZO BZH/BZL tone output adjustment step D RES BZH/BZL tone output absolute error D LIN BZH/BZL tone output impedance ZOUT 0 dB output level V ZBO levels V NIPPON PRECISION CIRCUITS—3 SM8230A AC Characteristics VDD = 2.6 to 3.3V, VSS = 0 V, Ta = −20 to 70 °C Rating P arameter Symbol Condition Unit min typ max fCLK = 3.84 MHz, no deviation – – 0.37 % BZH/BZL – 5 10 % 250 – – ns 100 – – ns 100 – – ns 100 – – ns tHDOE 100 – – ns SCL cycle time tSCL 1 – – µs SCL LOW-level pulsewidth tSCLL 400 – – ns SCL HIGH-level pulsewidth tSCLH 400 – – ns Input data setup time tSUD 100 – – ns 100 – – ns ∆f Tone output frequency error Tone distortion1 DIS CLK cycle time tCLK CLK LOW-level pulsewidth tCLKL CLK HIGH-level pulsewidth tCLKH OE setup time tSUOE OE hold time Input data hold time CLK input waveform Between OE and SCL SCL input waveform Between SD and SCL tHDD 1. Ta = -10 to 70°C, THD + N (10 Hz to 500 kHz), no load System clock input timing CLK tCLKL tCLKH tCLK Serial data transfer timing OE 1 SCL SD 2 DATA(b15) tSUD tSUOE tSCLH DATA(b14) 16 DATA(b0) tSCLL tHDD tSCL tHDOE NIPPON PRECISION CIRCUITS—4 SM8230A FUNCTIONAL DESCRIPTION (output enable), SCL (serial clock) and SD (serial data input). Note that data transfer is unidirectional; no data is output from the SM8230A. The operating sequence is described below. Serial Interface Data is transferred in 16-bit units by writing commands over a 3-line serial interface comprising OE Port CPU OE BZH R Serial Clock Serial Data SCL SD (Clock) CLK SM8230 Piezo Buzzer BZL Figure 1. Serial interface connection example Command transfer The internal states are undefined when power is first applied. Data can be transferred when OE goes LOW. Data is transferred in 16-bit units in sync with the rising edge of the SCL clock. DTMF analog signal output Data transfer stops and DTMF analog signal output starts when OE goes HIGH, as shown in figure 2. Note that when OE is LOW and both SD and SCL are tied LOW, the current consumption is less than 1 µA (standby mode). Piezo buzzer output Serial data transmission OE 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 b9 b8 b7 b6 b5 b4 b3 b2 b1 b0 SCL b15 b14 b13 b12 b11 b10 SD 0 0 CK1 CK0 FH1 FH0 GH3 GH2 GH1 GH0 FL1 FL0 GL3 GL2 GL1 GL0 MSB LSB BZL Low frequency group output BZH High frequency group output Figure 2. Serial data transfer timing NIPPON PRECISION CIRCUITS—5 SM8230A Transfer Command Specifications The transfer data code format is shown in figure 3. Data is transferred with the MSB as the leading bit. The data sets the input clock, high-frequency group and low-frequency group frequencies, and the output levels. The commands are shown in tables 1 to 4. b15(MSB) 0 b0(LSB) 0 CK1 CK0 FH1 FH0 GH3 GH2 GH1 GH0 FL1 FL0 GL3 GL2 GL1 GL0 Low group output level set. Low group frequency set. High group output level set. High group frequency set. CLK pin input frequency set. Set (b14, b15) = (0, 0) for normal operation. Figure 3. Transfer command format CK command (CK1, CK0) FH/FL command (HF1, FH0 / FL1, FL0) These bits set the frequency of the input clock on CLK. The frequency can be set to 1×, 2×, 4×, and 8× multiples of 480 kHz. The input code and the corresponding clock frequency are shown in table 1. These bits set the DTMF signal high-frequency and low-frequency group frequencies, respectively. Table 1. CK command The input code, the corresponding group frequency specification, the design value and frequency deviation are shown in tables 2 and 3. CK1 CK0 CLK input clock frequency 0 0 480 kHz Note that the design value and frequency deviation are calculated values assuming a deviation-free system clock input on CLK. 0 1 960 kHz Table 2. FH command 1 0 1.92 MHz 1 1 3.84 MHz FH1 FH0 DTMF frequency (Hz) Design value (Hz) D e viation (%) 0 0 1209 1212.1 +0.26 0 1 1336 1333.3 −0.20 1 0 1477 1481.5 +0.30 1 1 1633 1632.7 −0.02 Table 3. FL command FH1 FH0 DTMF frequency (Hz) Design value (Hz) D e viation (%) 0 0 697 697.7 +0.10 0 1 770 769.2 −0.10 1 0 852 851.1 −0.11 1 1 941 937.5 −0.37 NIPPON PRECISION CIRCUITS—6 SM8230A GH/GL command (GH3 to GH0, GL3 to GL0) These bits set the output levels of the high-frequency group and low-frequency group outputs, respectively. The input code and the corresponding output level are shown in table 4. Note that the 0 dB point is typically 93% of the supply voltage. Any value above 0 dB results in amplitude clipping of the output waveform. Table 4. GH/GL command GH3/GL 3 GH2/GL 2 GH1/GL 1 GH0/GL 0 Output level 0 0 0 0 −9 dB 0 0 0 1 −8 dB 0 0 1 0 −7 dB 0 0 1 1 −6 dB 0 1 0 0 −5 dB 0 1 0 1 −4 dB 0 1 1 0 −3 dB 0 1 1 1 −2 dB 1 0 0 0 −1 dB 1 0 0 1 0 dB 1 0 1 0 1 dB 1 0 1 1 2 dB 1 1 0 0 3 dB 1 1 0 1 4 dB 1 1 1 0 5 dB 1 1 1 1 6 dB NIPPON PRECISION CIRCUITS INC. reserves the right to make changes to the products described in this data sheet in order to improve the design or performance and to supply the best possible products. Nippon Precision Circuits Inc. assumes no responsibility for the use of any circuits shown in this data sheet, conveys no license under any patent or other rights, and makes no claim that the circuits are free from patent infringement. Applications for any devices shown in this data sheet are for illustration only and Nippon Precision Circuits Inc. makes no claim or warranty that such applications will be suitable for the use specified without further testing or modification. The products described in this data sheet are not intended to use for the apparatus which influence human lives due to the failure or malfunction of the products. Customers are requested to comply with applicable laws and regulations in effect now and hereinafter, including compliance with export controls on the distribution or dissemination of the products. Customers shall not export, directly or indirectly, any products without first obtaining required licenses and approvals from appropriate government agencies. NIPPON PRECISION CIRCUITS INC. NIPPON PRECISION CIRCUITS INC. 4-3, 2-chome Fukuzumi Koutou-ku, Tokyo 135-8430, Japan Telephone: 03-3642-6661 Facsimile: 03-3642-6698 NC9614BE 1997.01 NIPPON PRECISION CIRCUITS—7