SN54LVTR245, SN74LVTR245 3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS428 – OCTOBER 1993 • • • • • • DIR A1 A2 A3 A4 A5 A6 A7 A8 GND 1 20 2 19 3 18 4 17 5 16 6 15 7 14 8 13 9 12 10 11 VCC OE B1 B2 B3 B4 B5 B6 B7 B8 SN54LVTR245 . . . FK PACKAGE (TOP VIEW) A3 A4 A5 A6 A7 description 4 3 2 1 20 19 18 5 17 6 16 7 15 8 14 9 10 11 12 13 B1 B2 B3 B4 B5 A8 GND B8 B7 B6 These octal bus transceivers are designed specifically for low-voltage (3.3-V) VCC operation, but with the capability to provide a TTL interface to a 5-V system environment. OE • SN54LVTR245 . . . J PACKAGE SN74LVTR245 . . . DB, DW, OR PW PACKAGE (TOP VIEW) State-of-the-Art Advanced BiCMOS Technology (ABT) Design for 3.3-V Operation and Low-Static Power Dissipation Supports Mixed-Mode Signal Operation (5-V Input and Output Voltages With 3.3-V VCC) Supports Unregulated Battery Operation Down to 2.7 V Typical VOLP (Output Ground Bounce) < 0.8 V at VCC = 3.3 V, TA = 25°C Latch-Up Performance Exceeds 500 mA Per JEDEC Standard JESD-17 Bus-Hold Data Inputs Eliminate the Need for External Pullup Resistors Reduced Output Structure on A Port Minimizes VOHV Package Options Include Plastic Small-Outline (DW), Shrink Small-Outline (DB), and Thin Shrink Small-Outline (PW) Packages, Ceramic Chip Carriers (FK), and Ceramic DIPs (J) A2 A1 DIR VCC • The ′LVTR245 is designed for asynchronous communication between data buses. The device transmits data from the A bus to the B bus or from the B bus to the A bus depending upon the logic level at the direction-control (DIR) input. The output-enable (OE) input can be used to disable the device so the buses are effectively isolated. Active bus-hold circuitry is provided to hold unused or floating data inputs at a valid logic level. The A port is designed to minimize the undershoot exhibited on high to low transition during simultaneous switching conditions. The SN74LVTR245 is available in TI’s shrink small-outline package (DB), which provides the same I/O pin count and functionality of standard small-outline packages in less than half the printed-circuit-board area. The SN54LVTR245 is characterized for operation over the full military temperature range of – 55°C to 125°C. The SN74LVTR245 is characterized for operation from – 40°C to 85°C. FUNCTION TABLE INPUTS OE DIR OPERATION L L B data to A bus L H A data to B bus H X Isolation Copyright 1993, Texas Instruments Incorporated UNLESS OTHERWISE NOTED this document contains PRODUCTION DATA information current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SN54LVTR245, SN74LVTR245 3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS428 – OCTOBER 1993 logic symbol† OE DIR A1 19 1 2 logic diagram (positive logic) G3 DIR 1 3EN1[BA] 3EN2[AB] 19 18 1 B1 A1 OE 2 2 A2 A3 A4 A5 A6 A7 A8 3 17 4 16 5 15 6 14 7 13 8 12 9 11 B2 18 B3 B1 B4 B5 B6 B7 To Seven Other Channels B8 † This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. absolute maximum ratings over operating free-air temperature range (unless otherwise noted)‡ Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 4.6 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 0.5 V to 7 V Voltage range applied to any output in the high state or power-off state, VO (see Note 1) . . . . – 0.5 V to 7 V Current into any output in the low state, IO: SN54LVTR245 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 96 mA SN74LVTR245 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 128 mA Current into any output in the high state, IO (see Note 2): SN54LVTR245 . . . . . . . . . . . . . . . . . . . . . . . . 48 mA SN74LVTR245 . . . . . . . . . . . . . . . . . . . . . . . . 64 mA Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 50 mA Maximum power dissipation at TA = 55°C (in still air): DB package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.65 W DW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.85 W PW package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0.6 W Storage temperature range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . – 65°C to 150°C ‡ Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed. 2. This current will only flow when the output is in the high state and VO > VCC. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54LVTR245, SN74LVTR245 3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS428 – OCTOBER 1993 recommended operating conditions SN54LVTR245 SN74LVTR245 MIN MAX MIN MAX 2.7 3.6 2.7 3.6 UNIT VCC VIH Supply voltage VIL VI Low-level input voltage 0.8 0.8 V Input voltage 5.5 5.5 V B port – 24 – 32 A port –8 –12 High-level input voltage 2 2 V V IOH High level output current High-level IOL IOL† Low-level output current 24 32 mA Low-level output current 48 64 mA ∆t /∆v Input transition rise or fall rate 10 ns / V 85 °C Outputs enabled TA Operating free-air temperature † Current duty cycle ≤ 50%, f ≥ 1 kHz 10 – 55 125 – 40 mA PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SN54LVTR245, SN74LVTR245 3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS428 – OCTOBER 1993 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER VIK VCC = 2.7 V, VCC = MIN to MAX‡, II = –18 mA IOH = –100 µA VCC = 2.7 V, IOH = – 8 mA IOH = – 24 mA VCC = 3 V VOH VCC = MIN to MAX‡, VCC = 2.7 V, VCC = 3 V VCC = 2 2.7 7V VOL VCC = 3 V ICC VCC = 3.6 V, VI = VCC or GND VCC – 0.2 2.4 –1.2 2 A port VCC – 0.2 2.4 VCC – 0.2 2.4 2.4 2.4 V 2 2 0.2 0.5 0.5 IOL = 16 mA IOL = 32 mA 0.4 0.4 0.5 0.5 IOL = 48 mA IOL = 64 mA 0.55 VI = 2 V VO = 3 V V 0.55 Control pins A or B ports§ ±1 ±1 10 10 100 20 5 5 –5 A or B ports 75 –75 –75 µA 1 1 µA –1 –1 µA Outputs high 0.13 0.5 0.13 0.19 Outputs low 8.8 14 8.8 12 0.13 0.5 0.13 0.19 Outputs disabled ∆ICC¶ VCC = 3 V to 3.6 V, One input at VCC – 0.6 V, Other inputs at VCC or GND Ci VI = 3 V or 0 VO = 3 V or 0 0.3 4 µA –5 75 VO = 0.5 V IO = 0, V 2 0.2 VI = 0 VI = 0.8 V UNIT VCC – 0.2 2.4 IOL = 100 µA IOL = 24 mA VCC = 3.6 V VCC = 3.6 V, VCC = 3.6 V, B port IOH = – 8 mA IOH = –12 mA VI = 5.5 V VI = VCC IOZH IOZL SN74LVTR245 TYP† MAX MIN –1.2 IOH = – 1 mA IOH = – 3 mA VI = VCC or GND VI = 5.5 V VCC = 3 V MIN IOH = – 32 mA IOH = –100 µA VCC = 3.6 V, VCC = 0 or MAX‡, II II(hold) I(h ld) SN54LVTR245 TYP† MAX TEST CONDITIONS 0.2 mA mA 4 pF Cio 10 10 † All typical values are at VCC = 3.3 V, TA = 25°C. ‡ For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. § Unused pins at VCC or GND ¶ This is the increase in supply current for each input that is at the specified TTL voltage level rather than VCC or GND. pF PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. 4 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SN54LVTR245, SN74LVTR245 3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS428 – OCTOBER 1993 switching characteristics, CL = 50 pF (unless otherwise noted) (see Figure 1) PARAMETER FROM (INPUT) TO (OUTPUT) SN54LVTR245 TA = – 55°C to 125°C VCC = 3.3 V VCC = 2.7 V ± 0.3 V MIN tPLH tPHL MAX MIN SN74LVTR245 TA = – 40°C to 85°C VCC = 3.3 V ± 0.3 V VCC = 2.7 V MAX MIN TYP† MAX MIN MAX A B 1.1 4.3 4.8 1.1 2.5 4.2 4.7 B A 1.4 4.5 5.4 1.4 2.7 4.4 5.3 A B 1.1 4.7 5.9 1.1 2.6 4.6 5.8 B A 1 4.2 5.3 1 2.3 4.1 5.1 B 1.3 5.9 7 1.3 3.1 5.5 6.7 A 1.6 6.1 8.4 1.6 3.6 6 8.3 tPZH OE tPZL OE tPHZ OE tPLZ OE UNIT B 2 6.7 8.1 2 3.9 6.6 8 A 1.8 6.5 7.7 1.8 3.8 6.4 7.6 B 2.7 6.5 7 2.7 4.2 6.1 6.7 A 2.5 6.2 6.8 2.5 4 5.8 6.4 B 2.4 5.6 5.6 2.4 3.7 5.2 5.4 A 2.4 5.5 5.6 2.4 3.7 5.2 5.3 ns ns ns ns ns ns † All typical values are at VCC = 3.3 V, TA = 25°C. PRODUCT PREVIEW information concerns products in the formative or design phase of development. Characteristic data and other specifications are design goals. Texas Instruments reserves the right to change or discontinue these products without notice. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SN54LVTR245, SN74LVTR245 3.3-V ABT OCTAL BUS TRANSCEIVERS WITH 3-STATE OUTPUTS SCAS428 – OCTOBER 1993 PARAMETER MEASUREMENT INFORMATION 7V S1 500 Ω From Output Under Test Open GND CL = 50 pF (see Note A) 500 Ω TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 7V GND LOAD CIRCUIT FOR OUTPUTS 2.7 V Output Control 1.5 V 1.5 V 0V tPZL 2.7 V Input (see Note B) 1.5 V 1.5 V 0V tPHL tPLH VOH Output 1.5 V 1.5 V VOL tPLZ Output Waveform 1 S1 at 7 V (see Note C) Output Waveform 2 S1 at Open (see Note C) VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES 1.5 V tPZH 3V VOL + 0.3 V VOL tPHZ 1.5 V VOH – 0.3 V VOH 0V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf ≤ 2.5 ns. C. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. D. The outputs are measured one at a time with one transition per measurement. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 IMPORTANT NOTICE Texas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. 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