PTB48510, PTB48511 Dual Complementary-Output DC/DC Converter for DSL SLTS219C - FEBRUARY 2004 - REVISED OCTOBER 2004 Features • Dual Complementary Outputs (±5 V, ±12 V, or ±15 V) • Input Voltage Range: 36 V to 75 V • On/Off Enable for Sequencing • 1500 VDC Isolation • Over-Current Protection • Over Voltage Protection (PTB48511 only) • Over-Temperature Shutdown • • • • • • Under-Voltage Lockout Temp Range: –40 to +100 °C Industry Standard Outline Fixed Frequency Operation Synchronizes with PTB48500 Powers line driver ICs for AC-7 and other xDSL chipsets • Safety Approvals: EN60950 UL/cUL60950 Description Pin Configuration The PTB4851x series of isolated DC/DC converter modules produce a complementary pair of regulated supply voltages for powering line-driver ICs in xDSL telecom applications. The modules operate from a standard telecom (-48 V) central office (CO) supply and can provide up to a 72 W of power in a balanced load configuration. The A-suffix module (±5 V) is designed to power the line driver ICs for the AC-7 ADSL chipset. Other voltage options will power other analog applications requiring a complementary supply with relatively balanced loads. Both the PTB48510 and PTB48511 include an “on/off” enable control, output current limit, over-temperature protection, and input under-voltage lockout (UVLO). The PTB48511 adds output over-voltage protection (OVP). The control inputs, “Enable” and “Sync In,” are compatible with the “EN Out” and “Sync Out” signals of the PTB48500 DC/DC converter. This allows the power-up and switching frequency of the PTB4851x modules to be directly controlled from a PTB48500. Together the PTB48500 and PTB4851xA converters meet all the system power and sequencing requirements of the AC-7 ADSL chipset. The PTB4851x uses double-sided surface mount technology contruction. The package size is based on the industry standard outline and does not require a heatsink. Both through-hole and surface mount pin configurations are available. Pin 1 2 3 4 5 6 7 8 Shaded functions indicate signals that are referenced to –Vin. * Denotes negative logic: Open = Outputs Off –Vin = Normal operation Stand-Alone Application PTB4851x +VIN +VOUT 1 2 3 +Vin +VOUT 5 L O A D Sync In ±V o Adj Enable COM 7 6 COM –VIN 4 L O A D –Vin –VOUT For technical support and further information visit http://power.ti.com 8 –VOUT Function +Vin Sync In Enable * –Vin +V out COM Vo Adjust –Vout PTB48510, PTB48511 Dual Complementary-Output DC/DC Converter for DSL SLTS219C - FEBRUARY 2004 - REVISED OCTOBER 2004 Ordering Information Base Pt. No. (PTB4851❒xxx) Output Voltage (PTB4851x❒xx) Package Options (PT4851xx❒❒) Order Prefix PTB48510xxx PTB48511xxx Code A B C Notes: (1) (2) (3) (4) Description Basic Model Adds Output OVP (1) Voltage ±5 V ±12 V ±15 V (4) Code AH AS Description Horiz. T/H SMD, Standard (3) Pkg Ref. (2) (ERK) (ERL) Output Over-Voltage Protection. Reference the applicable package reference drawing for the dimensions and PC board layout “Standard” option specifies 63/37, Sn/Pb pin solder material. ±15-V output is not available with the PTB48511 Pin Descriptions +Vin: The positive input supply for the module with respect to –Vin. When powering the module from a –48 V telecom central office supply, this input is connected to the primary system ground. ±Vo Adjust: Using a single resistor, this pin allows the magnitude of both ‘+Vout’ and ‘–Vout’ to be adjusted together, either higher or lower than their preset value. If not used, this pin should be left open circuit. –Vin: The negative input supply for the module, and the 0 VDC reference for the ‘Enable*’, and ‘Sync In’ signals. When the module is powered from a +48-V supply, this input is connected to the 48-V Return. Enable*: This is an open-collector (open-drain) negative logic input that enables the module output. This pin is referenced to -Vin. A logic ‘0’ at this pin enables the module’s outputs, and a high impedance disables the outputs. If this feature is not used the pin should be connected to –Vin. Note: Connecting this input directly to the “EN Out” pin of the PTB4850x enables the output voltages from both converters (PTB4850x and PTB4851x) to power up in sequence. +Vout: The positive output supply voltage, which is referenced to the ‘COM’ node. The voltage at ‘+Vout’ has the same magnitude, but is the complement to that at ‘-Vout’. –Vout: The negative output supply voltage, which is referenced to the ‘COM’ node. The voltage at ‘-Vout’ has the same magnitude, but is the complement to that at ‘+Vout’. COM: The secondary return reference for the module’s regulated output voltages. This node is dc isolated from the input supply pins. Environmental and General Specifications Sync In: This pin is used when the PTB4851x and PTB4850x DC/DC converter modules are used together. Connecting this pin to the ‘Sync Out’ of the PTB4850x module allows the PTB4851x to be synchronized to the same switch conversion frequency as the PTB4850x. (Unless otherwise stated, all voltages are with respect to –V in ) Characteristics Symbols Conditions Min Typ Max Units Input Voltage Range Isolation Voltage Capacitance Resistance Operating Temperature Range Over-Temperature Protection Vin 36 1500 — 10 –40 — — 48 — 1500 — — 115 (i) 10 Treflow Ts –40 — — — — — — 500 250 10 5 28 75 — — — +85 — — 235 (ii) 125 — — — — — VDC V pF MΩ °C Solder Reflow Temperature Storage Temperature Mechanical Shock Over output load range Input–output/input–case Input to output Input to output Over Vin Range Shutdown threshold Hysterisis Surface temperature of module body or pins — Per Mil-STD-883D, Method 2002.3 1 msec, ½ Sine, mounted Mil-STD-883D, Method 2007.2 20-2000 Hz Ta OTP Mechanical Vibration Weight Flammability — — T/H SMD T/H SMD °C °C °C G’s G’s grams Meets UL 94V-O Notes: (i) This parameter is guaranteed be design (ii) During reflow of SMD package version do not elevate peak temperature of the module, pins or internal components above the stated maximum. For technical support and further information visit http://power.ti.com PTB48510A, PTB48511A Dual Complementary-Output DC/DC Converter for DSL Specifications SLTS219C - FEBRUARY 2004 - REVISED OCTOBER 2004 (Unless otherwise stated, T a =25°C, V in =48 V, C in =0 µF, ±C o =0 µF, |+I o | = |–I o |, and |±Io | =0.5 |±I o |max) PTB4851xA Characteristic Symbol Conditions Min Typ Max Units Output Power Output Current Output Load Imbalance Output Voltage Po |±Io | |+Io | – |–Io | |±Vo | 0 0 0 4.75 (2) — — — 5 65 (1) 6.5 (2) 1 (3) 5.25 (2) W A A V Temperature Variation ∆Regtemp ∆Regline ∆Regload η ±Vr — — — — — ±1 ±1 ±0.1 ±0.2 86 — — ±0.4 ±0.4 — %Vo Line Regulation Load Regulation Efficiency Vo Ripple (pk-pk) Total output power from ±Vo Over Vin range, |+Io | – |–Io | ≤ 0.1 A |+Io | ≥0.1 A, |–Io | ≥ 0.1 A Inlcudes set-point, line, |+Io | – |–Io | ≤ 0.1 A –40 ≤Ta ≤+85°C –40 ≤Ta ≤ +85°C, |±Io | =0.1 A +Vo –Vo Over Vin range, balanced load ±Vo Over ±Io range, balanced load ±Vo — 20 30 Transient Response — — 30 ±1.0 — — µs %Vo Over Current Threshold ttr ∆Vtr Iotrip Over-Voltage Threshold |±Vo | trip 20 MHz bandwidth, Co =10 µF tantalum capacitor 0.1 A/µs load step, 50% to 75% ±Iomax |±Vo | over/undershoot Vin =36 V reset followed by auto-recovery Outputs latched off (5) PTB48510 PTB48511 Continuous over-current trip, |±Io |pk |+Io | = |–Io | Duty |+Vo | and |–Vo | adjust simulataneously Over Vin and Io ranges Vin increasing Vin decreasing Referenced to –Vin (pin 4) Short Circuit Current Output Voltage Adjust Range Switching Frequency Under-Voltage Lockout |±Vo | adj ƒs Vinon Vinoff On/Off Enable (pin 3) Input High Voltage Input Low Voltage Input Low Current VIH VIL IIL Standby Input Current Start-up Time Internal Input Capacitance External Output Capacitance Reliability Iin standby ton Cin ±Co MTBF pin 3 open circuit |±Io | =1 A, |±Vo | rising 0 to 0.95 |±Vo | typ Capacitance from either output to COM (pin 6) Per Bellcore TR-332 PTB48510A 50% stress, Ta =40°C, gnd benign PTB48511A (4) %Vo %Vo % mVpp 6.8 7.5 10 A N/A 5.9 — — 3.5 440 — — — — 12.5 10 — 470 (6) 33 32 N/A 7 — — 5.5 500 — — V +3.6 –0.2 — — 6 — 0 2.7 2.5 — — — 2 10 3 — — — +75 (7) +0.8 –1 — 22 — 5,000 (8) — — A % V kHz V V mA mA ms µF µF 106 Hrs Notes: (1) See Safe Operating Area curves or contact the factory for the appropriate derating. (2) Under balanced load conditions, load current flowing out of +V o is balanced to within ±0.1 A of that flowing into –V o. (3) A load imbalance is the difference in current flowing from +Vo to –V o . The module can operate with a higher imbalance but with reduced specifications. (4) Output voltage ripple is measured with a 10 µF tantalum capacitor connected from +V o (pin 5) or –V o (pin 8), to COM (pin 6). (5) If the over-voltage threshold is exceeded by either regulated output the module will shut down, turning both outputs off. This is a latched condition, which can only by reset by removing and then re-applying the module’s input power. (6) This is the free-running frequency. The module can be made to synchronize with the PTB48500 when both modules are used together in a system. (7) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected and may be connected to +V in. The open-circuit voltage is 5 V max. If it is left open circuit the converter will operate when input power is applied. (8) Electrolytic capacitors with very low equivalent series resistance (ESR) may induce instability when used on the output. Consult the factory before using capacitors with organic, or polymer-aluminum type electrolytes. For technical support and further information visit http://power.ti.com PTB48510A, PTB48511A Typical Characteristics 65-W Complementary-Output DC/DC Converter for DSL SLTS219C - FEBRUARY 2004 - REVISED OCTOBER 2004 PTB4851xA Characteristic Data @VIN =48 V Safe Operating Area PTB4851xA (See Notes A) Efficiency vs Load Current (See Note B) (See Note C) Balanced Load, VIN =48 VDC (See Note B) 100 90 80 Ambient Temperature (°C) Efficiency - % 90 80 70 60 Airflow 70 400LFM 200LFM 100LFM Nat Conv 60 50 40 30 50 20 0 1 2 3 4 5 6 |±IOUT| (Balanced) A 0 1 2 3 4 5 6 |± Iout| (A) Power Dissipation vs Load Current (See Note B) 12 10 Pd - Watts 8 6 4 2 0 0 1 2 3 4 5 6 |±IOUT| (Balanced) A Cross Regulation, ∆|+VO| vs |–IO|, with |+IO| = 1 A Cross Regulation |+Io| - mV 300 200 100 0 -100 -200 -300 0 1 2 3 4 5 6 Load Current |–IO| - A Cross Regulation, ∆|–VO| vs |+IO|, with |–IO| = 1 A Cross Regulation |–Io| - mV 300 200 100 0 -100 -200 -300 0 1 2 3 4 5 6 Load Current |+IO| - A Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter. Note B: Under a balanced load, current flowing out of +Vo is equal to that flowing into –Vo. Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper. For technical support and further information visit http://power.ti.com PTB48510B, PTB48511B Dual Complementary-Output DC/DC Converter for DSL Specifications SLTS219C - FEBRUARY 2004 - REVISED OCTOBER 2004 (Unless otherwise stated, T a =25°C, V in =48 V, C in =0 µF, ±C o =0 µF, |+I o | = |–I o |, and |±Io | =0.5 |±I o |max) PTB4851xB Characteristic Symbol Conditions Min Typ Max Units Output Power Output Current Output Load Imbalance Output Voltage Po |±Io | |+Io | – |–Io | |±Vo | 0 0 0 11.6 (2) — — — 12 72 (1) 3 (2) 1 (3) 12.4 (2) W A A V Temperature Variation Line Regulation Load Regulation Efficiency Vo Ripple (pk-pk) ∆Regtemp ∆Regline ∆Regload η ±Vr Total output power from ±Vo Over Vin range, |+Io | – |–Io | ≤ 0.1 A |+Io | ≥0.1 A, |–Io | ≥ 0.1 A Inlcudes set-point, line, |+Io | – |–Io | ≤ 0.1 A –40 ≤Ta ≤+85°C –40 ≤Ta ≤ +85°C, |±Io | =0.1 A ±Vo Over Vin range, balanced load ±Vo Over ±Io range, balanced load ±Vo — — — — ±1 ±0.05 ±0.1 89 — ±0.5 ±1 — %Vo %Vo %Vo % — 20 80 Transient Response — — 30 ±1 — — µs %Vo Over Current Threshold ttr ∆Vtr Iotrip 3.3 3.8 5 A Over-Voltage Threshold |±Vo | trip 20 MHz bandwidth, Co =10 µF tantalum capacitor 0.1 A/µs load step, 50% to 75% ±Iomax |±Vo | over/undershoot Vin =36 V reset followed by auto-recovery Outputs latched off (5) PTB48510A PTB48511A Continuous over-current trip, |±Io |pk |+Io | = |–Io | Duty |+Vo | and |–Vo | adjust simulataneously Over Vin and Io ranges Vin increasing Vin decreasing Referenced to –Vin (pin 4) N/A 14 — — 6.5 440 — — — 15.8 6 10 — 480 (6) 33 32 N/A 17 — — 13.4 520 — — V +3.6 –0.2 — — 6 — 0 2.8 2.5 — — — 2 12 3 — — — +75 (7) +0.8 –1 — 18 — 3,000 (8) — — Short Circuit Current Output Voltage Adjust Range Switching Frequency Under-Voltage Lockout |±Vo | adj ƒs Vinon Vinoff On/Off Enable (pin 3) Input High Voltage Input Low Voltage Input Low Current VIH VIL IIL Standby Input Current Start-up Time Internal Input Capacitance External Output Capacitance Reliability Iin standby ton Cin ±Co MTBF pin 3 open circuit |±Io | =1 A, |±Vo | rising 0 to 0.95 |±Vo | typ Capacitance from either output to COM (pin 6) Per Bellcore TR-332 PTB48510B 50% stress, Ta =40°C, gnd benign PTB48511B (4) mVpp A % V kHz V V mA mA ms µF µF 106 Hrs Notes: (1) See Safe Operating Area curves or contact the factory for the appropriate derating. (2) Under balanced load conditions, load current flowing out of +V o is balanced to within ±0.1 A of that flowing into –V o. (3) A load imbalance is the difference in current flowing from +Vo to –V o . The module can operate with a higher imbalance but with reduced specifications. (4) Output voltage ripple is measured with a 10 µF tantalum capacitor connected from +V o (pin 5) or –V o (pin 8), to COM (pin 6). (5) If the over-voltage threshold is exceeded by either regulated output the module will shut down, turning both outputs off. This is a latched condition, which can only by reset by removing and then re-applying the module’s input power. (6) This is the free-running frequency. The module can be made to synchronize with the PTB48500 when both modules are used together in a system. (7) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected and may be connected to +V in. The open-circuit voltage is 5 V max. If it is left open circuit the converter will operate when input power is applied. (8) Electrolytic capacitors with very low equivalent series resistance (ESR) may induce instability when used on the output. Consult the factory before using capacitors with organic, or polymer-aluminum type electrolytes. For technical support and further information visit http://power.ti.com PTB48510B, PTB48511B Typical Characteristics Dual Complementary-Output DC/DC Converter for DSL SLTS219C - FEBRUARY 2004 - REVISED OCTOBER 2004 PTB4851xB Characteristic Data @VIN =48 V Safe Operating Area PTB4851xB (See Notes A) (See Note C) Balanced Load, VIN =48 VDC (See Note B) Efficiency vs Load Current (See Note B) 100 90 80 Ambient Temperature (°C) Efficiency - % 90 80 70 60 Airflow 70 400LFM 200LFM 100LFM Nat conv 60 50 40 30 50 20 0 0.5 1 1.5 2 2.5 3 0 |±IOUT| (Balanced) A 0.5 1 1.5 2 2.5 3 |±Iout| (A) Power Dissipation vs Load Current (See Note B) 12 10 Pd - Watts 8 6 4 2 0 0 0.5 1 1.5 2 2.5 3 |±IOUT| (Balanced Load) A Cross Regulation, ∆|+V O| vs |–IO|, with |+IO| = 1 A Cross Regulation |+Vo| - mV 400 200 0 -200 -400 0 0.5 1 1.5 2 2.5 3 Load Current |–IO| - A Cross Regulation, ∆|–V O| vs |+IO|, with |–I O| = 1 A Cross Regulation |–Vo| - mV 400 200 0 -200 -400 0 0.5 1 1.5 2 2.5 3 Load Current |+IO| - A Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter. Note B: Under a balanced load, current flowing out of +Vo is equal to that flowing into –Vo. Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper. For technical support and further information visit http://power.ti.com PTB48510C Dual Complementary-Output DC/DC Converter for DSL Specifications SLTS219C - FEBRUARY 2004 - REVISED OCTOBER 2004 (Unless otherwise stated, T a =25°C, V in =48 V, C in =0 µF, ±C o =0 µF, |+I o | = |–I o |, and |±Io | =0.5 |±I o |max) PTB48510C Characteristic Symbol Conditions Min Typ Max Units Output Power Output Current Output Load Imbalance Output Voltage Po |±Io | |+Io | – |–Io | |±Vo | 0 0 0 14.5 (2) — — — 15 66 (1) 2.2 (2) 1 (3) 15.5 (2) W A A V Temperature Variation Line Regulation Load Regulation Efficiency Vo Ripple (pk-pk) ∆Regtemp ∆Regline ∆Regload η ±Vr — — — — ±1 ±0.05 ±0.1 90 — ±0.5 ±1 — %Vo %Vo %Vo % — 50 100 Transient Response ttr ∆Vtr Iotrip Total output power from ±Vo Over Vin range, |+Io | – |–Io | ≤ 0.1 A |+Io | ≥0.1 A, |–Io | ≥ 0.1 A Inlcudes set-point, line, |+Io | – |–Io | ≤ 0.1 A –40 ≤Ta ≤+85°C –40 ≤Ta ≤ +85°C, |±Io | =0.1 A ±Vo Over Vin range, balanced load ±Vo Over ±Io range, balanced load ±Vo |±Io| =|±Io (max)| 20 MHz bandwidth, Co =10 µF tantalum capacitor 0.1 A/µs load step, 50% to 75% ±Iomax |±Vo | over/undershoot Vin =36 V reset followed by auto-recovery Continuous over-current trip, |±Io |pk |+Io | = |–Io | Duty |+Vo | and |–Vo | adjust simulataneously Over Vin and Io ranges Vin increasing Vin decreasing Referenced to –Vin (pin 4) — — 30 ±1 — — µs %Vo 2.45 3 3.85 A — — 7.2 440 — — 4.5 10 — 480 (5) 33 32 — — 16.7 520 — — A % V kHz V +3.6 –0.2 — — 6 — 0 — — — 2 12 3 — +75 (6) +0.8 –1 — 18 — 3,000 (7) V 2.8 — — 106 Hrs Over Current Threshold Short Circuit Current Output Voltage Adjust Range Switching Frequency Under-Voltage Lockout |±Vo | adj ƒs Vinon Vinoff On/Off Enable (pin 3) Input High Voltage Input Low Voltage Input Low Current VIH VIL IIL Standby Input Current Start-up Time Internal Input Capacitance External Output Capacitance Reliability Iin standby ton Cin ±Co MTBF pin 3 open circuit |±Io | =1 A, |±Vo | rising 0 to 0.95 |±Vo | typ Capacitance from either output to COM (pin 6) Per Bellcore TR-332 50% stress, Ta =40°C, gnd benign (4) mVpp mA mA ms µF µF Notes: (1) See Safe Operating Area curves or contact the factory for the appropriate derating. (2) Under balanced load conditions, load current flowing out of +V o is balanced to within ±0.1 A of that flowing into –V o. (3) A load imbalance is the difference in current flowing from +Vo to –V o . The module can operate with a higher imbalance but with reduced specifications. (4) Output voltage ripple is measured with a 10 µF tantalum capacitor connected from +V o (pin 5) or –V o (pin 8), to COM (pin 6). (5) This is the free-running frequency. The module can be made to synchronize with the PTB48500 when both modules are used together in a system. (6) The On/Off Enable (pin 3) has an internal pull-up and may be controlled with an open-collector (or open-drain) transistor. The input is diode protected and may be connected to +V in. The open-circuit voltage is 5 V max. If it is left open circuit the converter will operate when input power is applied. (7) Electrolytic capacitors with very low equivalent series resistance (ESR) may induce instability when used on the output. Consult the factory before using capacitors with organic, or polymer-aluminum type electrolytes. For technical support and further information visit http://power.ti.com PTB48510C Typical Characteristics Dual Complementary-Output DC/DC Converter for DSL SLTS219C - FEBRUARY 2004 - REVISED OCTOBER 2004 PTB48510C Characteristic Data @VIN =48 V Safe Operating Area PTB48510C (See Notes A) Balanced Load, VIN =48 VDC (See Note B) Efficiency vs Load Current (See Note B) 100 Ambient Temperature (°C) 90 90 Efficiency - % (See Note C) 80 70 60 80 70 Airflow 60 400LFM 200LFM 100LFM Nat conv 50 40 30 20 50 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 |±IOUT| (Balanced) A 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 |±IOUT| (A) Power Dissipation vs Load Current (See Note B) 10 Pd - Watts 8 6 4 2 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 |±IOUT| (Balanced) A Cross Regulation, ∆|+VO| vs |–IO|, with |+IO| = 1 A Cross Regulation |+VO| - mV 300 200 100 0 -100 -200 -300 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 Load Current |-IO| - A Cross Regulation, ∆|–VO| vs |+IO|, with |–IO| = 1 A Cross Regulation |-VO| - mV 300 200 100 0 -100 -200 -300 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 Load Current |+IO| - A Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the converter. Note B: Under a balanced load, current flowing out of +Vo is equal to that flowing into –Vo. Note C: SOA curves represent the conditions at which internal components are at or below the manufacturer’s maximum operating temperatures. Derating limits apply to modules soldered directly to a 4 in. × 4 in. double-sided PCB with 1 oz. copper. For technical support and further information visit http://power.ti.com Application Notes PTB48510 & PTB48511 Adjusting the Output Voltages of the PTB4851x Series of DC/DC Converters The PTB48510 & PTB48511 DC/DC converters produce a balanced pair of complimentary output voltages. They are identified +VOUT and -VOUT, respectively. The magnitude of both output voltages can be adjusted together as a pair, higher or lower, by up to ±10% of their nominal. The adjustment method uses a single external resistor. 1 The value of the resistor determines the adjustment magnitude, and its placement determines whether the magnitude is increased or decreased. The resistor values can be calculated using the appropriate formula (see below). The formula constants are given in Table 1-1. The placement of each resistor is as follows. Adjust Up: 3 To increase the magnitude of both output voltages, place a resistor R1 between ±Vo1 Adj (pin 7) and the -VOUT (pin 8) voltage rail; see Figure 1-1(a). Figure 1-1a PTB48510 +VOUT Calculation of Resistor Adjust Values The value of the adjust resistor is calculated using one of the following equations. Use the equation for R1 to adjust up, or (R2) to adjust down. R1 [Adjust Up] = Vr Ro 2 (Va – Vo ) – Rs kΩ (R2) [Adjust Down] = Ro (2 Va – Vr ) 2 (Vo – Va ) – Rs kΩ Where: Vo Va Vr Ro Rs = = = = = Magitude of the original ±VOUT Magnitude of the adjusted voltage The reference voltage from Table 1-1 The resistance value in Table 1-1 The series resistance from Table 1-1 +V OUT 5 Table 1-1 ADJUSTMENT RANGE AND FORMULA PARAMETERS ±Vo Adj COM 7 Series Pt. No. 6 Vo(nom) Va(min) Va(max) Vr Ro (kΩ) Ω) Rs (kΩ R1 Adjust Up –VOUT –V OUT 8 Adjust Down: To decrease the magnitude of both output voltages, add a resistor (R2), between Vo Adj (pin 7) and the +VOUT (pin 5) voltage rail; see Figure 1-1(b). PTB4851xA PTB4851xB PTB48510C 5V 3.5 V 5.5 V 2.495 V 7.5 9.09 12 V 6.5 V 13.4 V 2.495 V 18.2 16.9 15 V 7.2 V 16.7 V 2.495 V 22.1 16.9 Notes: 1. A 0.05 W rated resistor may be used. The tolerance should be 1%, with a temperature stability of 100 ppm/°C or better. Place the resistor in either the R1 or (R 2) location, as close to the converter as possible. 2. Never connect capacitors to the ±Vo Adj pin. Capacitance added to this pin can affect the stability of the regulated output. Figure 1-1b PTB48510 +VOUT +V OUT 5 (R2) Adj Down ±Vo Adj COM –VOUT 7 6 8 For technical support and further information visit http://power.ti.com –V OUT 3. The over-voltage protection (PTB48511x) is nominally set to 25% above the original output voltage set-point. Increasing the magnitude of the output voltages reduces the margin between the output voltage and the overvoltage (OV) protection threshold. This could make the module more sensitive to OV faults, as a result of random noise and load transients. Note: An OV fault is a latched condition that shuts down the converter’s outputs. The fault can only be cleared by cycling the Enable pin, or by momentarily removing input power to the module. Application Notes PTB4850x & PTB4851x Configuring the PTB4850x & PTB4851x DC/DC Converters for DSL Applications Power-Up Sequencing The desired power-up sequence for the AC7 supply voltages requires that the two logic-level voltages from the PTB4850x converter rise to regulation prior to the two complementary voltages that power the transceiver ICs. This sequence cannot be guaranteed if the PTB4850x and PTB4851x are allowed to power up independently, especially if the 48-V input voltage rises relatively slowly. To ensure the desired power-up sequence, the “EN Out” pin of the PTB4850x is directly connected to the activelow “Enable” input of the PTB4851x (see Figure 2-1). This allows the PTB4850x to momentarily hold off the outputs from the PTB4851x until the logic-level voltages have risen first. Figure 2-2 shows the power-up waveforms of all four supply voltages from the schematic of Figure 2-1. When operated as a pair, the PTB4850x and PTB4851x converters are specifically designed to provide all the required supply voltages for powering xDSL chipsets. The PTB4850x produces two logic voltages. They include a 3.3-V source for logic and I/O, and a low-voltage for powering a digital signal processor core. The PTB4851x produces a balanced pair of complementary supply voltages that is required for the xDSL transceiver ICs. When used together in these types of applications, the PTB4850x and PTB4851x may be configured for power-up sequencing, and also synchronized to a common switch conversion frequency. Figure 2-1 shows the required cross-connects between the two converters to enable these two features. Figure 2-2; Power-Up Sequencing Waveforms Switching Frequency Synchronization Unsynchronized, the difference in switch frequency introduces a beat frequency into the input and output AC ripple components from the converters. The beat frequency can vary considerably with any slight variation in either converter’s switch frequency. This results in a variable and undefined frequency spectrum for the ripple waveforms, which would normally require separate filters at the input of each converter. When the switch frequency of the converters are synchronized, the ripple components are constrained to the fundamental and higher. This simplifies the design of the output filters, and allows a common filter to be specified for the treatment of input ripple. VCCIO (1 V/Div) VCORE (1 V/Div) +VTCVR (5 V/Div) –VTCVR (5 V/Div) HORIZ SCALE: 10 ms/Div Figure 2-1; Example of PTB4850x & PTB4851x Modules Configured for DSL Applications 9 –48 V RTN 1 + Input Filter –48 V – Vo2 Adj +Vin Vo1 PTB48500A 3 5 Vo2 Enable POR –Vin COM 10 6 VCCIO VCORE 8 7 POR EN Out Sync Out 4 2 2 1 Sync In 7 ±Vo Adj +Vin +Vo PTB48510A 3 4 COM 5 +VTCVR 6 Enable –Vin –Vo 8 –VTCVR For technical support and further information visit http://power.ti.com IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. All products are sold subject to TI’s terms and conditions of sale supplied at the time of order acknowledgment. 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