SCES430A − MARCH 2003 − REVISED MARCH 2003 D Optimized for 1.8-V Operation and is 3.6-V D 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 1OE VCC 1 20 19 2OE 18 1Y1 2 3 17 2A4 16 1Y2 4 5 15 2A3 14 1Y3 6 7 13 2A2 12 1Y4 8 9 10 11 2A1 D D D D D I/O Tolerant to Support Mixed-Mode Signal Operation Ioff Supports Partial-Power-Down Mode Operation Sub 1-V Operable Max tpd of 1.7 ns at 1.8 V Low Power Consumption, 20-µA Max ICC ±8-mA Output Drive at 1.8 V Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 − 2000-V Human-Body Model (A114-A) − 200-V Machine Model (A115-A) − 1000-V Charged-Device Model (C101) GND D RGY PACKAGE (TOP VIEW) description/ordering information This octal buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation. The SN74AUC240 is designed specifically to improve the performance and density of 3-state memory address drivers, clock drivers, and bus-oriented receivers and transmitters. This device is organized as two 4-bit buffers/drivers with separate output-enable (OE) inputs. When OE is low, the device passes data from the A inputs to the Y outputs. When OE is high, the outputs are in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION TA PACKAGE† ORDERABLE PART NUMBER TOP-SIDE MARKING −40°C to 85°C QFN − RGY Tape and reel SN74AUC240RGYR MS240 † Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at www.ti.com/sc/package. Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. Copyright 2003, Texas Instruments Incorporated !" # $%&" !# '%()$!" *!"&+ *%$"# $ " #'&$$!"# '& ",& "&# &-!# #"%&"# #"!*!* .!!"/+ *%$" '$&##0 *&# " &$&##!)/ $)%*& "&#"0 !)) '!!&"&#+ POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 1 SCES430A − MARCH 2003 − REVISED MARCH 2003 FUNCTION TABLE (each 4-bit buffer/driver) INPUTS OE A OUTPUT Y L H L L L H H X Z logic diagram (positive logic) 1OE 1A1 1A2 1A3 1A4 1 2OE 2 18 4 16 6 14 8 12 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 19 11 9 13 7 15 5 17 3 2Y1 2Y2 2Y3 2Y4 absolute maximum ratings over operating free-air temperature range (unless otherwise noted)† Supply voltage range, VCC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V Input voltage range, VI (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V Voltage range applied to any output in the high-impedance or power-off state, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to 3.6 V Output voltage range, VO (see Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.5 V to VCC + 0.5 V Input clamp current, IIK (VI < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Output clamp current, IOK (VO < 0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −50 mA Continuous output current, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±20 mA Continuous current through VCC or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±100 mA Package thermal impedance, θJA (see Note 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37°C/W Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −65°C to 150°C † Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. NOTES: 1. The input negative-voltage and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. The package thermal impedance is calculated in accordance with JESD 51-5. 2 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 SCES430A − MARCH 2003 − REVISED MARCH 2003 recommended operating conditions (see Note 3) VCC VIH Supply voltage High-level input voltage VCC = 0.8 V VCC = 1.1 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 0.8 V VIL Low-level input voltage VI Input voltage VO Output voltage High-level output current ∆t/∆v Low-level output current 0.8 2.7 VCC 0.65 × VCC UNIT V V 1.7 0 0.35 × VCC V 0.7 0 3.6 V Active state 0 3-state 0 VCC 3.6 V VCC = 1.4 V VCC = 1.65 V VCC = 2.3 V VCC = 0.8 V IOL MAX VCC = 1.1 V to 1.95 V VCC = 2.3 V to 2.7 V VCC = 0.8 V VCC = 1.1 V IOH MIN −0.7 −3 −5 −9 0.7 VCC = 1.1 V VCC = 1.4 V 3 VCC = 1.65 V VCC = 2.3 V 8 Input transition rise or fall rate mA −8 5 mA 9 20 ns/V TA Operating free-air temperature −40 85 °C NOTE 3: All unused inputs of the device must be held at VCC or GND to ensure proper device operation. Refer to the TI application report, Implications of Slow or Floating CMOS Inputs, literature number SCBA004. POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 3 SCES430A − MARCH 2003 − REVISED MARCH 2003 electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS IOH = −100 µA IOH = −0.7 mA VOH VOL II Ioff A and OE inputs TYP† VCC MIN 0.8 V to 2.7 V VCC−0.1 0.8 V MAX UNIT 0.55 IOH = −3 mA IOH = −5 mA 1.1 V 0.8 1.4 V 1 IOH = −8 mA IOH = −9 mA 1.65 V 1.2 2.3 V 1.8 IOL = 100 µA IOL = 0.7 mA 0.8 V to 2.7 V V 0.2 0.8 V 0.25 IOL = 3 mA IOL = 5 mA 1.1 V 0.3 1.4 V 0.4 IOL = 8 mA IOL = 9 mA 1.65 V 0.45 2.3 V 0.6 0 to 2.7 V ±5 µA ±10 µA ±10 µA 20 µA VI = VCC or GND VI or VO = 2.7 V IOZ ICC VO = VCC or GND VI = VCC or GND, Ci VI = VCC or GND 0 2.7 V IO = 0 0.8 V to 2.7 V Co VO = VCC or GND † All typical values are at TA = 25°C. V 2.5 V 2.5 3 pF 2.5 V 5.5 6 pF switching characteristics over recommended operating free-air temperature range, CL = 15 pF (unless otherwise noted) (see Figure 1) VCC = 1.2 V ± 0.1 V VCC = 1.5 V ± 0.1 V VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V FROM (INPUT) TO (OUTPUT) VCC = 0.8 V TYP MIN MAX MIN MAX MIN TYP MAX MIN MAX tpd A Y 4.8 1.2 3.3 0.8 2 0.7 1.1 1.7 0.6 1.3 ns ten OE Y 6.4 1.4 4 0.9 2.6 0.8 1.2 2.1 0.7 1.5 ns tdis OE Y 8.7 2 5.8 1.8 3.9 1.8 2.5 4 0.3 3 ns PARAMETER UNIT switching characteristics over recommended operating free-air temperature range, CL = 30 pF (unless otherwise noted) (see Figure 1) FROM (INPUT) TO (OUTPUT) tpd A ten OE tdis OE PARAMETER 4 POST OFFICE BOX 655303 VCC = 1.8 V ± 0.15 V VCC = 2.5 V ± 0.2 V UNIT MIN TYP MAX MIN MAX Y 1 1.4 2.1 0.9 1.6 ns Y 1.1 1.7 2.7 1 2 ns Y 1.9 2.5 4 1 2 ns • DALLAS, TEXAS 75265 SCES430A − MARCH 2003 − REVISED MARCH 2003 operating characteristics, TA = 25°C PARAMETER Cpd Power dissipation capacitance TEST CONDITIONS Outputs enabled Outputs disabled VCC = 0.8 V TYP VCC = 1.2 V TYP VCC = 1.5 V TYP VCC = 1.8 V TYP VCC = 2.5 V TYP 21 21 21 22 25 3 3 3 3 5 f = 10 MHz UNIT pF POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 5 SCES430A − MARCH 2003 − REVISED MARCH 2003 PARAMETER MEASUREMENT INFORMATION 2 × VCC S1 RL From Output Under Test Open GND CL (see Note A) RL VCC 0.8 V 1.2 V ± 0.1 V 1.5 V ± 0.1 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V 1.8 V ± 0.15 V 2.5 V ± 0.2 V LOAD CIRCUIT TEST S1 tPLH/tPHL tPLZ/tPZL tPHZ/tPZH Open 2 × VCC GND CL RL 15 pF 15 pF 15 pF 15 pF 15 pF 30 pF 30 pF 2 kΩ 2 kΩ 2 kΩ 2 kΩ 2 kΩ 1 kΩ 500 Ω V∆ 0.1 V 0.1 V 0.1 V 0.15 V 0.15 V 0.15 V 0.15 V VCC Timing Input VCC/2 0V tw tsu VCC VCC/2 Input VCC/2 th VCC VCC/2 Data Input VCC/2 0V 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS SETUP AND HOLD TIMES VCC VCC/2 Input VCC/2 0V tPHL tPLH VOH VCC/2 Output VCC/2 VOL VCC/2 VCC/2 VCC/2 VOL VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES INVERTING AND NONINVERTING OUTPUTS VCC/2 0V tPLZ tPZL VCC VCC/2 Output Waveform 2 S1 at GND (see Note B) VOL + V∆ VOL tPHZ tPZH VOH Output Output Waveform 1 S1 at 2 × VCC (see Note B) tPLH tPHL VCC Output Control VCC/2 VOH − V∆ VOH ≈0 V VOLTAGE WAVEFORMS ENABLE AND DISABLE TIMES LOW- AND HIGH-LEVEL ENABLING NOTES: A. CL includes probe and jig capacitance. B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control. Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control. C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, slew rate ≥ 1 V/ns. D. The outputs are measured one at a time with one transition per measurement. E. tPLZ and tPHZ are the same as tdis. F. tPZL and tPZH are the same as ten. G. tPLH and tPHL are the same as tpd. H. All parameters and waveforms are not applicable to all devices. Figure 1. Load Circuit and Voltage Waveforms 6 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 PACKAGE OPTION ADDENDUM www.ti.com 6-Dec-2005 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Drawing Pins Package Eco Plan (2) Qty SN74AUC240RGYR ACTIVE QFN RGY 20 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR SN74AUC240RGYRG4 ACTIVE QFN RGY 20 1000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1YEAR Lead/Ball Finish MSL Peak Temp (3) (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS) or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. 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Addendum-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 19-May-2007 TAPE AND REEL INFORMATION Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com Device SN74AUC240RGYR 19-May-2007 Package Pins RGY 20 Site Reel Diameter (mm) Reel Width (mm) A0 (mm) B0 (mm) K0 (mm) P1 (mm) MLA 180 12 3.8 4.8 1.6 8 TAPE AND REEL BOX INFORMATION Device Package Pins Site Length (mm) Width (mm) Height (mm) SN74AUC240RGYR RGY 20 MLA 190.0 212.7 31.75 Pack Materials-Page 2 W Pin1 (mm) Quadrant 12 Q1 IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, modifications, enhancements, improvements, and other changes to its products and services at any time and to discontinue any product or service without notice. Customers should obtain the latest relevant information before placing orders and should verify that such information is current and complete. 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