RF3322 Preliminary 3 CABLE REVERSE PATH PROGRAMMABLE GAIN AMPLIFIER Typical Applications • Euro-DOCSIS/DOCSIS Cable Modems • Home Networks • CATV Set-Top Boxes • Automotive/Mobile Multimedia • Telephony Over Cable • Coaxial and Twisted Pair Line Driver Product Description 0.157 0.150 The RF3322 is a variable gain amplifier for use in CATV reverse path (upstream) applications. It is DOCSIS-compliant for use in cable modems. The gain control covers a 58dB range and is serially programmable via three-wire digital bus for compatibility with standard baseband chipsets. Amplifier shutdown and transmit disable modes are software- and hardware-controlled. The device is placed into sleep mode via the serial control bus. The device operates over the frequency band of 5MHz to 65MHz for use in current U.S. and European systems. The amplifier delivers up to 60dBmV at the output of the balun. Gain is controllable in accurate 1dB steps. The device is provided in an industry-standard QSOP-20 package. üSi Bi-CMOS GaAs HBT GaAs MESFET SiGe HBT Si CMOS 0.0098 0.0040 0.0098 0.0040 0.340 0.333 0.025 0.0688 0.0532 0.244 0.228 Dimensions in inches. 8° MAX 0° MIN 0.050 0.016 0.010 0.006 NOTES: 1. Shaded lead is Pin 1. 2. All dimensions are excluding mold flash and protrusions. 3. Lead coplanarity: 0 to 0.004 max. 4. Deviation from package center and leadframe center: 0.004 max. 5. Misalignment from top and bottom package centers: 0.004 max. 6. End flash not to exceed 0.006 per side. Optimum Technology Matching® Applied Si BJT Package Style: QSOP-20 Features • Single 5V Supply GND 1 20 GND2 2 19 VCC2 • Differential Input and Output GND 3 18 TXEN • -30dB to +28dB Voltage Gain Range 17 NC • 5MHz to 65MHz Operation 16 VOUT+ • Sophisticated Power Management • DOCSIS 1.1 RF Compliant VCC1 GND1 4 Power Control VIN+ 5 VIN- 6 15 VOUT- GND 7 14 RAMP CS 8 13 NC SDA 9 SCLK 10 Gain Control and Serial Bus Ordering Information 12 SHDN 11 GND Functional Block Diagram Rev A2 010518 LINEAR CATV AMPLIFIERS 3 RF3322 RF3322 PCBA Cable Reverse Path Programmable Gain Amplifier Fully Assembled Evaluation Board RF Micro Devices, Inc. 7625 Thorndike Road Greensboro, NC 27409, USA Tel (336) 664 1233 Fax (336) 664 0454 http://www.rfmd.com 3-27 RF3322 Preliminary Absolute Maximum Ratings Parameter Supply Voltage (VCC1 and VCC2) Input RF Level Operating Ambient Temperature Storage Temperature Humidity Maximum Power Dissipation Maximum TJ Rating Unit -0.5 to +6.0 12 -40 to +85 -40 to +150 80 0.5 150 VDC dBm °C °C % W °C Caution! ESD sensitive device. RF Micro Devices believes the furnished information is correct and accurate at the time of this printing. However, RF Micro Devices reserves the right to make changes to its products without notice. RF Micro Devices does not assume responsibility for the use of the described product(s). LINEAR CATV AMPLIFIERS 3 Parameter Specification Min. Typ. Max. Unit Overall Condition VCC =4.75V to 5.25V, TXEN=SHDN =1, VIN =30dBmV (rms) differential, output impedance=75Ω through a 2:1 transformer. Typical performance is at TA =+25°C, VCC =5V. DC Specifications Supply Voltage Supply Current Maximum Gain Low Gain Transmit Disable Software-Shutdown Sleep Logic High Voltage Logic Low Voltage Logic Leakage Current 4.75 5.0 5.25 V 130 65 25 3 0.05 160 105 35 5 mA mA mA mA mA V V µA Gain Control Word=58 Gain Control Word<35 TXEN=0 Bit 7 of gain control word FALSE SHDN=0 dB dB dB dB MHz 5MHz to 42MHz; Gain Control Word=58 42MHz to 65MHz; Gain Control Word=58 5MHz to 42MHz; Gain Control Word=0 42MHz to 65MHz; Gain Control Word=0 Intended operating range is 5MHz to 65MHz. 2 0.8 1 -1 AC Specifications Voltage Gain Maximum Minimum 27 26 28 -30 3dB Bandwidth 100 1dB Compression Point Maximum Input Level Maximum Output Level 66 ACPR Output IM3 Output Third Harmonic Distortion F=20MHz, VOUT =59dBmV F=65MHz, VOUT =59dBmV Output Second Harmonic Distortion F=20MHz, VOUT =59dBmV F=65MHz, VOUT =59dBmV 3-28 -26 -28 34 60 dBmV dBmV(rms) dBmV(rms) -59 -47 dBc -58 -55 dBc -60 -55 -55 -50 dBc dBc Maximum Gain, CW Maximum Gain, CW -70 -70 -60 -60 dBc dBc Maximum Gain Maximum Gain Modulated. To meet distortion specifications. Modulated. Into 75Ω load at balun output, all distortion tones <-50dBc. VIN =34dBmV (rms); QPSK modulation; Symbol rate=160ksps (2 bits per symbol); 20-bit PRBS (pseudo-random bit stream); 0.25 alpha root cosine filter Tones at 40MHz and 40.2MHz, VOUT =+54dBmV/tone, maximum gain, OIP3 is therefore +84dBmV, IIP3 is 58dBmV. Rev A2 010518 RF3322 Preliminary Parameter Specification Min. Typ. Max. Unit Condition AC Specifications, cont’d 0.8 -80 1.0 -95 1.1 -37 -30 Minimum Gain -55 -50 Transmit Disabled -75 -70 TX EN Enable Time 0.5 1.0 dBmV/ 160kHz dBmV/ 160kHz dBmV/ 160kHz µS 3.0 5 3 300 10 5 345 µS mVP-P mVP-P Ω TX EN Transient Duration Output Switching Transients 2.4 Output Impedance 255 Input Impedance dB dBc 75 Ω 28 °C/W Maximum Gain, 20MHz -96dBc for a 59dBmV carrier in a 160kHz bandwidth. -64dBc for an 8dBmV carrier in a 160kHz bandwidth. TXEN =0 Time for gain to reach 99% of final value. See Note 1. See Note 1. Maximum Gain Minimum Gain Chip output impedance is nominally 300Ω. Differential to single-ended output conversion to 75Ω is performed in a balun with a 2:1 turns ratio, corresponding to a 4:1 impedance ratio. Differential Thermal ThetaJC Note 1: The enable time is determined by the value of the capacitor on pin 14 (RAMP). A higher capacitor value will increase the enable time, but will reduce the transient voltage. Rev A2 010518 3-29 3 LINEAR CATV AMPLIFIERS Output Step Size Isolation in Transmit Disable Mode Output Noise Maximum Gain RF3322 Pin 1 2 Function GND VCC1 3 4 5 6 GND GND1 V IN+ V IN- 7 8 9 10 11 12 GND CS SDA SCLK GND SHDN 13 14 NC RAMP 15 16 17 18 V OUTV OUT+ NC TXEN 19 VCC2 20 GND2 LINEAR CATV AMPLIFIERS 3 Preliminary Description Interface Schematic Connect to ground. This pin is connected to the supply voltage, and should be decoupled as close to GND1 as possible. Connect to ground. PGA RF ground. Input pin. This should be externally AC-coupled to signal source. Complementary input pin. This should be externally coupled to signal source. For single-ended use, this pin should be AC-coupled to ground through an impedance equivalent to the impedance driving V IN+. Connect to ground. Serial bus enable. Serial bus data input. Serial bus clock input. Connect to ground. Ship shutdown pin. Forcing a logic low causes all circuits to switch off and gain settings to be lost. Not connected. Turn-on time is controlled by an external capacitor between this pin and ground. Open collector output. Connect to VCC via balun primary. Open collector output. Connect to VCC via balun primary. Not connected. Signal path enable pin. Logic high turns on signal path. Logic low turns off signal path, but leaves serial bus active. This pin is connected to the supply voltage, and should be decoupled as close to GND2 as possible. Power amplifier bias ground. Serial Bus Block Diagram D0 D Q D1 D Q D2 D Q D3 D Q D4 D Q D5 D Q D6 D Q CK CLR CK CLR CK CLR CK CLR CK CLR CK CLR CK CLR D D D D D D D D7 D Q CK CLR CS POR SDA D Q CK CLR Q CK CLR Q CK CLR Q CK CLR Q CK CLR Q CK CLR Q CK CLR Q CK CLR SCLK 3-30 Rev A2 010518 RF3322 Preliminary Table 1. Serial Interface Control Word Format Bit Mnemonic Description MSB 7 6 5 4 3 2 1 LSB 0 D7 D6 D5 D4 D3 D2 D1 D0 Sleep Mode (Software Shutdown) Test Bit Gain Control, Bit 5 Gain Control, Bit 4 Gain Control, Bit 3 Gain Control, Bit 2 Gain Control, Bit 1 Gain Control, Bit LSB 3 TES TDATAH,TDATAL TDS TWH TDH LINEAR CATV AMPLIFIERS Serial Bus Timing Diagram TEH TC D7 D6 D5 D4 D3 D2 D1 D0 Table 2. Timing Data Parameter SCLK Pulsewidth SCLK Period Setup Time, SDA versus S CLK Setup Time, CS versus S CLK Hold Time, SDA versus S CLK Hold Time, CS versus S CLK SCLK Pulsewidth, High SCLK Pulsewidth, Low Symbol Min TWH TC TDS TES TDH TEH TDATAH TDATAL 50 100 10 10 20 20 50 50 Typ Max Units ns ns ns ns ns ns ns ns Table 3. Programming State Enter Sleep Mode Exit Sleep Mode Enter Shutdown Exit Shutdown TX Enable TX Disable Rev A2 010518 TX SHDND MSB6 X X X X H L H H L H X X L H* X H* X X H=High Voltage Logic L=Low Voltage Logic X=Don’t Care *Gain Control Data Must be Re-Sent 3-31 RF3322 Preliminary Typical Application Schematic VCC1 1 20 2 19 3 18 4 3 Power Control VCC2 SHDNB 17 10 nF VIN+ 5 16 6 15 7 14 CS 8 13 SDA 9 SCLK 10 4:1 VOUT 10 nF LINEAR CATV AMPLIFIERS VIN- 3-32 Gain Control and Serial Bus 12 100 pF 220 pF TXEN 11 Rev A2 010518 RF3322 Preliminary Evaluation Board Schematic L2 (Ferrite) 30 Ω CS SDA SCLK J5-1 J3-1 R1 100 kΩ VCC R2 100 kΩ 1 2 NC 3 CS SDA 4 5 SCLK SHDN 6 7 TXEN 8 NC 11 NC NC 14 NC 15 16 VCC NC 17 18 NC 19 20 21 L3 (Ferrite) 30 Ω C2 1 nF VCC1 22 23 24 GND GND 25 GND 1 VCC J3 2 GND 1 J4 J1-6 TXEN 1 2 2 3 3 L5 (Ferrite) 30 Ω C5 0.1 µF 1 20 2 19 3 J2 RF IN VCC GND VCC2 VCC3 T1 1:1 R4 75 Ω C3 1 nF 4 6 15 7 14 CS 8 13 SDA 9 SCLK 10 C4 1 nF Notes: 1. 4-layer board. 2nd layer is ground plane. 2. Place C5 and C6 as close to pin as possible. 3. C1 is tantalum, size code Y. 4. All other components are 0603 size. 5. Replace R6 with 0 Ω resistor if 75 Ω connector is used. 3 Gain Control and Serial Bus C10 15 pF T2 4:1 R6 24 Ω J7 RF OUT C11 15 pF C7 220 pF C9 100 pF 12 J6 J5 11 3322410- VCC3 17 16 R5 75 Ω C6 0.1 µF 18 Power Control 5 GND GND GND C1 10 µF (10 V) L4 (Ferrite) 30 Ω VCC1 GND GND + VCC2 VCC 12 13 JP1 VCC NC NC 9 10 L1 (Ferrite) 30 Ω 1 J1-5 SHDN 1 2 2 3 3 VCC GND PCB Layout Considerations The RF3322 evaluation board can be used as a guide for the layout in your application. Care should be taken in laying out the RF3322 in other applications. The RF3322 will have similar results if the following guidelines are taken into consideration: • Make sure underside of package is soldered to a good ground on the PCB. • Move C2, C9, C10, and C11 as close to T1 as possible. • Keep input and output traces as short as possible. • Ensure a good ground plane by using multiple vias to the ground plane. Use a low noise power supply along with decoupling capacitors. Rev A2 010518 3-33 LINEAR CATV AMPLIFIERS J1 RF3322 Preliminary Evaluation Board Layout Board Size 2.5” x 2.5” Board Thickness 0.058”, Board Material FR-4, Multi-Layer LINEAR CATV AMPLIFIERS 3 3-34 Rev A2 010518 RF3322 Preliminary Gain versus Frequency Gain versus Gain Control Word 30.0 28.0 20.0 18.0 Gain Control Word = 29 10.0 Voltage Gain (dB) Gain Control Word = 0 0.0 -10.0 8.0 -2.0 3 -12.0 -20.0 LINEAR CATV AMPLIFIERS Voltage Gain (dB) Gain Control Word = 58 -22.0 -30.0 -32.0 0 50 100 150 200 250 0 10 20 Frequency (MHz) 30 40 50 60 Gain Control Word Current versus Gain Control Word Second Harmonic versus Frequency 0 65 MHz 135 42 MHz -10 5 MHz -20 Second Harmonic (dBc) Current (mA) 125 115 105 -30 -40 -50 -60 95 -70 85 -80 0 10 20 30 40 50 60 Gain Control Word 30 35 40 45 50 55 60 Frequency (MHz) Third Harmonic versus Frequency 0 65 MHz 42 MHz -10 5 MHz Third Harmonic (dBc) -20 -30 -40 -50 -60 -70 -80 30 35 40 45 50 55 60 Frequency (MHz) Rev A2 010518 3-35 RF3322 Preliminary Evaluation Kit LINEAR CATV AMPLIFIERS 3 General Description The RF3322 PCBA is a fully assembled evaluation board of the RF3322 reverse path high output power programmable gain amplifier, useful for providing a demonstration of the RF3322’s functionality. The RF3322 PCBA is a digitally controlled variable gain amplifier capable of driving a 75Ω source. The RF3322 is designed to send cable modem data with QPSK or QAM modulated format at frequencies between 5MHz and 65MHz. The gain is controlled by an 7-bit serial data word which adjusts the output gain from -30dB to +28dB. The kit includes a fully functional evaluation board along with a serial data cable and software. The cable connects directly to the parallel port of a standard PC. The software is used to control the serially programmable gain through a simple, easy to understand user interface. Input and output to the evaluation board is provided through 50Ω SMA connectors. The input and output of the evaluation board is matched to 50Ω and connected through a balun for single-ended operation. This allows easy connection to test equipment, but the evaluation board can easily be converted to a 75Ω input and output, or for differential input and output. The output circuit is matched using a 24Ω series resistor which is used to bring the load impedance up to 75Ω when using standard 50Ω test equipment. This will introduce a loss which must be accounted for in all measurements (see measurement section and evaluation board schematic for more detail.) PCBA Details Input Circuit The input to the RF3322 is differential and the impedance is 75Ω; However, for ease of testing, the evaluation board has been changed to single-ended and the impedance has been matched to 50Ω. If a 75Ω input is required, simply replace the 50Ω SMA connector with a 75Ω F-style connector and remove R4 and R5. device to 75Ω. This introduces a voltage loss of 3.5dB which must be accounted for in all measurements. Some spectrum analyzers have a setting to account for this method of 75Ω testing (e.g., on a Rhode & Schwartz spectrum analyzer the input can be set to '”75Ω RAZ” and the loss is accounted for automatically). A more accurate way of making this measurement is to use a 75Ω spectrum analyzer, or use a matching transformer or minimum loss pad. This ensures that the source impedance seen by the equipment is also 75Ω. If a 75Ω output is required, simply replace the 50Ω SMA connector (J7) with a 75Ω Fstyle connector and replace R5 with a 0Ω jumper. The evaluation board is tested with a Coilcraft balun; however, additional baluns may be used as long as care is taken in modifying the decoupling capacitors around the balun. These capacitors can greatly affect the harmonic suppression. Other baluns may be used but should be tested for second and third order harmonic suppression. Transmit Enable The transmit enable can be set to “continuous on” by placing the TXEN jumper in the right-hand position (right-hand position when viewing the top of the evaluation board with the 25-pin connector closest to the viewer) and placing the associated GND/VCC jumper in the “VCC” position. The transmit enable can be set to “continuous off” by placing the GND/VCC jumper in the “GND” position. If a computer controlled signal is used (J1), place the TXEN jumper in the left-hand position. TX EN VCC TX EN GND GND Continuous ON A VCC Continuous OFF B TX EN VCC GND Software Controlled C Figure 1. TX Enable Configuration Output Circuit The output of the RF3322 is differential and the impedance is 300Ω. In normal applications this is converted into a single-ended 75Ω output using a 2:1 (voltage ratio) transformer with a center-tap on the secondary which supplies power to the output stage. The evaluation board is configured for use with 50Ω test equipment. This has been achieved with a 24Ω resistor in series with the output to increase the load seen by the 3-36 Rev A2 010518 RF3322 Shutdown Enable Shutdown enable can be set to be “continuous on” (chip enabled) by placing the SHDN jumper in the right-hand position and placing the associated GND/ VCC jumper in the “VCC” position. Shutdown enable can be set to “continuous off” (chip disabled) by placing the associated GND/VCC jumper in the “GND” position. If a computer controlled signal is used (J1), place the SHDN jumper in the left-hand position. SHDN GND SHDN VCC Continuous ON A GND VCC Continuous OFF B SHDN GND VCC Software Controlled C Figure 2. SHDN Enable Configuration VCC Settings VCC1 should be set to 5.0VDC. Evaluation Board Setup Equipment Needed • Signal Generator • Spectrum Analyzer • Power Supply (5.0V@300mA) • RF3322 PCBA • Serial Cable (included with kit) • Standard PC • Three-Wire Bus Software Optional Equipment • Variable Low-Pass or Band-Pass Filters • Power Meter • Second Signal Generator with Modulation for ACPR and IP2, IP3 Testing • Arbitrary Wave Generator • Two-Channel Oscilloscope Unzip the file using WinZip 7.0 or higher (http:// www.winzip.com). Unzip to a temporary directory and run RF3322.exe. The 7-bit Gain Control Word (GCW) in the data latch determines the gain setting in the RF3322. The gain control data (SDA) load sequence is initiated by a falling edge on CS. The SDA is serially loaded (MSB first) into the 7-bit shift register at each rising edge of the clock. While CS is low, the data latch holds the previous data word allowing the gain level to remain unchanged. After seven clock cycles the new data word is fully loaded and CS is switched high. This enables the data latch and the loaded register data is passed to the gain control block with the updated gain value. Also at this CS transition, the internal clock is disabled, thus inhibiting new serial input data. Software and Cable Figure 3 shows the cable configuration. Connect the cable into the LPT1 port of the computer running the software. Connect the other end of the cable to the 25pin connector of the evaluation board. Executing the software (RF3322.exe) will produce the screen shown in Figure 4. The user may set the gain of the evaluation board by sliding the gain control switch to the desired gain setting. Pressing the Preset Gain Value buttons automatically sets the gain of the unit to the value shown on the button. The Automatic Gain Adjustment when set to “Cycle” will automatically cycle through all of the gain steps (0-58) in seconds (at the rate set by the user). The user may place the unit in sleep, shutdown and transmit enable/disable modes by checking the corresponding box. The bit pattern being sent to the PCBA is shown at the bottom of the screen. See README_3322.txt file for proper pin/signal mapping for the 25 pin interface. Software Setup To install the software, you need a computer with the following. • 133MHz Pentium processor • 16MB RAM • Hard Drive with 5MB free space • Free 25-pin LPT port • VGA Monitor The software may be downloaded from www.rfmd.com by following these steps. Select the “Product Support” tab; Select “Evaluation Board Information”; Select “RF3322”. Rev A2 010518 3-37 3 LINEAR CATV AMPLIFIERS Preliminary RF3322 Preliminary RF3322 PCBA Cable LINEAR CATV AMPLIFIERS 3 Ground 6 TX Enable Line 5 SHUTDOWN Line 4 CLK Line 3 Data Line 2 CS Line 18 25 Pin D-Connector (Back View) Figure 3. Cable Configuration Hardware Setup Gain and Harmonic Distortion Test Setup To test the gain of the RF3322 PCBA, connect a lowpass or band-pass filter to the output of the signal generator. Use a filter just above the frequency you want to test. The filter is used to attenuate any harmonics output by the signal generator. Connect the signal generator to the power meter and measure the power. Compare with modulation enabled and disabled to make sure the meter was measuring average rather than peak power. No more than 0.2dB difference in power should be observed. An offset on the signal generator may be needed to match the level shown on the power meter. The signal generator should then be connected directly to a spectrum analyzer. Make sure the output of the signal generator is the same as the input read by the spectrum analyzer. Adjust the offset of the spectrum analyzer until the signal out is the same as the signal in on the spectrum analyzer. Turn off the RF and modulation. Check positioning of the jumpers on the board. Refer to the PCBA section of this application note to verify proper positions. Connect the output of the signal generator to J2: RFIN of the PCB. Connect J7: RFOUT to the spectrum analyzer. Ensure that 3-38 Figure 4. On-Screen Display you are accounting correctly for the losses in the 75Ω to 50Ω conversion at the output of the device; there is an output voltage loss of 3.5dB for the evaluation board in its standard configuration (see output stage circuit description). Connect one end of the serial cable into the computer and the other end into J1 of the PCB. Connect +5.0VDC into V+ and ground into GND(JP1). Turn on the DC power and turn on RF from the signal generator. Set the GCW to 58 and make sure TX Enable is checked. The amplified signal should be displayed on the spectrum analyzer. The harmonics can also be viewed with this setup. As you change the GCW from 58 to 0 (in steps of one), there will be a 1dB change in the output of the PCB. ACPR Test Setup To test the ACPR of the RF3322 PCBA set modulation to: • QPSK • 2Bits/Sym • 160ksps • α=0.25 • PRBS-20bit Data Rev A2 010518 RF3322 Set signal generator to: • 45MHz, • -13.0dBm output power, • 0dB offset. will be displayed on the oscilloscope. Measure the amount of time between 90% of the TXEN turn-on to where the output signal reaches 90% of full turn-on. This is defined as the transmit turn-on time. Connect 50MHz coaxial filter to output, then to output cable. To measure the transient pulse, replace the signal generator input with a 50Ω terminator and repeat the steps above. Measure the size of the transient. This can be affected by the CRAMP capacitor (C7), and the output balun and capacitor values around the balun. Larger values of CRAMP will decrease the transient voltage and increase the TX enable time. Zero and calibrate the power meter. Connect signal generator to power meter and set offset on signal generator until power meter reads -13.0dBm. Make sure power meter reads the same (±0.2dBm) with modulation enabled and disabled to verify power meter is measuring average power rather than peak power. Check positioning of the jumpers on the board. Refer to the PCBA section of this application note to verify proper positions. Connect the output of the signal generator to J2: RFIN of the PCB. Connect J7: RFOUT to the power meter. Connect one end of the serial cable into the computer and the other end into P1 of the PCB. Connect +5.0VDC into VCC and ground into GND. Turn on the DC power and turn on RF and modulation from the signal generator. Set the GCW to 58 and make sure TX Enable is checked. Measure and record channel power at RFOUT using the power meter (accounting for 75/50 conversion losses). Connect RFOUT to spectrum analyzer and adjust offset of the spectrum analyzer until the channel power displayed by the spectrum analyzer is equal to the channel power recorded in the previous step (Channel bandwidth= 200kHz). Now use the spectrum analyzer to measure relative ACP (this way the uncertainties in the spectrum analyzer power measurement are immaterial). The ACP is measured in 200kHz channel bandwidths at a 220kHz offset (i.e., from 20kHz to 220kHz outside the channel). As you increase the input power, you will notice a degradation of the ACP upper and lower bands. Datasheet performance is measured at an input level of 34dBmV. PCB Layout Considerations The RF3322 Evaluation board can be used as a guide for the layout in your application. Care should be taken in laying out the RF3322 in other applications. The RF3322 will have similar results if the following guidelines are taken into consideration: • • • • • Make sure underside of package is soldered to a good ground on the PCB. Move C2, C9, C10, and C11 as close to T1 as possible. Keep input and output traces as short as possible. Ensure a good ground plane by using multiple vias to the ground plane. Use a low noise power supply along with decoupling capacitors. Transmit Turn-On and Turn-Off Transients Use an Arbitrary Waveform Generator set to a 3V square wave, 5% duty cycle, 120Hz as the input to the transmit enable. Set a signal generator to 10MHz, -13.0dbm output power, 0dB offset. Connect output of the signal generator to J2, RFIN of the PCB. Remove the TXEN jumper and connect the arbitrary wave generator square wave output to the center pin of the TXEN 3-pin header. Connect the output of the evaluation board to the oscilloscope (channel 1). Connect the TXEN signal from the arbitrary wave generator to channel 2 of the oscilloscope and trigger off of the rising edge. As the TXEN line is sent, the oscilloscope will trigger and capture the pulsed RFOUT signal. This Rev A2 010518 3-39 3 LINEAR CATV AMPLIFIERS Preliminary RF3322 Preliminary Special Handling Information for Shrunk Small Outline Package (SSOP1-EPP) Products These packages are considered JEDEC Level 5 for moisture sensitivity and require special handling to assure reliable performance. LINEAR CATV AMPLIFIERS 3 The exposed copper slug on the bottom of the package improves both thermal and electrical performance. Since the RFIC is mounted directly on the thermal slug, and the slug is soldered directly on the PCB, the thermal resistance to the PCB is minimized. Also, the RF ground for the amplifier is established through this copper slug as it is soldered to the ground plane on the PCB. This offers the least inductance ground path available. Care must be taken when soldering these packages to the PCB. They are currently considered JEDEC Level 5 for moisture sensitivity. Therefore the parts must be handled in a dry environment prior to soldering, as is specified in the JEDEC specification. Specifically, RFMD recommends the following procedure prior to assembly: 1. Dry-bake the parts at 125°C for 24 hours minimum. Note: the shipping tubes cannot withstand 125°C baking temperature. 2. Parts delivered on tape and reel are already drybaked and dry-packed. These may be stored for up to one year, but must be assembled within 48 hours after opening the bag. 3. Assemble the dry-baked parts within two days of removal from the oven. 4. During this two-day period, the parts must be stored in humidity less than 60%. IMPORTANT! If the two-day period is exceeded, then this procedure must be repeated prior to assembly. 3-40 Rev A2 010518