TI UCC383-ADJ

UCC283-3/-5/-ADJ
UCC383-3/-5/-ADJ
Low Dropout 3 Ampere Linear Regulator Family
FEATURES
DESCRIPTION
• Precision Positive Series Pass The UCC283-3/-5/-ADJ family of positive linear series pass regulators are tailored
Voltage Regulation
for low drop out applications where low quiescent power is important. Fabricated
with a BiCMOS technology ideally suited for low input to output differential applica• 0.45V Dropout at 3A
tions, the UCC283-5 will pass 3A while requiring only 0.45V of typical input voltage
• 50mV Dropout at 10mA
headroom (guaranteed 0.6V dropout). These regulators include reverse voltage
sensing that prevents current in the reverse direction. Quiescent current is always
• Quiescent Current Under
less than 650µA. These devices have been internally compensated in such a man650µA Irrespective of Load
ner that the need for a minimum output capacitor has been eliminated.
• Adjustable (5 Lead) Output
UCC283-3 and UCC283-5 versions are in 3 lead packages and have preset outputs
Voltage Version
at 3.3V and 5.0V respectively. The output voltage is regulated to 1.5% at room tem• Fixed (3 Lead) Versions for
perature. The UCC283-ADJ version, in a 5 lead package, regulates the output volt3.3V and 5V Outputs
age programmed by an external resistor ratio.
• Logic Shutdown Capability
• Short Circuit Power Limit of
3% •VIN • ISHORT
• Low VOUT to VIN Reverse
Leakage
• Thermal Shutdown
Short circuit current is internally limited. The device responds to a sustained overcurrent condition by turning off after a TON delay. The device then stays off for a period, TOFF, that is 32 times the TON delay. The device then begins pulsing on and off
at the TON/(TON+TOFF) duty cycle of 3%. This drastically reduces the power dissipation during short circuit and means heat sinks need only accommodate normal operation. On the 3 leaded versions of the device TON is fixed at 750µs, on the
adjustable 5 leaded versions an external capacitor sets the on time — the off time
is always 32 times TON. The external timing control pin, CT, on the five leaded versions also serves as a shutdown input when pulled low.
Internal power dissipation is further controlled with thermal overload protection circuitry. Thermal shutdown occurs if the junction temperature exceeds 165°C. The
chip will remain off until the temperature has dropped 20°C.
The UCC283 series is specified for operation over the industrial range of −40°C to
+85°C, and the UCC383 series is specified from 0°C to +70°C. These devices are
available in 3 and 5 pin TO-220 and TO-263 power packages.
BLOCK DIAGRAM
UDG-98133
SLUS215 - OCTOBER 1998
UCC283-3/-5/-ADJ
UCC383-3/-5/-ADJ
CONNECTION DIAGRAMS
ABSOLUTE MAXIMUM RATINGS
VIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9V
CT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to 3V
ADJ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 to 9V
Storage Temperature . . . . . . . . . . . . . . . . . . . −65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . −55°C to +150°C
Lead Temperature (Soldering, 10 sec.) . . . . . . . . . . . . . +300°C
TO-263-3 (Front View)
TD Package
TO-263-5 (Front View)
TD Package
Currents are positive into, negative out of the specified terminal. Consult Packaging Section of Databook for thermal limitations and considerations of packages. All voltages are
referenced to GND.
See Note 1
TO-220-3 (Front View)
T Package
TO-220-5 (Front View)
T Package
See Note 1
See Note 1
Note 1: Tab = GND
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications hold for TA = 0°C to 70°C for the
UCC383-X series, −40°C to +85°C for the UCC283-X, VVIN = VVOUT + 1.5V, IOUT = 10mA, CIN = 10µF, COUT = 22µF. For the
283-ADJ, VVIN = 6.5V, CT = 750pF, TJ = TA.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
TJ = 25°C
4.925
5
5.075
V
Over Temperature
4.875
5.125
V
UCC283-5 Fixed 5V, 3A Family
Output Voltage
Line Regulation
VVIN = 5.15V to 9V
2
10
mV
Load Regulation
IOUT = 10mA to 3A
10
20
mV
Dropout Voltage, VDROPOUT = VVIN − VVOUT
IOUT = 3A, VOUT = 4.85V
0.4
0.6
V
IOUT = 1.5A, VOUT = 4.85V
0.2
0.45
V
IOUT = 10mA, VOUT = 4.85V
Peak Current Limit
VVOUT = 0V
Overcurrent Threshold
Current Limit Duty Cycle
VVOUT = 0V
Overcurrent Time Out, TON
VVOUT = 0V
Quiescent Current
No load
Reverse Leakage Current
0V < VVIN < VVOUT, VVOUT ≤ 5.1V, at VVOUT
UVLO
VIN where VOUT passes current
2
50
150
mV
4
5
6.5
A
3
4
5.5
A
3
5
%
400
750
1400
µs
400
650
µA
0
75
mA
2.8
3
V
2.6
UCC283-3/-5/-ADJ
UCC383-3/-5/-ADJ
ELECTRICAL CHARACTERISTICS: Unless otherwise stated, these specifications hold for TA = 0°C to 70°C for the
UCC383-X series, −40°C to +85°C for the UCC283-X, VVIN = VVOUT + 1.5V, IOUT = 10mA, CIN = 10µF, COUT = 22µF. For the
283-ADJ, VVIN = 6.5V, CT = 750pF, TJ = TA.
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNITS
TJ = 25°C
3.25
3.3
3.35
V
Over Temperature
3.22
3.38
V
UCC283-3 Fixed 3.3V, 3A Family
Output Voltage
Line Regulation
VVIN = 3.45V to 9V
2
7
mV
Load Regulation
IOUT = 10mA to 3A
7
15
mV
Dropout Voltage, VDROPOUT = VVIN - VVOUT
IOUT = 3A, VOUT = 3.15V
0.5
1
V
IOUT = 1.5A, VOUT = 3.15V
0.25
0.6
V
IOUT = 10mA, VOUT = 3.15V
Peak Current Limit
VVOUT = 0V
Overcurrent Threshold
Current Limit Duty Cycle
50
150
mV
4
5
6.5
A
3
4
5.5
A
3
5
%
VVOUT = 0V
750
1400
µs
400
650
µA
0
75
mA
2.6
2.8
3
V
TJ = 25°C
1.23
1.25
1.27
V
Over Temperature
1.22
1.28
V
Overcurrent Time Out, TON
VVOUT = 0V
Quiescent Current
No load
400
Reverse Leakage Current
0V < VVIN < VVOUT, VVOUT ≤ 3.35V, at VVOUT
UVLO
VIN where VOUT passes current
UCC283-ADJ Adjustable Output, 3A Family
Regulating Voltage at ADJ Pin
Line Regulation, at ADJ Input
VVIN = VVOUT + 150mV to 9V
1
3
mV
Load Regulation, at ADJ Input
IOUT = 10mA to 3A
2
5
mV
Dropout Voltage, VDROPOUT = VIN − VOUT
VVIN > 4V, IOUT = 3A
0.4
0.6
V
VVIN > 3V, IOUT = 1.5A
0.2
0.45
V
50
150
mV
Peak Current Limit
VVIN > 3V, IOUT = 10mA
VVOUT = 0V, VIN = 6.5V
4
5
6.5
A
Overcurrent Threshold
VVIN = 6.5V
3
4
5.5
A
3
5
Current Limit Duty Cycle
VVOUT = 0V
Overcurrent Time Out, TON
VVOUT = 0V, CT = 1500pF
Reverse Leakage Current
0V < VVIN < VVOUT, VVOUT ≤ 9V, at VVOUT
Bias current at ADJ Input
Quiescent Current
No load
Shutdown Threshold
At CT Input
Quiescent Current in Shutdown
VVIN = 10V
UVLO
VIN where VOUT passes current
3
%
µs
750
0
100
mA
100
250
nA
400
650
µA
0.25
0.45
V
40
75
µA
2.6
2.8
3
V
UCC283-3/-5/-ADJ
UCC383-3/-5/-ADJ
PIN DESCRIPTIONS
GND: Reference ground.
ADJ: Adjust pin for the UCC283-ADJ version only. Feedback pin for the linear regulator. Program the output voltage with R1 connected from ADJ to GND and R2
connected from VOUT to ADJ. Output voltage is given by:
VOUT =
VIN: Input voltage, This pin must be bypassed with a low
ESL/ESR 1µF or larger capacitor to GND. VIN can range
from (VOUT + VDROPOUT) to 9V. If VIN is reduced to zero
while VOUT is held high, the reverse leakage from VOUT
to VIN is less than 75µA.
1. 25V · (R1+ R 2)
R1
CT: Short circuit timing capacitor and shutdown input for
the UCC283-ADJ version. Pulling CT below 0.25V turns
off the regulator and places it in a low quiescent current
mode. A timing capacitor, C, from CT to GND programs
the duration of the pulsed short circuit on-time. On-time,
TON, is approximately given by: TON = 500k · C.
VOUT: Regulated output voltage. A bypass capacitor is
not required at VOUT, but may be desired for good transient response. The bypass capacitor must not exceed a
maximum value in order to insure the regulator can start.
ORDERING INFORMATION
Table I. Package Information
Temperature
Range
Package
Output Voltage
2: –40°C to +85°C
T: TO-220
3: 3.3V
3: 0°C to +70°C
TD: TO-263
5: 5V
ADJ: Adjustable
APPLICATION INFORMATION
large, the output voltage will not come into regulation
during the initial TON period and the UCC383 will enter
pulsed mode operation. The peak current limit, TON
period, and load characteristics determine the maximum
value of output capacitor that can be charged. For a
constant current load the maximum output capacitance is
given as follows:
Overview
The UCC383 family of low dropout linear (LDO) regulators provide a regulated output voltage for applications
with up to 3A of load current. The regulators feature a
low dropout voltage and short circuit protection, making
their use ideal for demanding high current applications
requiring fault protection.
T
COUT (max) = (ICL - I LOAD ) · ON Farads
VOUT
Short Circuit Protection
The UCC383 provides unique short circuit protection
circuitry that reduces power dissipation during a fault.
When an overload situation is detected, the device
enters a pulsed mode of operation at 3% duty cycle
reducing the heat sink requirements during a fault. The
UCC383 has two current thresholds that determine its
behavior during a fault as shown in Figure 1.When the
regulator current exceeds the overcurrent threshold for
a period longer than TON, the UCC383 shuts off for a
period (TOFF) which is 32 times TON. During an overload,
the regulator actively limits the maximum current to the
peak current limit value. The peak current limit is
nominally 1 Amp greater than the overcurrent threshold.
The regulator will continue in pulsed mode until the fault
is cleared as illustrated in Figure 1.
(1)
For worst case calculations the minimum values of on
time (TON) and peak current limit (ICL) should be used.
The adjustable version allows the TON time to be
adjusted with a capacitor on the CT pin:
TON ( ADJ ) = 500, 000 · C ( m Farad ) microseconds
(2)
TON ( m sec) = 500, 000 · C ( m Farads )
For a resistive load (RLOAD) the maximum output
capacitor can be estimated from:
COUT (max) =
Short Circuit Protection
A capacitive load on the regulator’s output will appear as
a short circuit during start-up. If the capacitance is too
4
TON (sec)
æ
ç
ç
1
RLOAD · lnç
VOUT
ç1ICL · RLOAD
è
ö
÷
÷
÷
÷
ø
Farads
(3)
UCC283-3/-5/-ADJ
UCC383-3/-5/-ADJ
APPLICATION INFORMATION (cont.)
Figure 1. UCC383 Short Circuit Timing
versions of the part, as well as the adjustable version
programmed to 3.0V.
Dropout Performance
Referring to the Block Diagram, the dropout voltage of
the UCC383 is equal to the minimum voltage drop (VIN to
VOUT) across the N-Channel MOSFET. The dropout
voltage is dependent on operating conditions such as
load current, input and load voltages, as well as
temperature. The UCC383 achieves a low RDS(ON)
through the use of an internal charge-pump (VPUMP) that
drives the MOSFET gate. Figure 2 depicts typical
dropout voltages versus load current for the 3.3V and 5V
Vout = 3V
Vout = 3.3V
Figure 3. depicts the typical dropout performance of the
adjustable version with various output voltages and load
currents.
Operating temperatures also effect the RDS(ON) and
dropout voltage of the UCC383. Figure 4. graphs the
typical dropout for the 3.3V and 5V versions with a 3A
load over temperature.
Vout = 5V
Iout = 1A
Iout = 1.5A
Iout = 3A
0.8
0.5
0.7
VIN – VOUT(V)
VIN – VOUT (V)
0.4
0.3
0.2
0.6
0.5
0.4
0.3
0.2
0.1
0.1
0
0
1
1.5
2
2.5
3
3
Iout (A)
Figure 2. UCC383 Typical Dropout vs. Load Current
3.5
4
VOUT (V)
4.5
5
Figure 3. Typical Dropout Voltage vs. IOUT and VVOUT
5
UCC283-3/-5/-ADJ
UCC383-3/-5/-ADJ
Thermal Design
Voltage Programming and Shutdown Feature for
Adjustable Version
The Packing Information section of the data book contains reference material for the thermal ratings of various
packages. The section also includes an excellent article
Thermal Characteristics of Surface Mount Packages, that
is the basis of the following discussion.
A typical application circuit based on the UCC383 adjustable version is shown in Figure 5. The output voltage is
externally programmed through a resistive divider at the
ADJ pin.
æ R2 ö
÷ volts
VOUT = 1. 25 ·ç1+
è R1ø
Thermal design for the UCC383 includes two modes of
operation, normal and pulsed mode. In normal operation, the linear regulator and heat sink must dissipate
power equal to the maximum forward voltage drop multiplied by the maximum load current. Assuming a constant
current load, the expected heat rise at the regulator’s
junction can be calculated as follows:
(4)
The maximum programmed output voltage is constrained
by the 9V absolute rating of the IC (this includes the
charge pump voltage) and its ability to enhance the NChannel MOSFET. Unless the load current is below the
3A rating of the device, output voltages above 7V are not
recommended. The minimum output voltage can be programmed down to 1.25V, however, the input voltage must
always be greater than the UVLO of the part.
TRISE ( q ) = PDISS · (q jc + q ca ) °C
(5)
Where theta, (θ) is thermal resistance and PDISS is the
power dissipated. The thermal resistance of both the
TO-220 and TO-263 packages (junction to case) is 3 degrees Celsius per Watt. In order to prevent the regulator
from going into thermal shutdown, the case to ambient
theta must keep the junction temperature below 150°C.
If the LDO is mounted on a 5 square inch pad of 1 ounce
copper, for example, the thermal resistance from junction
to ambient becomes 60 degrees Celsius per Watt. If a
lower thermal resistance is required by the application,
the device heat sinking would need to be improved.
The adjustable version includes a shutdown feature, limiting quiescent current to 40uA typical. The UCC383 is
shutdown by pulling the CT pin to below 0.25V. As shown
in Figure 4, a small logic level MOSFET or BJT transistor
in parallel with the timing capacitor can be driven with a
digital signal, putting the device in shutdown. If the CT
pin is not pulled low, the IC will internally pull up on the
pin enabling the regulator. The CT pin should not be
forced high, as this will interfere with the short circuit protection feature. Selection of the timing capacitor is explained in Short Circuit Protection.
The adjustable version can be used in applications requiring remote voltage sensing (i.e. monitoring a voltage
other than or not directly tied to the VOUT pin). This is
possible since the inverting input of the voltage amplifier
(see Block Diagram) is brought out to the ADJ pin.
Vout = 3.3v
Vout = 5v
0.5
IDD CURRENT(mAMPS)
VIN – VOUT (mv)
0.6
0.5
0.4
0.3
0.4
0.3
0.2
0.1
0
0.2
-40
10
0
60
1
2
3
LOAD CURRENT (AMPS)
TEMPERATURE (°C)
Figure 4. Typical dropout voltage vs. case
temperature with a 3A load
Figure 5. Typical application for the 5 pin adjustable
version.
6
UCC283-3/-5/-ADJ
UCC383-3/-5/-ADJ
When the UCC383 regulator is in pulsed mode due to an
overload or short circuit in the application, the maximum
average power dissipation is calculated as follows:
Ripple Rejection
Even though the UCC383 family of linear regulators are
not optimized for fast transient applications (Refer to
UC182 Fast LDO Linear Regulator), they do offer
significant power supply rejection at lower frequencies.
Figure 6 depicts ripple rejection performance in a typical
application. The performance can be improved with
additional filtering.
TON
(6)
PPULSE _ AVE = (VIN – VOUT ) · ICL ·
Watts
33 ·TON
As seen in equation 6, the average power during a fault
is reduced dramatically by the duty cycle, allowing the
heat sink to be sized for normal operation. Although the
peak power in the regulator during the TON period can be
significant, the thermal mass of the package will generally keep the junction temperature from rising unless the
TON period is increased to tens of milliseconds.
Figure 6. Typical supply current vs. load current.
UDG-94093
Figure 7. Ripple rejection vs. frequency.
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