SIPEX SP8537

®
SP8537
Micropower Sampling 10-Bit A/D Converter
■
■
■
■
■
■
■
■
Low Cost
10-Bit Serial Sampling ADC
8-Pin NSOIC Plastic Package
Low Power @ 250µA including
Automatic Shutdown: 1nA(typ)
Programmable Input Configuration:
Full differential or 2 channel
single-ended
Single Supply 3.0V to 5.5V operation
Half Duplex Digital Serial Interface
Sample Rate: 33.9µS
DESCRIPTION
The SP8537 is a very low power 10-Bit data acquisition chip. TheSP8537 typically draws 250µA
of supply current when sampling at 29.5 kHz. Supply current drops linearly as the sample rate
is reduced. The ADC automatically powers down when not performing conversions, drawing only
leakage current. The SP8537 is available in 8-Pin NSOIC packages, specified over Commercial,
Industrial and Extended temperature ranges. The SP8537 is best suited for Battery-Operated
Systems, Portable Data Acquisition Instrumentation, Battery Monitoring, and Remote Sensing
applications. The serial port allows efficient data transfer to a wide range of microprocessors and
microcontrollers over 3 or 4 wires.
VCC
GND
REFL
REFH
Internal
VCC
10
REFL
DAC
REFH
Csample P
CH0
COMPARATOR
MUX
SAR
PARALLEL TO
SERIAL SHIFT
REGISTER
Dout
CH1
Csample N
DIN
INPUT
DATA
REG
CS
TIMING &
CONTROL LOGIC
CLK
SP8537 Block Diagram
SP8537DS/03
SP8537 Micropower Sampling 10–Bit Voltage A/D Converter
1
© Copyright 2000 Sipex Corporation
ABSOLUTE MAXIMUM RATINGS
These are stress ratings only and functional operation of the device at
these ratings or any other above those indicated in the operation
sections of the specifications below is not implied. Exposure to absolute
maximum rating conditions for extended periods of time may affect
reliability.
(TA=+25˚C unless otherwise noted) .....................................................
VCC to GND ................................................................................. 7.0V
Vin to GND .............................................................. -0.3 to VCC +0.3V
Digital input to GND ................................................ -0.3 to VCC +0.3V
Digital output to GND .............................................. -0.3 to VCC +0.3V
Operating Temperature Range
Commercial (J, K Version) ........................................... 0˚C to 70˚C
Industrial (A, B Version) .......................................... -40˚C to +85˚C
Lead Temperature (Solder 10Sec) ............................................ +300˚C
Storage Temperature .................................................. -65˚C to +150˚C
Power Dissipation to 70˚C ........................................................ 500mW
SPECIFICATIONS
Unless otherwise noted the following specifications apply for VCC=5V or 3.3V with limits applicable for Tmin to Tmax. Typical applies for Ta=25˚C.
PARAMETERS
DC ACCURACY
Resolution
Integral Linearity
K,B
VCC=5.0V
VCC=3.3V
MIN. TYP. MAX. MIN. TYP. MAX.
10
10
UNITS
Bits
+0.5 +1.0
+0.5 +1.0
LSB
Differential Linearity Error
K,B
+0.6 +2.0
+0.6 +2.0
LSB
Gain Error
K,B
+0.2 +2.0
+0.2 +2.0
LSB
Offset Error
K,B
+0.6 +2.0
+0.6 +3.0
LSB
ANALOG INPUT
Input Signal FS Range
Input Impedance
On Channel
Off Channel
Input Bias Current
Analog Input Range
0
VCC
0
CONDITIONS
VCC
20
100
3
100
.001 1
-.05
VCC+.05 -.05
20
100
3
100
.001 1
VCC+.05
pF
MΩ
pF
MΩ
µA
Volts
In Parallel with 100MΩ
In Parallel with 100MΩ
MULTIPLEXER
Crosstalk (fD = Nyquist)
Feedthrough (fD = Nyquist)
-90
-90
-90
-90
dB
dB
Off to On Channel
Off to On Channel
fD= Disturbance
CONVERSION SPEED
Sample Time
1.5
1.5
See Timing Diagrams
Conversion Time
10
10
clock
cycles
clock
cycles
kHz
µS
µS
µS
Complete Cycle
Clock Period
Clock High Time
Clock Low Time
SP8537DS/03
29.5
2.25
1.0
1.0
6.66
10
4.5
4.5
SP8537 Micropower Sampling 10–Bit Voltage A/D Converter
2
See Timing Diagrams
See Timing Diagrams
See Timing Diagrams
See Timing Diagrams
See Timing Diagrams
© Copyright 2000 Sipex Corporation
SPECIFICATIONS (cont.)
Unless otherwise noted the following specifications apply for VCC=5V or 3.3V with limits applicable for Tmin to Tmax. Typical applies for Ta=25˚C.
PARAMETERS
DIGITAL INPUTS
Input Low Voltage, VIL
Input High Voltage, VIH
Input Current IIN
Input Capacitance
DIGITAL OUTPUTS
Data Format
Data Coding
VOH
VOL
VCC=5.0V
VCC=3.3V
MIN. TYP. MAX. MIN. TYP. MAX. UNITS
0.8
2.0
0.8
2.0
+2.0
+2.0
3.0
3.0
4.0
2.0
0.4
0.4
Volts
Volts
µA
pF
Volts
Volts
AC ACCURACY
Spurious free Dynamic
Range (SFDR)
71
72
dB
Total Harmonic Distortion (THD)
-67
-68
dB
Signal to Noise &
Distortion (SINAD)
59
59
dB
Signal to Noise (SNR)
60
60
dB
SAMPLING DYNAMICS
Acquisition Time to 0.05%
2
-3dB Small Signal BW
Aperture Delay
Aperture Jitter
Common-Mode Rejection Ratio
POWER SUPPLIES
VCC
Supply Current Operation Mode
70
3.38
5
20
150
80
2
70
6.00
4
30
150
80
MHz
nS
pS
dB
See Timing Diagram
VDD=5V ±5%, IOH=-0.4mA
VDD=5V ±5%, IOH=+1.6mA
For all FFT’s
(Full Differential Mode)
If VCC = 5V
fsample = 25kHz
fin = 12kHz
If VCC = 3.3V
fsample = 6.66kHz
fin = 2.8kHz
fCM = 12.5kHz @ 5 volts
2.8kHz @ 3.3 volts
Volts
+3.0 +5.0 +5.5 +3.0 +3.3 +5.5
250
400
100
300
µA
(CS=0) 29.5kHz, 5 volt conversion
rate. 6.66kHz 3.3 volts
(CS=1)
0.001 0.5
0.001 0.5
µA
Power Dissipation
Operating Mode
Shutdown Mode
1.25
0.33 0.99
1.7
mW
µW
SP8537DS/03
VDD=5V +5%
VDD=5V +5%
µs
Shutdown Mode
TEMPERATURE RANGE
Commercial
Industrial
Storage
CONDITIONS
2
2.5
0˚ to +70˚C
-40˚ to +85˚C
-65˚ to +150˚C
0˚ to +70˚C
-40˚ to +85˚C
-65˚ to +150˚C
˚C
˚C
˚C
SP8537 Micropower Sampling 10–Bit Voltage A/D Converter
3
© Copyright 2000 Sipex Corporation
SPECIFICATIONS (cont.)
Recommended Operating Conditions
MIN.
+3.0
VCC=3.3V
TYP. MAX.
+3.3
+5.5
PARAMETERS
Supply Voltage
fCLK
Clock Frequency
tCYC
Total Cycle Time
33.9
150.2
µS
tCLK
Clock Period
2.25
10.0
µS
ten
SCLK to DOUT Enable
▼
MIN.
+3.0
VCC=5.0V
TYP. MAX.
+5.0
+5.5
SYMBOL
VCC
444
▼
100
UNITS
Volts
kHz
80
200
150
300
nS
tDIS
CSN to DOUT Hi-Z
80
200
150
300
nS
tR
DOUT Rise Time
5
25
10
50
nS
tF
DOUT Fall Time
5
25
10
50
nS
tHDO
DOUT Valid After SCLK
80
200
150
300
nS
thDI
Hold Time DIN After
CLK^
50
tsuCS
Setup Time CSv
Before CLK^
100
tsuDI
Setup Time, DIN
Stable Before CLK^
100
tWHCLK
CLK High Time
1
4.5
µS
tWLCLK
CLK Low Time
1
4.5
µS
tWHCS
CS High Time between
Data Transfers Cycles
100
150
nS
tSAMPLE
S/H Acquisition Time
1.5
1.5
SCLK Cycles
tCONV
ADC Conversion Time
10
10
SCLK Cycles
▼
0
50
10
150
SP8537
GND 4
nS
15
nS
PIN ASSIGNMENTS
Pin 1- CS - Chip Select.
CS 1
CH1 3
nS
150
PIN DESCRIPTION
CH0 2
0
8
VCC/VREF
7
SCLK
Pin 3- CH1 - Channel 1
6
DOUT
Pin 4- GND - Ground
5
DIN
Pin 2- CH0 - Channel 0
Pin 5- DIN - Data In
Pin 6 - DOUT - Data Out
Pin 7- SCLK - Serial Clock
Pin 8- VCC/VREF - Supply & Reference Voltage
SP8537DS/03
SP8537 Micropower Sampling 10–Bit Voltage A/D Converter
4
© Copyright 2000 Sipex Corporation
DESCRIPTION
The device uses a capacitive DAC architecture
which provides the sampling behavior. This
results in full Nyquist performance at the fastest
throughput rate (29.5 KHz) the device is capable of.
The SP8537 is a 10 bit sampling ADC with
a programmable two channel multiplexer and
serial data interface. The ADC samples and
converts 10 bits of data in 33.9 µS with a 5V
supply voltage applied. The SP8537 will also
operate at a 3.3V supply at 150.2µS throughput.
The device automatically shuts down to a
+0.5 µA (MAX) level as soon as the chip is
deselected (CS=1). Serial data output is
available in an MSB first format.
The power supply voltage is variable from 3.0V
to 5.5V which provides supply flexibility. At the
5.0V supply level, conversion plus sampling
time is 33.9µS and supply current is 250µA
(1.25 mW). With a 3.3V supply the conversion
plus sampling time is 150.2µS and current is
reduced to 150µA (0.5 mW).
FEATURES
The device features automatic shutdown and
will shutdown to a +0.5 µA power level as CS
is brought high (de-selected). Power is
proportional to conversion duty cycle and
varies from 250 µA at 34µS (Duty cycle =
100%) to 6.25µa at 1.4 ms (Duty cycle = 2.5%).
Two program bits, which are shifted into the
device prior to conversion, determine the input
configuration. In the single ended MUX
configuration the input signal will be applied to
either channel 0 or channel 1 and will be ground
referenced. The maximum full scale range is
VCC. In the full differential mode, the signal
will be applied between channel 0 and channel
1. The signals applied at each input may both
be dynamic. This is in contrast with pseudo
differential devices which must have input low
held at a constant level during conversion. The
converter will provide significant common mode
rejection when used in full differential manner.
Both inputs must remain between ground and
VCC for proper conversion.
MUX ADDRESSING
Mux Addressing
SGL/DIFF ODD/SIGN
0
0
0
1
1
0
1
1
Examples:
Conversion rate
34 µS
68 µS
136 µS
1.4 mS
Channel #
0
1
VINH VINL
VINL VINH
VINH
VINH
GND
ICC @ 5V
250 µA
125 µA
62.5 µA
6.25 µA
Duty Cycle
100%
50%
25%
2.5%
Comments
Full Differential Mode
VINL
VINL
Single Ended Mux Mode
ADC TRANSFER FUNCTION
INPUT VOLTAGE
(VINH-VINL)*
INPUT VOLTAGE
AT VCC/VREF = 5V
OUTPUT
CODE
0 LSB
1 LSB
512 LSB
1022 LSB
1023 LSB
0V
0.0049V
2.5000V
4.9902V
4.9951V
0000000000
0000000001
1000000000
1111111110
1111111111
* See Mux Addressing Table for a definition of VINH - VINL.
SP8537DS/03
SP8537 Micropower Sampling 10–Bit Voltage A/D Converter
5
© Copyright 2000 Sipex Corporation
Full Differential Sampling
The device is configured such that it
delivers serial data MSB first requiring 15 clock
periods for a full conversion. Please refer to the
timing diagram.
The SP8537 can be configured for single-ended
sampling (i.e. CH0-ground or CH1-ground) or
full differential sampling (CH0-CH1 or CH1CH0). In the full differential sampling
configuration, both inputs are sampled and held
simultaneously. Because of the balanced
differential sampling, dynamic common mode
noise riding along the input signal is cancelled
above and beyond DC noise. This is a
significant improvement over psuedo-differential
sampling schemes, where the low side of the
input must remain constant during the conversion,
and therefore only DC noise (i.e. signal offset)
is cancelled. If AC common mode noise is left
to be converted along with the differental
component, the output signal will be degraded.
Circuit Operation
The device will ignore any leading zeros
applied to the DIN pin even if CS is low. After
Chip Select Bar (CS) is brought low and the
START bit is clocked in to the converter, the
conversion sequence is initiated. Two additional
bits are clocked in immediately following the
START bit: SGL/DIFF and ODD/SIGN. The
second and third bits clocked in determine the
MUX configuration (see MUX addressing
table). Please refer to the timing diagram.
The SGL/DIFF bit when zero sets the input
MUX for full differential mode and when one,
sets the input MUX for single ended mode. The
ODD/SIGN bit when zero sets channel zero as
the positive input (ground referred for single
ended operation and referred to channel one in
differential mode). With the ODD/SIGN bit one,
channel one will be the positive input (ground
referred for single ended operation and referred
to channel zero in differential mode).
Full differential sampling allows flexibility in
converting the input signal. If the signal low-side
is already tied to a ground elsewhere in the
system, it can be hardwired to the low side
channel (i.e. CH0 or CH1) which acts as a
signal ground sense, breaking a potential ground
loop. It is also possible to drive the inputs
balanced differential, as long as both inputs are
within the power rails. In this configuration, both
the high and low signals have the same
impedance looking back to ground, and
therefore pick up the same noise along the
physical path from signal source (i.e. sensor,
transducer, battery) to converter. This noise
becomes common mode, and is cancelled out
by the differential sampling of the SP8537.
The SP8537 is a SAR converter with full
differential multiplexed front end, capacitive
DAC, precision comparator, Successive
Approximations Register, control logic and data
output register. After the input is sampled and
held the conversion process begins. The DAC
MSB is set and its output is compared with the
signal input, if the DAC output is less than the
input, the comparator outputs a one which is
latched into the SAR and simultaneously made
available at the ADC serial output pin. Each bit
is tested in a similar manner until the SAR
contains a code which represents the signal input
to within +1/2 LSB. During this process the SAR
content has been shifted out of the ADC serially.
In the MSB first format the data will appear at
the DOUT pin MSB through LSB in 15 clock
periods. Note that the Chip Select Bar pin must
be toggled high between conversions. The DOUT
pin will be in a high impedance state whenever
Chip Select Bar is high. After Chip Select Bar
has been toggled and brought low again, the
converter is ready to accept another START bit
and begin a new conversion.
SP8537DS/03
Layout Considerations
To preserve the high resolution and linearity of
the SP8537 attention must be given to circuit
board layout, ground impedance and bypassing.
A circuit board layout which includes separate
analog and digital ground planes will prevent
the coupling of noise into sensitive converter
circuits and will help to preserve the dynamic
performance of the device. In single ended
mode, the analog input signal should be
referenced to the ground pin of the converter.
This prevents any voltage drops that occur in
the power supply's common return from appearing
in series with the input signal.
SP8537 Micropower Sampling 10–Bit Voltage A/D Converter
6
© Copyright 2000 Sipex Corporation
combination of a 6.8µF tantalum and a 0.1µF
ceramic capacitor. To maintain maximum
system accuracy, the supply connected to the
VCC pin should be well isolated from digital
supplies and wide load variations. A separate
conductor from the supply regulator to the A/D
converter will limit the effects of digital switching
elsewhere in the system. Power supply noise can
degrade the converters performance. Especially
corrupting are noise and spikes from a switching
power supply.
In full differential mode, the high and low side
board traces should run close to each other, with
the same layout. This will insure that any noise
coupling will be common mode, and cancelled
by the converters (patent pending) full differential architecture.
If separate analog and digital ground planes are
not possible, care should be used to prevent
coupling between analog and digital signals. If
analog and digital lines must cross, they should
do so at right angles. Parallel analog and digital
lines should be separated by a circuit board trace
which is connected to common.
To avoid introducing distortion when driving the
A/D converter input, the input signal source
should be able to charge the SP8537's equivalent
20 pF of input capacitance from zero volts to
the signal level in 1.5 clock periods.
The SP8537 VCC pin is also the reference pin
for the device. This means that noise on the VCC
pin will be proportionally represented as noise
in the converters output data. A noise signal of
4.88mV (at a 5V supply) will produce 1 LSB of
error in the output data. The VCC pin should be
bypassed to the ground pin with a parallel
LSB First Conversion
MSB First Conversion
SP8537 Timing Diagram
SP8537DS/03
SP8537 Micropower Sampling 10–Bit Voltage A/D Converter
7
© Copyright 2000 Sipex Corporation
Icc versus Sampling Rate
(clock rate = 500kHz)
Vcc = 5V
Icc versus Sampling Rate
(clock rate = 100kHz)
Vcc = 3.3V
80.0
70.0
50.0
Icc (µA)
Icc (µA)
60.0
40.0
30.0
20.0
10.0
0.0
10
100
1000
200.0
180.0
160.0
140.0
120.0
100.0
80.0
60.0
40.0
20.0
0.0
10000
10
conversion time (µs)
100
10000
conversion time (µs)
Vcc = 3.30V
Vcc = 5.00V
+1.0LSB
+1.0LSB
INLE
INLE
-1.0LSB
+1.0LSB
-1.0LSB
+1.0LSB
DNLE
DNLE
-1.0LSB
-1.0LSB
0
512
0
1023
FFT 20 dB/div Vcc =5V
0dB
FFT
-20dB
-160dB
0HZ
SP8537DS/03
1.74kHz/div
13.9kHz
512
1023
FFT 20 dB/div Vcc =3V
Spectral Density dB
Spectral Density dB
1000
0dB
FFT
-20dB
-160dB
0HZ
SP8537 Micropower Sampling 10–Bit Voltage A/D Converter
8
0.348kHx/div
2.78kHz
© Copyright 2000 Sipex Corporation
Gain Error vs. Temperature
2.00
240
1.50
LSB
µA
Icc vs. Temperature
250
230
1.00
220
0.50
210
0.00
200
-50
0
50
100
-50
0
Spurious Free Dynamic Range
1.00
80.00
0.75
75.00
70.00
dB
LSB
Offset vs. Temperature
0.50
65.00
0.25
60.00
55.00
0
-50
0
50
100
50.00
1000
10000
Frequency
temperature (C)
dB
70.00
68.00
66.00
64.00
62.00
60.00
58.00
56.00
54.00
52.00
50.00
1000
10000
Frequency
100000
Signal to Noise Ratio
SINAD
dB
100
temperature (C)
temperature (C)
70.00
68.00
66.00
64.00
62.00
60.00
58.00
56.00
54.00
52.00
50.00
100000
1000
100
-55.00
CMRR (dB)
-60.00
-65.00
-70.00
-75.00
10000
Frequency
100000
Input CMRR,
Vcc = 5V
Total Harmonic Distortion
-50.00
dB
50
80
60
40
20
0
-80.00
1000
SP8537DS/03
10000
Frequency
100000
1E1 1E2 1E3 1E4 1E5 1E6 1E7 1E8
Input CMFrequency
SP8537 Micropower Sampling 10–Bit Voltage A/D Converter
9
© Copyright 2000 Sipex Corporation
PACKAGE: PLASTIC
SMALL OUTLINE (SOIC)
(NARROW)
E
H
h x 45°
D
A
Ø
e
B
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
SP8537DS/03
A1
L
8–PIN
14–PIN
16–PIN
A
0.053/0.069
(1.346/1.748)
0.053/0.069
(1.346/1.748)
0.053/0.069
(1.346/1.748)
A1
0.004/0.010
(0.102/0.249
0.004/0.010
(0.102/0.249)
0.004/0.010
(0.102/0.249)
B
0.014/0.019
(0.35/0.49)
0.013/0.020
(0.330/0.508)
0.013/0.020
(0.330/0.508)
D
0.189/0.197
(4.80/5.00)
0.337/0.344
0.386/0.394
(8.552/8.748) (9.802/10.000)
E
0.150/0.157
(3.802/3.988)
0.150/0.157
(3.802/3.988)
0.150/0.157
(3.802/3.988)
e
0.050 BSC
(1.270 BSC)
0.050 BSC
(1.270 BSC)
0.050 BSC
(1.270 BSC)
H
0.228/0.244
(5.801/6.198)
0.228/0.244
(5.801/6.198)
0.228/0.244
(5.801/6.198)
h
0.010/0.020
(0.254/0.498)
0.010/0.020
(0.254/0.498)
0.010/0.020
(0.254/0.498)
L
0.016/0.050
(0.406/1.270)
0.016/0.050
(0.406/1.270)
0.016/0.050
(0.406/1.270)
Ø
0°/8°
(0°/8°)
0°/8°
(0°/8°)
0°/8°
(0°/8°)
SP8537 Micropower Sampling 10–Bit Voltage A/D Converter
10
© Copyright 2000 Sipex Corporation
PACKAGE: PLASTIC
DUAL–IN–LINE
(NARROW)
E1 E
D1 = 0.005" min.
(0.127 min.)
A1 = 0.015" min.
(0.381min.)
D
A = 0.210" max.
(5.334 max).
C
A2
L
B1
B
e = 0.100 BSC
(2.540 BSC)
Ø
eA = 0.300 BSC
(7.620 BSC)
ALTERNATE
END PINS
(BOTH ENDS)
DIMENSIONS (Inches)
Minimum/Maximum
(mm)
8–PIN
14–PIN
16–PIN
18–PIN
20–PIN
22–PIN
A2
0.115/0.195
(2.921/4.953)
0.115/0.195
(2.921/4.953)
0.115/0.195
(2.921/4.953)
0.115/0.195
(2.921/4.953)
0.115/0.195
(2.921/4.953)
0.115/0.195
(2.921/4.953)
B
0.014/0.022
(0.356/0.559)
0.014/0.022
(0.356/0.559)
0.014/0.022
(0.356/0.559)
0.014/0.022
(0.356/0.559)
0.014/0.022
(0.356/0.559)
0.014/0.022
(0.356/0.559)
B1
0.045/0.070
(1.143/1.778)
0.045/0.070
(1.143/1.778)
0.045/0.070
(1.143/1.778)
0.045/0.070
(1.143/1.778)
0.045/0.070
(1.143/1.778)
0.045/0.070
(1.143/1.778)
C
0.008/0.014
(0.203/0.356)
0.008/0.014
(0.203/0.356)
0.008/0.014
(0.203/0.356)
0.008/0.014
(0.203/0.356)
0.008/0.014
(0.203/0.356)
0.008/0.014
(0.203/0.356)
D
0.355/0.400
0.735/0.775
0.780/0.800
0.880/0.920
0.980/1.060
1.145/1.155
(9.017/10.160) (18.669/19.685) (19.812/20.320) (22.352/23.368) (24.892/26.924) (29.083/29.337)
E
0.300/0.325
(7.620/8.255)
0.300/0.325
(7.620/8.255)
0.300/0.325
(7.620/8.255)
0.300/0.325
(7.620/8.255)
0.300/0.325
(7.620/8.255)
0.300/0.325
(7.620/8.255)
E1
0.240/0.280
(6.096/7.112)
0.240/0.280
(6.096/7.112)
0.240/0.280
(6.096/7.112)
0.240/0.280
(6.096/7.112)
0.240/0.280
(6.096/7.112)
0.240/0.280
(6.096/7.112)
L
0.115/0.150
(2.921/3.810)
0.115/0.150
(2.921/3.810)
0.115/0.150
(2.921/3.810)
0.115/0.150
(2.921/3.810)
0.115/0.150
(2.921/3.810)
0.115/0.150
(2.921/3.810)
Ø
0°/ 15°
(0°/15°)
0°/ 15°
(0°/15°)
0°/ 15°
(0°/15°)
0°/ 15°
(0°/15°)
0°/ 15°
(0°/15°)
0°/ 15°
(0°/15°)
SP8537DS/03
SP8537 Micropower Sampling 10–Bit Voltage A/D Converter
11
© Copyright 2000 Sipex Corporation
ORDERING INFORMATION
Model ........................................................ Linearity (LSB) ..................... Temperature Range ............................................................... Package
SP8537BN .......................................................... ±1.0 .................................... –40˚C to +85˚C .............................................. 8-pin, 0.3" Plastic DIP
SP8537KN .......................................................... ±1.0 ..................................... –0˚C to +70˚C ............................................... 8-pin, 0.3" Plastic DIP
SP8537BS .......................................................... ±1.0 .................................... –40˚C to +85˚C ......................................... 8-pin, 0.15" Plastic SOIC
SP8537KS .......................................................... ±1.0 ..................................... –0˚C to +70˚C .......................................... 8-pin, 0.15" Plastic SOIC
Please consult the factory for pricing and availability on a Tape-On-Reel option.
The information furnished herein by Sipex has been carefully reviewed for accuracy and reliability. Its application or use, however, is solely the responsibility of the
user. No responsibility for use of this information is assumed by Sipex, and this information shall not explicitly or implicitly become part of the terms and conditions
of any subsequent sales agreement with Sipex.
By the sale or transfer of this information, Sipex assumes no responsibility for any infringement of patents or other rights of third parties which may result from its
use. No license or other proprietary rights are granted by implication or otherwise under any patent or patent rights of Sipex Corporation.
Life Support Policy: Sipex Corporation does not authorize or warrant any Sipex product for use in life support devices and/or systems without the express written
approval of the President of Sipex Corporation. Life support devices or systems are devices which:
- are intended for surgical implant into the body or
- are intended to support or sustain life, and whose failure to perform, when properly used in accordance with instructions
for use provided in the appropriate documentation can be reasonably expected to result in significant injury to the user.
Corporation
SIGNAL PROCESSING EXCELLENCE
Sipex Corporation
Headquarters and
Sales Office
22 Linnell Circle
Billerica, MA 01821
TEL: (978) 667-8700
FAX: (978) 670-9001
e-mail: [email protected]
Sales Office
233 South Hillview Drive
Milpitas, CA 95035
TEL: (408) 934-7500
FAX: (408) 935-7600
Sipex Corporation reserves the right to make changes to any products described herein. Sipex does not assume any liability arising out of the
application or use of any product or circuit described hereing; neither does it convey any license under its patent rights nor the rights of others.
SP8537DS/03
SP8537 Micropower Sampling 10–Bit Voltage A/D Converter
12
© Copyright 2000 Sipex Corporation