SONY CXA2002

CXA2002R
2-channel Recording/Playback Amplifier
Description
The CXA2002R is a bipolar IC developed as
recording/playback amplifiers for Hi8 VCRs.
48 pin LQFP (Plastic)
Features
• Recording/playback system
• Wideband recording/playback amplifier for Hi8
VCR
• Supports electronic volume (EVR) control (3V)
• Recording system
• Recording amplifier feedback dumping circuit and
its EVR control function facilitates printed circuit
board design.
• Five-input (Y, chroma, AFM, ATF and PCM) mix
amplifier and EVR control function of Y and lowband recording level
• Ramp circuit for the recording amplifier output
bias current
• Playback system
• Playback amplifier feedback dumping circuit
facilitates printed circuit board design.
• Middle-band compensation circuit (middle tune)
and independent adjustments of the center
frequency, Q and boost by EVR
• RFAGC and dropout detection circuits
Application
8 mm VCR
Structure
Bipolar silicon monolithic IC
Absolute Maximum Ratings
• Supply voltage
VCC
7
• Operating temperature
Topr
–10 to +75
• Storage temperature
Tstg
–65 to +150
• Allowable power dissipation PD
1100
(when mounted on the printed circuit board)
Recommended Operating Condition
• Supply voltage
• Vcc EVR voltage
4.75 +0.5
–0.25
3.15 ±0.15
V
°C
°C
mW
V
V
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E95201-ST
CXA2002R
MTQ
RAMPCONT
RAMP
RFSWP
BOTH REC
VCC
RP PB
MTF0
PCMOUT
MTG
MTOUT
VCC EVR
Block Diagram
24
23
22
21
20
19
18
17
16
15
14
13
VCC1 25
1CH
REC1CONT 26
2CH
RAMP
GEN
PCMSW
MUTE
12
DOP
11
DOCDET
10
RFAGCIN
9
RFAGCTC
8
RFAGCOUT
7
YLEVEL
6
YIN
5
LOWLEVEL
4
CIN
3
AFREC
2
AFMIN
1
CCONT
REC
V/I
REC1OUT 27
M·T
–6dB
40dB
PB1IN 28
HEAD
12dB
1CH
15dB
2CH
DOCDET
MUTE
VIDEOSW
AGCDET
GND1 29
RF
AGC
PBDUMP1 30
VPSW1
VIDEO
PBDUMP2 31
PCM
15dB
HEAD
GND2 32
40dB
VPSW2
PB2IN 33
CGCA
VIDEO
1
1
V/I
1
LOWGCA
YGCA
PCM
REC
REC2OUT 34
1
RAMP
GEN
1
REC2CONT 35
1
LOWGCA
2
37
38
39
40
41
42
43
44
45
46
47
48
VPPCMIN
RECPCM
VREG
VPVTRIN
RECVIDEO
GND
IR1
IR
VG2
PCMIN
PCMREC
ATFIN
VCC2 36
–2–
CXA2002R
Pin Description
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
25k
1
CCONT
Description
10k
EVR adjusting pin for the
recording chroma level.
Increasing the applied voltage
reduces the gain.
1
—
50k 143
15k
7k
7k
70µ
20p
2
AFMIN
Input pin for recording AFM.
DC component is cut by
built-in C.
Input level: 125mVp-p (typ.)
143
2
—
50k
35µ
3
AFREC
35µ
35µ
—
3
143
After-recording mode
switchover pin (High: Afterrecording)
H: 2.3V or above
L: 0.6V or below
1.5V
70µ
143
4
CIN
4
2.45
50k
2.45V
–3–
Recording chroma input pin.
Input after cutting DC
component with C.
Input level: 300mVp-p (typ.)
CXA2002R
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
25k
5
LOWLEVEL
Description
10k
5
—
50k 143
15k
7k
7k
EVR adjusting pin for
recording RF.
Increasing the applied voltage
reduces the gain.
Simultaneous adjustment of
VIDEO and PCM paths.
VIDEO path: C+AFM+ATF
adjustment
PCM path: ATF adjustment
40µ
143
6
YIN
6
2.45
50k
Recording Y input pin.
Input after cutting DC
component with C.
Input level: 500mVp-p (typ.)
2.45V
25k
7
YLEVEL
10k
7
—
50k 143
15k
7k
EVR adjusting pin for the
recording Y signal level.
Increasing the applied voltage
reduces YLEV.
7k
40µ
8
RFAGCOUT
2.8
8
600µ
410µ
–4–
Playback Y signal output pin.
Output level: 410mVp-p (typ.)
CXA2002R
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
Description
4700p
9
Vcc
470k
143
9
RFAGCTC
9
—
25µ
25µ
50µ
50µ
RFAGCIN
—
10
50k
50µ
(
3.25V
4.15V
47k
143
11
DOCDET
Pin to determine the dropout
detection level.
11
2.5
79k
50µ
150
12
12
DOP
H: 3.15
L: 0
3.15V
2.4k
1.3m
–5–
)
RFAGC input pin for the
playback Y signal.
Playback VIDEO signal output
to Pin 14 (MTOUT) is input
again to Pin 10 (RFAGCIN)
via external ATF TRAP, AFM
TRAP and C TRAP.
DC component is cut by
built-in C.
13p 143
10
Pin to apply time constant of
RFAGC.
EVR adjustment of RFAGC
gain is possible.
Adjustment range:
2.5V to 4.75V
Gain:
Small to Large
Output pin for the dropout
detection signal.
High upon dropout.
CXA2002R
Pin
No.
13
Symbol
VCC EVR
Pin
voltage
Equivalent circuit
Description
3.15
Power supply pin for EVR block.
40µ
14
MTOUT
2.4
14
Output pin for playback
VIDEO signal.
Y + C + AMF + ATF is output.
400µ
330µ
25k
15
MTG
10k
15
—
50k 143
15k
7k
EVR adjusting pin for the
middle-tune boost.
Increasing the applied
voltage reduces the boost.
7k
40µ
16
PCMOUT
2
16
Output pin for playback PCM
3.5k
310µ
360µ
25k
17
MTF0
10k
17
—
50k 143
15k
7k
7k
–6–
EVR adjusting pin to
determine middle-tune fo.
Increasing the applied voltage
increases fo.
CXA2002R
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
35µ
RP PB
35µ
—
6.1k 50k
18
35µ
Description
18
143
REC/PB switchover pin
High: PB 2.3V or above
Low: REC 0.6V or below
1.5V
19
VCC
Power supply pin for
components other than REC
amplifier, PB amplifier and EVR.
4.75
35µ
20
BOTH REC
35µ
35µ
—
20
EACH REC/BOTH REC
switchover pin.
High: BOTH REC 2.3V or
above
Low: EACH REC 0.6V or
below
21
RFSWP input pin.
High: 2.3V or above
Low: 0.6V or below
22
Pin to turn ON/OFF the REC
amplifier bias current during
after-recording. The bias
current turns ON when this pin
goes high.
High: 2.3V or above
Low: 0.6V or below
143
1.5V
35µ
21
RFSWP
35µ
35µ
—
143
1.5V
35µ
22
RAMP
35µ
35µ
—
143
1.5V
–7–
CXA2002R
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
35µ
23
RAMPCONT
35µ
Description
35µ
—
23
143
Ramp pulse rising slope
switchover pin.
Low: 32µA/µs 0.6V or below
High: 17µA/µs 2.3V or above
(The fall time is 32µA/µs in
both cases.)
1.5V
25k
24
MTQ
10k
24
—
50k 143
15k
7k
25
VCC1
EVR adjusting pin to
determine middle-tune Q.
Increasing the applied
voltage increases Q.
7k
Power supply pin for CH1 REC
amplifier and PB amplifier.
4.75
270
34k
26
REC1CONT
—
143
26
71k
40µ
40µ
66k
EVR adjusting pin for the CH1
recording dumping level.
Reducing the applied voltage
strengthens dumping.
12k
27
27
REC1OUT
—
5.7k
1k
–8–
30
CH1 recording output pin.
Open collector.
CXA2002R
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
Description
1.2m
2.5k
28
PB1IN
0.7
CH1 playback input pin.
28
1.5V
29
GND1
GND pin for CH1 REC
amplifier and PB amplifier.
0
120µ
270
30
2.5
4k
4k
40µ
PBDUMP1
4k
30
Pin to determine the dumping
of CH1 playback by external
resistance.
Increasing resistance
strengthens dumping.
130µ
120µ
270
31
2.5
4k
4k
40µ
PBDUMP2
4k
31
Pin to determine the dumping
level of CH2 playback by
external resistance.
Increasing resistance
strengthens dumping.
130µ
32
GND2
GND pin for CH2 REC
amplifier and PB amplifier.
0
–9–
CXA2002R
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
Description
1.2m
2.5k
33
PB2IN
0.7
CH2 playback input pin.
33
12k
1.5V
34
—
CH2 recording output pin.
Open collector.
1k
30
REC2OUT
5.7k
34
270
34k
35
REC2CONT
—
143
35
71k
40µ
40µ
66k
36
VCC2
EVR adjusting pin for the
CH2 recording dumping.
Reducing the applied voltage
strengthens dumping.
Power supply pin for CH2 REC
amplifier and PB amplifier.
4.75
20µ
143
37
37
VPPCMIN
2.45
50k
40µ
2.45V
– 10 –
VPSW input pin for recording
PCM path.
The Pin 38 signal is input
after cutting its DC
component with external C.
CXA2002R
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
Description
25µ
38
RECPCM
2.4
38
6k
Output pin for the recording
PCM path.
The recording PCM signal and
the recording ATF signal are
mixed and output.
180µ
220µ
10k
39
VREG
4.15
4.15V regulator output pin.
39
5p
20µ
143
40
40
VPVTRIN
2.45
50k
40µ
VPSW input pin for the
recording VIDEO path.
The Pin 41 signal is input
after cutting its DC
component with external C.
2.45V
40µ
41
RECVIDEO
2.4
41
6k
220µ
300µ
– 11 –
Output pin for the recording
VIDEO path.
The recording (Y + C + AFM +
ATF) mix signal is output.
CXA2002R
Pin
No.
GND
Pin
voltage
Equivalent circuit
Description
GND pin for all components
other than REC amplifier and
PB amplifier.
0
Pin to determine REC
amplifier gain.
The reference current is
produced by connecting
15kΩ between this pin and
GND.
40k
42
Symbol
1.9
20k
1k
IR1
40k
43
43
40µ
42k
4.15V
1.9
20k
1k
IR
40k
44
44
40µ
Pin to produce the reference
current for the middle tune,
dropout detector and ramp.
Connect 18kΩ between this
pin and GND.
4.15V
34.5k
270
45
VG2
2.45V internal reference
voltage source.
2.45
4k
75µ
4.15V
49k
45
20k
70µ
143
46
PCMIN
46
2.45
50k
2.45V
– 12 –
Recording PCM input pin.
Input after cutting DC
component with C.
Input level: 300mVp-p (typ.)
CXA2002R
Pin
No.
Symbol
Pin
voltage
Equivalent circuit
35µ
47
PCMREC
35µ
Description
35µ
—
143
47
PCM recording switchover pin.
PCM recording is performed
when this pin goes high.
High: 2.3V or above
Low: 0.6V or below
1.5V
70µ
143
48
ATFIN
48
2.45
50k
2.45V
– 13 –
Recording ATF input pin.
Input after cutting DC
component with C.
Input level: 125mVp-p (typ.)
IPB
IAFREC
VREG
VG2
Current consumption for
playback
Current consumption for afterrecording
VREG pin voltage
VG2 pin voltage
2
3
4
5
GYmin
GYcen
GYmax
VFY
DY
GlVmin
GlVcen
GlVmax
DAFM
Y signal GCA min. gain
Y signal GCA center gain
Y signal GCA max. gain
Y signal GCA frequency
response (center gain)
Y signal GCA secondary distortion (center gain)
Low-band signal GCA (VIDEO
path) min. gain
Low-band signal GCA (VIDEO
path) center gain
Low-band signal GCA (VIDEO
path) max. gain
AFM path secondary distortion
6
7
8
9
10
11
12
13
14
Recording system
IREC
Symbol
Current consumption for
recording
Item
1
No.
– 14 –
2
2
2
125mVpp 1.7MHz
125mVpp 1.7MHz
125mVpp 1.7MHz
A
A
A
A
A
7MHz
125mVpp 1.7MHz
500mVpp
6
A
A
A
A
A
A
I
G
A
41
41
41
41
41
41
41
41
41
45
39
IVCC1+
IVCC2
IVCC1+
IVCC2
IVCC1+
IVCC2
Measurement
Control point,
ammeter
logic
name
14MHz,
300kHz
200mVpp 300kHz
500mVpp 300kHz
500mVpp
2
—
—
—
—
—
Frequency
500mVpp 300kHz
—
—
—
—
—
Level
6
6
6
6
—
—
—
—
—
Input
pin
Input condition
Measurement conditions
–14.0
—
Pin 5 (LOWLEVEL) = 0.0V
Pin 7 (YLEVEL) = VYLEV
—
Adjust Pin 5 (LOWLEVEL) so that
Pin 41 (RECVIDEO) output level
becomes 12.5mVp-p → VILEV
Pin 7 (YLEVEL) = VYLEV
Pin 5 (LOWLEVEL) = 0.0V
Pin 7 (YLEVEL) = VYLEV
—
—
–1.5
Pin 5 (LOWLEVEL) = 3.15V
Pin 7 (YLEVEL) = VYLEV
Pin 7 (YLEVEL) = VYLEV
14MHz level/300kHz level
Pin 7 (YLEVEL) = VYLEV
–3.6
—
Adjust Pin 7 (YLEVEL) so that Pin
41 (RECVIDEO) output level
becomes 200mVp-p → VYLEV
Pin 7 (YLEVEL) = 0.0V
—
2.30
Pin 7 (YLEVEL) = 3.15V
Measure the pin voltage.
3.95
45
IC internal current (including REC
amplifier output bias current) during
after-recording.
Measure the pin voltage.
26
33
Min.
IC internal current during playback.
IC internal consumption current
(including REC amplifier output bias
current) during switched recording.
Measurement method
–55
–11.6
–20
–30.4
–55
–0.5
–1.3
–8.0
–23.2
2.45
4.15
64
37
47
Typ.
—
—
—
–26.0
—
+0.5
—
—
–14.1
2.60
4.35
83
48
61
Max.
dB
dB
dB
dB
dB
dB
dB
dB
dB
V
V
mA
mA
mA
Unit
Electrical Characteristics
∗ See the Control Logic Truth Table for control logic conditions. (Vcc = 4.75V, VccEVR = 3.15V, Ta = 25°C. See the Electrical Characteristics Measurement Circuit.)
CXA2002R
– 15 –
DP
PCM signal path secondary distortion
25
2ch
IB2
IB1
VFP
PCM signal path frequency
response
24
1ch
GP
PCM signal path gain
23
REC amplifier output
bias current
DC
Chroma signal GCA secondary
distortion (center gain)
22
26
VFC
21
Gccen
Chroma signal GCA center gain
19
Chroma signal GCA frequency
response (center gain)
Gcmin
Chroma signal GCA min. gain
18
Gcmax
GPATF2
ATF (PCM path) max. gain
17
Chroma signal GCA max. gain
GPATF1
ATF (PCM path) min. gain
16
20
GVATF
Symbol
ATF (VIDEO path) max. gain
Item
15
No.
—
46
46
46
4
4
4
4
4
48
48
48
Input
pin
Frequency
A
IB2
IB1
B
—
38
A
7MHz
300mVpp
—
38
A
38
41
41
41
41
41
38
38
41
14MHz
300kHz
A
A
A
A
A
A
A
A
A
Measurement
Control point,
ammeter
logic
name
300mVpp
300mVpp 300kHz
300mVpp 750kHz
2MHz
300mVpp
300kHz
300mVpp 300kHz
300mVpp 300kHz
300mVpp 300kHz
125mVpp 100kHz
125mVpp 100kHz
125mVpp 100kHz
Level
Input condition
Measurement conditions
Measure DC currents.
Pin 26 (REC1CONT),
Pin 35 (REC2CONT) = 3.3V
14MHz gain/300kHz gain
—
Pin 5 (LOWLEVEL) = VlLEV
Pin 7 (YLEVEL) = VYLEV
Pin 1 (CCONT) = VCLEV
18.8
23.05
mA
dB
—
–55
—
14.55
dB
dB
dB
dB
dB
dB
dB
dB
dB
dB
Unit
+0.8
–2.9
—
+0.5
—
—
–21.6
—
–26.0
—
Max.
0.0
–3.7
–50
0
–10.5
–15.6
–26.4
–11.9
–30.7
–11.6
Typ.
–0.8
–4.5
–0.5
Pin 5 (LOWLEVEL) = VlLEV
Pin 7 (YLEVEL) = VYLEV
Pin 1 (CCONT) = VCLEV
2MHz level/300kHz level
—
Adjust Pin 1 (CCONT) so that Pin
41 (RECVIDEO) output level
becomes 50mVp-p→VCLEV
Pin 5 (LOWLEVEL) = VlLEV
Pin 7 (YLEVEL) = VYLEV
–13.3
—
Pin 5 (LOWLEVEL) = VlLEV
Pin 7 (YLEVEL) = VYLEV
Pin 1 (CCONT) = 3.15V
Pin 5 (LOWLEVEL) = VlLEV
Pin 7 (YLEVEL) = VYLEV
Pin 1 (CCONT) = 0.0V
–14.0
—
–14.0
Min.
Pin 5 (LOWLEVEL) = 0.0V
Pin 5 (LOWLEVEL) = 3.15V
Pin 5 (LOWLEVEL) = 0.0V
Pin 7 (YLEVEL) = VYLEV
Measurement method
CXA2002R
Ramp rising slope 1
Ramp falling slope
29
30
– 16 –
See the
Measurement
method.
B
A
B
VAGC1
VAGC2
VAGC3
RFAGC standard output
RFAGC cover-range high
RFAGC cover-range low
34
35
36
2ch
GP2
10
10
10
33
896mVpp
56mVpp
224mVpp
7MHz
7MHz
7MHz
300kHz
G
G
G
H
G
200µVpp
28
GP1
1ch
Head amplifier
PCMOUT gain
H
G
300kHz
33
200µVpp
GV2
28
H
2ch
33
GV1
Head amplifier MTOUT
gain
1ch
2ch
8
8
8
16
14
34
27
34
27
34
27
34
27
B
A
34
27
A
B
K
22
See the
Measurement
method.
10MHz
1MHz
1MHz
1ch
Ton2
21
200mVpp
200mVpp
Level
Frequency
A
Toff
Ton1
40
40
Input
pin
Measurement
Control point,
ammeter
logic
name
2ch
1ch
2ch
1ch
VFR2
VFR1
1ch
2ch
IR2
IR1
2ch
1ch
Symbol
32
Playback system
Ramp rising slope 2
REC amplifier frequency
response
28
31
REC amplifier output
current
Item
27
No.
Input condition
Measurement conditions
L
2500µsec
H
H
Measure the output level, applying
a time constant to Pin 9
(RFAGCTC).
L
Slope: Toff
∗ Logic is inverted in
CH2 measurement.
Pin 15 (MTG) = 3.15V
Slope: Ton2
Output
Input
Slope: Ton1
Output
Input
2500µsec
10MHz level/1MHz level
Pin 26 (REC1CONT),
Pin 35 (REC2CONT) = 3.3V
Output level (Vp-p)/51 (Ω)
Measurement method
—
315
340
57.7
58.0
—
—
—
—
18.1
Min.
420
380
410
61.2
61.5
17
32
32
–0.2
20.7
Typ.
490
—
480
64.7
65.0
—
—
—
—
23.3
Max.
mVpp
mVpp
mVpp
dB
dB
µA/µs
µA/µs
µA/µs
dB
mApp
Unit
CXA2002R
– 17 –
Dropout OFF detection time
Dropout pulse high level
40
42
Dropout pulse low level
39
Dropout ON detection time
Dropout detection OFF level
38
41
Dropout detection ON level
Item
37
No.
Tdop-off
Tdop-on
Vdop-h
Vdop-l
Kdop-off
Kdop-on
Symbol
Level
Frequency
See the Measurement
method (figure to the
right).
See the Measurement
method (figure to the
right).
Input
pin
Input condition
G
12
12
12
G
G
12
12
G
G
12
G
Measurement
Control point,
ammeter
logic
name
Measurement conditions
Tdop-on
50µs
a
VDOP-l
VDOP-h
a b 224mVp-p
7MHz
Tdop-off
Pin 12 (DOP)
7M/224mVp-p
Pin 10 (RFAGCIN)
224
b
224
5kHz
Kdop-off = 20 log
Kdop-on = 20 log
Pin 12
(DOP)
Pin 10 (RFAGCIN)
10kHz
Apply a time constant to Pin 9 (RFAGCTC).
Measurement method
—
—
2.9
0
–9.5
–15.0
Min.
2
1.1
3.15
0.01
–6.5
–12.0
Typ.
—
—
3.4
0.2
–3.5
–9.0
Max.
µs
V
dB
Unit
CXA2002R
– 18 –
L
L
H
H
H
H
L
L
L
L
L
L
18 RP PB
L
L
L
L
L
L
H
H
H
H
H
H
A
B
C
D
E
F
G
H
I
J
K
H
21 RFSWP
22 RAMP
H
H
H
H
L
L
L
L
L
L
L
L
23 RAMPCONT
L
L
H
H
—
—
L
L
L
L
L
L
47 PCMREC
H
H
H
H
L
L
H
H
L
L
L
L
H
H
H
H
L
L
L
L
L
L
L
L
∗
∗
∗
∗
P
P
x
x
P
P
P
P
41 RECVIDEO
V
V
x
x
x
x
x
x
P
x
P
x
x
x
P
V
∆
V
V
V
38 RECPCM
V
V
V
V
x
P
x
P
x
x
V
P
V
∆
V
V
34 REC2OUT
x
x
x
x
x
x
O
O
O
x
O
x
x
x
x
x
x
x
O
O
x
O
x
O
: Not operating
: Video signal is selected.
: PCM signal is selected.
: CH1 signal is output.
: CH2 signal is output.
x
V
P
CH1
CH2
L : Control logic input voltage
— : Indenpendent of H and L
0.6V or below
(Description of operation mode)
O
: Operating
x
x
x
x
x
x
Hold
Hold
Hold
Hold
O
O
x
x
x
x
x
x
PB
PCM after-recording
After-recording
↓
↓
↓
REC
Mode
PB
↓
PCM REC
↓
VIDEO EACH REC
↓
VIDEO BOTH REC
↓
: Operating with no signal output
O
O
O
O
O
O
x
x
x
x
x
x
Operation
∆
: Operating with bias current turned off
Mute : Signal is muted.
Hold : Time constant is kept on hold.
∗
Mute Mute
Mute Mute
Mute Mute
Mute Mute
CH1 CH2
CH2 CH1
x
x
x
x
x
x
RAMPCONT = L : Recording bias current rising slope 32µA/µs (typ.)
RAMPCONT = H : Recording bias current falling slope 17µA/µs (typ.)
L
H
L
H
L
H
L
H
L
H
L
H
PB1chAmp
(Description of input conditions)
H : Control logic input voltage 2.3V or above
After-recording mode
20 BOTH REC
Control
logic
conditions
27 REC1OUT
Playback
16 PCMOUT
Recording
PB2chAmp
Operation of each section under respective input condition
14 MTOUT
Control logic input condition
AFREC
3
RFAGCOUT
8
Input
condition
and
operation
Dropout detector
Control Logic Truth Table
CXA2002R
A
VCC
4.75V
IVCC1
PB2IN
PB1IN
IB1
0.022µ
100µ
0.1µ
10µ
IB2
A
5.6µ
GND2
VCC2
REC2CONT
51∗
REC2OUT
0.01µ
PB2IN
390
PBDUMP2
390
PBDUMP1
GND1
0.01µ
PB1IN
51∗
A REC1OUT
REC1CONT
5.6µ
0.022µ
REC2CONT
49
49
REC1CONT
1
1
VCC1
36
35
34
33
32
31
30
29
28
27
26
25
37
24
23
REC
38
40dB
HEAD
HEAD
40dB
REC
0.01µ
10µ
MTQ
VPPCMIN
MTQ
VPPCMIN
RAMPCONT
RECPCM
51
22
39
RAMP
GEN
V/I
15dB
15dB
V/I
RAMP
GEN
RAMP
VREG
RAMPCONT
RECPCM
RAMP
10µ
21
40
RFSWP
VPVTRIN
0.1µ
2CH
2CH
PCM
41
PCM
VIDEO
0.1µ
42
PCMSW
18
43
YGCA
VIDEOSW
MUTE
1CH
MUTE
1CH
19
VPSW1
VIDEO
20
VPSW2
BOTH REC
51 RECVIDEO
RFSWP
VPVTRIN
10µ
VCC
GND
10µ
RP PB
IR1
BOTH REC
RECVIDEO
MTF0
IR
RP PB
15k∗
44
2
1
17
1
1
RF
AGC
M·T
–6dB
PCMOUT
45
16
VG2
MTF0
18k∗
PCMOUT
10µ
15
46
LOWGCA
LOWGCA
AGCDET
12dB
MTG
PCMIN
0.1µ
1
1
47
13
0.1µ
48
CGCA
DOCDET
14
1
MTOUT
PCMREC
51
0.1µ
0.01µ
MTOUT
PCMREC
MTG
PCMIN
10µ
VCC EVR
ATFIN
100µ
ATFIN
– 19 –
0.01µ
0.01µ
DOP
1
2
3
4
5
6
7
8
9
CCONT
AFMIN
AFREC
0.01µ
CIN
LOWLEVEL
0.01µ
YIN
YLEVEL
51
51
51
51
∗
RFAGCOUT
RFAGCTC
0.01µ
RFAGCIN
DOP
0.1µ
10µ
0.01µ
RFAGCTC
Resistance accuracy 1%
Control logic pin
EVR adjusting pin
Signal input pin
Signal output pin
CCONT
AFMIN
AFREC
CIN
LOWLEVEL
YIN
YLEVEL
RFAGCOUT
4700p
470k
RFAGCIN
VCC EVR
3.15V
A IVCC2
11 DOCDET
12
10
10µ
51
Electrical Characteristics Measurement Circuit
CXA2002R
CH1 HEAD
CH2 HEAD
100µ
0.1µ
10µ
390
390
10µ
0.1µ
100µ
VCC2
REC2CONT
REC2OUT
0.01µ
PB2IN
GND2
0.022µ
PBDUMP2
0.022µ
PBDUMP1
GND1
0.01µ
PB1IN
REC1OUT
REC1CONT
VCC1
36
35
34
33
32
31
30
29
28
27
26
25
REC2CONT
37
23
RAMPCONT
40dB
REC
REC
0.01µ
38
40dB
HEAD
HEAD
REC1CONT
24
MTQ
VPPCMIN
RAMPCONT
RECPCM
RFSWP
RAMP
39
RAMP
GEN
V/I
15dB
15dB
V/I
RAMP
GEN
22
RAMP
VREG
BOTH REC
0.1µ
RP PB
40
21
RFSWP
VPVTRIN
10µ
41
PCM
VIDEO
VPSW2
PCM
42
PCMSW
18
43
YGCA
VIDEOSW
MUTE
1CH
MUTE
1CH
19
10µ
44
2
1
17
1
1
RF
AGC
M·T
–6dB
45
16
46
LOWGCA
LOWGCA
AGCDET
12dB
15
1
1
47
1
13
48
CGCA
DOCDET
14
AFM TRAP
0.01µ
DOP
0.01µ
1
2
3
4
5
6
7
8
9
10
CCONT
AFMIN
AFREC
0.01µ
CIN
LOWLEVEL
0.01µ
YIN
YLEVEL
RFAGCOUT
RFAGCTC
RFAGCIN
11 DOCDET
12
ATF TRAP
4700p
470k
C TRAP
RF EQ
RFGND
PCMREC
AFREC
PCMIN
ATFIN
AFMIN
CIN
YIN
CCONT
LOWLEVEL
YLEVEL
MTG
MTF0
MTQ
DOP
RFVCC2
RFVCC1
RFAGCOUT
PCM OUT
PB RF
PB C RF
LOGIC
SIGNAL IN
EVR
SIGNAL OUT
Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for
any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same.
0.01µ
2CH
2CH
VPSW1
VIDEO
20
BOTH REC
RECVIDEO
100µ
VCC
GND
0.1µ
RP PB
IR1
MTF0
IR
LOGIC
18k
EVR
15k
PCMOUT
VG2
0.1µ
MTG
PCMIN
10µ
MTOUT
PCMREC
– 20 –
ATFIN
VCC EVR
Application Circuit
CXA2002R
CXA2002R
Description of Operation
<Mix amplifier + recording level adjustment>
Y, chroma, AFM, ATF and PCM signals are input at specified levels so that they are mixed internally to achive
an appropriate current value at the head. The VIDEO path signal (Y + chroma + AFM + ATF) is output to Pin
41 (RECVIDEO) and the PCM path signal (PCM + ATF) to Pin 38 (RECPCM). The Y level is EVR-adjusted at
Pin 8 (YLEVEL) and the low band (chroma, AFM, ATF) level at Pin 5 (LOWLEVEL). The low-band levels of the
video path and the PCM path are interlocked in adjustment.
<SW + recording amplifier>
The VIDEO path signal and the PCM path signal, which underwent recording level adjustment, are switched at
a correct timing, then converted to a current to drive the head.
A feedback dumping circuit is incorporated to inhibit head resonance, and the peaking can be adjusted by EVR
at Pin 26 (REC1CONT), Pin 35 (REC2CONT).
During recording, the output capacitance is about 12pF including that of the head amplifier.
<SW + middle tune>
This section switches the playback signals of CH1
and CH2 at the correct timing and outputs the
playback VIDEO signal to Pin 14 (MTOUT) and
the playback PCM signal to Pin 16 (PCMOUT). In
the PCM after-recording mode, both playback
VIDEO signal and playback PCM signal are muted
during the PCM recording period.
The middle tune circuit corrects the frequency
response of the playback VIDEO signal.
The center frequency can be adjusted by EVR at
Pin 17 (MTF0), Q at Pin 24 (MTQ) and the boost
at Pin 15 (MTG).
The figure to the right shows the center condition
that sets f0 = 8MHz, Q = 2.5 and the boost = 6dB.
Each control characteristics shown in "Example of
Representative Characteristics" is obtained when
two of them are fixed to the center condition.
Gain
<Head amplifier>
The playback signal from the head is amplified with low noise and high gain. A feedback dumping circuit is
incorporated to inhibit head resonance, and the peaking can be adjusted by external resistors connected to Pin
30 (PBDUMP1), Pin 31 (PBDUMP2).
During playback, the input capacitance is about 20pF including that of the recording amplifier.
3dB
Boost amount
= 6dB
f1
f2
Center frequency f0 = 8MHz
Q = f0 / (f2 – f1) = 2.5
Frequency
<RFAGC>
This circuit inputs the playback Y signal separated from the playback VIDEO signal using an external circuit
and outputs it at a constant level of 410mVp-p. In the PCM after-recording mode, RFAGC gain is kept
unchanged during PCM recording period.
<Dropout detection>
A dropout is detected in the playback Y signal, and a dropout pulse is output. The detection level is optimized
using 224mVp-p input as a reference. If necessary, the detection level can be adjusted by inputting a DC
voltage to Pin 11 (DOCDET). To make this adjustment, input a voltahe proportional to the output voltage of Pin
39 (VREG).
– 21 –
CXA2002R
<Control logic block>
This IC exercises power-saving control of circuit blocks which are not in immediate need for operation. The IC
also incorporates a logic circuit for controlling a number of SWs which change inputs and outputs at
complicated timing.
The combinations of input and output in the basic operation are shown in the "Control Logic Truth Table".
<Reference voltage in the IC>
VG2 2.45V and VREG 4.15V are generated as a reference voltages used in the IC.
VG2 cannot be used outside the IC. VREG cannot also be used outside the IC except for adjusting the dropout
detection level at Pin 11 (DOCDET).
Notes on Operation
1. This IC is characterized by high-voltage gain (about 61dB in the playback system). Pay attention to the
following when using the IC.
1) Use reinforced power supply and ground lines. Decouple the power supply pin with a coil and a
capacitor. Connect the decoupling capacitor as close to the pin as possible.
2) Use of a regulator power supply is recommended.
3) Connecting a capacitive load to the output may cause oscillation.
4) Take particular care not to make capacitive coupling between the head amplifier input and the playback
output. Also be careful not to make capacitive coupling between the recording input and the recording
amplifier output.
5) Use of decoupling capacitors is recommended between the following DC voltage input pins and GND.
When the control voltage source is at high impedance, aggravation of cross talk or oscillation is feared to
occur.
Pin 1 (CCONT), Pin 5 (LOWLEVEL), Pin 7 (YLEVEL)
Pin 9 (RFAGCTC) [not when time constant is connected], Pin 11 (DOCDET)
Pin 17 (MTF0), Pin 24 (MTQ), Pin 26 (REC1CONT)
Pin 35 (REC2CONT)
6) When a decoupling capacitor is necessary for other pins (not power supply pin), it is recommended to
connect each decoupling capacitor as close as to the pin as possible.
2. When Pin 13 (EVR Vcc) is used for 5V system (4.75
or larger than that of Pin 13 (EVR Vcc).
+0.5V
–0.25V
), the voltage of Pin 19 (Vcc) should be equal to
3. The voltage input to the EVR adjusting pin should be proportional to the EVR Vcc voltage. Control the input
voltage in the range from 0V to 3.15V when EVR Vcc = 3.15V.
For EVR adjustment at Pin 26 (REC1CONT) and Pin 35 (REC2CONT), control the input voltage in the range
from 1.8V to 4.75V when Vcc = 4.75V, in proportion to the supply voltage Vcc; at Pin 9 (RFAGCTC), control
the input voltage in the range from 2.5V to 4.75V.
– 22 –
CXA2002R
Example of Representative Characteristics
YGCA gain control
LOWGCA (VIDEO path) gain control
–10
Pin 48 (ATFIN) → Pin 41 (RECVIDEO) gain [dB]
Pin 2 (AFMIN) → Pin 41 (RECVIDEO) gain [dB]
Pin 6 (YIN) → Pin 41 (RECVIDEO) gain [dB]
0
–5
–10
–15
–20
VCC = 4.75V
EVR VCC = 3.15V
1.0
2.0
–15
–20
–25
–30
3.0
VCC = 4.75V
EVR VCC = 3.15V
1.0
2.0
Pin 7 (YLEVEL) voltage [V]
Pin 5 (LOWLEVEL) voltage [V]
LOWGCA (PCM path) gain control
CGCA gain control
3.0
Pin 4 (CIN) → Pin 41 (RECVIDEO) gain [dB]
Pin 48 (ATFIN) → Pin 38 (RECPCM) gain [dB]
–10
–15
–20
–25
–30
VCC = 4.75V
EVR VCC = 3.15V
1.0
–10
–15
–20
–25
2.0
3.0
VCC = 4.75V
EVR VCC = 3.15V
1.0
Pin 5 (LOWLEVEL) voltage [V]
2.0
Pin 1 (CCONT) voltage [V]
– 23 –
3.0
CXA2002R
Middle tune fo control
Middle tune Q control
6
5
4
Q
10
3
5
2
1
VCC = 4.75V
EVR VCC = 3.15V
1.0
2.0
VCC = 4.75V
EVR VCC = 3.15V
3.0
1.0
Pin 17 (MTF0) voltage [V]
15
10
5
0
2.0
Pin 24 (MTQ) voltage [V]
Middle tune boost control
Boost [dB]
Center frequency fo [MHz]
15
VCC = 4.75V
EVR VCC = 3.15V
1.0
2.0
Pin 15 (MTG) voltage [V]
– 24 –
3.0
3.0
CXA2002R
Package Outline
Unit : mm
48PIN LQFP (PLASTIC)
9.0 ± 0.2
∗
7.0 ± 0.1
36
S
25
13
0.5 ± 0.2
B
A
48
(8.0)
24
37
(0.22)
12
1
+ 0.05
0.127 – 0.02
0.5
+ 0.08
0.18 – 0.03
+ 0.2
1.5 – 0.1
0.13 M
0.1
S
0.5 ± 0.2
(0.18)
0° to 10°
DETAIL B:SOLDER
DETAIL A
0.18 ± 0.03
0.127 ± 0.04
+ 0.08
0.18 – 0.03
(0.127)
+0.05
0.127 – 0.02
0.1 ± 0.1
DETAIL B:PALLADIUM
NOTE: Dimension “∗” does not include mold protrusion.
PACKAGE STRUCTURE
PACKAGE MATERIAL
EPOXY RESIN
SOLDER/PALLADIUM
PLATING
SONY CODE
LQFP-48P-L01
LEAD TREATMENT
EIAJ CODE
LQFP048-P-0707
LEAD MATERIAL
42/COPPER ALLOY
PACKAGE MASS
0.2g
JEDEC CODE
– 25 –