CXA2022S I2C Bus Sound Processor for TV Description The CXA2022S is a bipolar IC designed as an I2C bus control sound processor for TV. This IC has simulate stereo, surround, tone control, balance, volume, muting, AGC and other functions. 30 pin SDIP (Plastic) Features • Allows control by I2C bus • Employs a special surround system to prevent "vocal missing" in the surround mode • Adopts an AGC circuit to absorb the difference in sound level between input sources and improves S/N ratio of hearing characteristics Absolute Maximum Ratings • Supply voltage • Operating temperature • Storage temperature • Allowable power dissipation VCC 14 Topr –20 to +75 Tstg –65 to +150 PD 1.25 Recommended Operating Condition Supply voltage 8 to 13 Structure Bipolar silicon monolithic IC Applications TVs V °C °C W V L IN VCC CL L CH L VRS MVFO MVFI PS3B CC L LOUT PS3A PS1B PS2B PS2A DET1 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 R IN GND CL R CH R BAL TRE BASS VOL CC R ROUT PS1A DET2 HPF SCL SDA Pin Configuration Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E95Y17A7X R IN 1 L IN 30 DET2 R R R R SS MS/OFF SS MS/OFF MVFO 26 VCC/2 VRS DET1 AGC DET L-R LPF 2 GND 13 VCC SS MS 11 19 PS1 MS SS PS1B HPF PS1A 29 17 18 PS2 SS SS OFF MS MS/OFF EFFECT M -EFF MIX VOCAL-MIX PS3B PS3A LPF PS3 20 23 SS-1 SS-2 9 22 CH L 28 4 3 7 VCA TONE 6 DAC VOL BAL VCA BASS TRE TONE 27 CH R MVFI 24 PS2A 25 TRE 12 PS2B CL L BASS 16 CL R 5 BAL I2C BUS SOUND PROCESSOR CC R VOL 8 14 15 BUS DEC R OUT L OUT 10 21 Description of internal switches MS … Monaural Surround (Simulate Stereo) SS … Stereo Surround 1,2 SS-1 … Stereo Surround 1 SS-2 … Stereo Surround 2 OFF … Surround OFF SDA –2– SCL Block Diagram CXA2022S CC L CXA2022S Pin Description Pin No. Symbol (Ta = 25°C, VCC = 12V) Pin voltage Equivalent circuit Description VCC 10µ 1 30 R IN L IN 130 10k 6V Input pins. 1 30k 30 VCC/2 2 GND 0V GND VCC 250µ 3 28 CL R CL L 250µ 5.4k External pins for LPF capacitance (BASS). 11k 6V 11k 3 130 28 VCC/2 VCC 250µ 250µ 4 27 CH R CH L 6k 5.7k 6V External pins for HPF capacitance (TREBLE). 5.7k 4 27 130 VCC 40k 20k 5 6 7 8 BAL TRE BASS VOL 5 4.5V 7.5V 2k 6 7 8 2k 75µ –3– DAC output pins. Connect LPF capacitance of DAC. Internal impedance is approximetely 20kΩ. CXA2022S Pin No. Symbol Pin voltage Equivalent circuit Description VCC 9 22 CC R CC L 6V 500 20k 1k 20k 1k 500 1k DC-cut pins for L and R. Internal impedance is approximately 20kΩ. 9 22 VCC 500 5P 10 21 ROUT LOUT 130 6V Output pins. 10 84k 21 500 VCC 10µ 11 17 18 19 20 23 PS1A PS2A PS2B PS1B PS3A PS3B 11 17 6V External capacitance pins for surround phaseshifter. Internal impedance is approximately 18kΩ. 18k 130 18 18k 19 20 23 VCC 200 12 DET2 10k 200 AGC detector output and control pin. 12 130 100k –4– 100k CXA2022S Pin No. Symbol Pin voltage Equivalent circuit Description 10µ 500 13 HPF 130 6V HPF external capacitance pin of AGC. 10k 13 500 16k 16k VCC 50µ 14 100µ 14 SCL I2C bus clock line pin. 4k 3k 11k 56k VCC 50µ 15 100µ I2C bus data line pin. 15 SDA 4k 3k 4.5k 56k VCC 40k 16 16 DET1 AGC detector output pin. Connect capacitance for setting time constant. 7.8V 2k –5– CXA2022S Pin No. Symbol Pin voltage Equivalent circuit Description VCC 5µ 5µ 22k 10k 24 MVFI 6V 10k 22k External pin for surround filter. 24 130 18k 39k VCC 500 130 25 MVFO 6V External pin for surround filter. 25 500 VCC 16k 16k 30k 26 VRS 6V VCC/2 reference voltage pin. 1k 26 30k 29 VCC 12V 30µ Power supply. –6– R IN R IN R1 10k 2 C1 4.7µ GND 1 3 C3 0.1µ 4 C5 4700P C9 4.7µ 7 TRE 6 C7 4.7µ BASS BAL 5 C11 4.7µ 8 VOL C14 4.7µ CXA2022S 9 C15 4.7µ CC R 10 C17 10µ ROUT R4 10k S1 C24 10µ C21 10µ R6 1MEG 12 PS1A C19 4700P 11 C26 0.1µ SCL 14 13 16 17 18 19 20 21 S3 L IN C27 0.1µ 22 S2 C25 0.022µ 23 S4 C23 4700P VCC C20 8200P 24 S5 C18 10µ CL L VCC C28 10µ PS2A 25 S6 C16 4.7µ PS2B CH L C13 8200P PS1B 26 S7 R3 820k C22 10µ PS3A 27 C8 47µ R5 10k LOUT VRS 28 C6 4700P CC L MVFO 29 C4 0.1µ PS3B MVFI 30 C2 4.7µ C10 0.1µ C12 10µ MVFI PS3B CL R CC L CH R LOUT CC R PS3A ROUT PS1B PS1A PS2B DET2 PS2A SDA 15 SDA DET1 HPF –7– SCL L IN R2 10k Electrical Characteristics Measurement Circuit C29 4.7µ CXA2022S CXA2022S Control Register Table (SLAVE ADDRESS = 82H) (Power ON setting value) DATA bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 VOLUME (00) ∗ BASS (00) bit 1 bit 0 MUTE (0) AGC (0) MODE (00) ∗ TREBLE (00) ∗ BALANCE (00) SURR-EFFECT (00) MONO-EFFECT (00) VOCAL-MIX (00) ∗ MODE : 00 = Surround OFF : 01 = Simulate Stereo : 10 = Stereo Surround 1 : 11 = Stereo Surround 2 ∗ Undefined Description of Register • VOLUME: Common to both L and R channels 0 = Minimum 3F = Maximum • MUTE: MUTE switch 0 = Mute OFF 1 = Mute ON (muting state) • AGC: AGC switch 0 = AGC OFF 1 = AGC ON • BASS: Low frequency control 0 = Minimum 10 = Typical 1F = Maximum • MODE: Surround mode setting 00 = Surround OFF 01 = Simulate Stereo (Monaural Surround) 10 = Stereo Surround 1 11 = Stereo Surround 2 • TREBLE: High frequency control 00 = Minimum 10 = Typical 1F = Maximum –8– AGC : 0 = OFF/1 = ON MUTE : 0 = OFF/1 = ON CXA2022S • BALANCE: Balance control for L and R channels 00 = L channel (Minimum), R channel (Maximum) 20 = Typical 3F = L channel (Maximum), R channel (Minimum) • SURR-EFFECT: Effect setting for Stereo Surround 1 and 2 0 = Minimum 8 = Typical F = Maximum • MONO-EFFECT: Effect setting for Simulate Stereo (Monaural Surround) 0 = Minimum F = Maximum • VOCAL-MIX: Addition amount setting of middle frequency for Stereo Surround 1 and 2 0 = Minimum 8 = Typical F = Maximum Application Circuit L IN L OUT VCC C10 0.1µ 24 CH L VRS MVFO MVFI 23 22 21 19 20 C24 0.1µ C23 0.022µ 18 17 C25 4.7µ 16 DET1 25 C21 4700P PS2A 26 C19 8200P PS2B 27 C17 10µ PS1B 28 CC L 29 PS3B 30 C15 4.7µ PS3A C13 8200P R1 820k LOUT C8 47µ CL L C6 4700P VCC C4 0.1µ L IN C2 4.7µ R IN GND CL R CH R BAL TRE BASS VOL CC R ROUT PS1A DET2 HPF SCL SDA CXA2022S 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 C1 4.7µ C3 0.1µ C5 4700P C7 4.7µ C9 4.7µ C11 4.7µ C12 4.7µ C14 4.7µ C16 10µ C18 4700P C20 10µ C22 0.1µ R3 220 R4 220 R2 1MEG R IN R OUT SCL SDA Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. –9– VR L, R VMIN L, R REF, Level L, R VOL MIN L, R 3 4 – 10 – 15 14 Distortion L, R CUT R BALANCE Vdist VBAL CUT R 3F VBAL BST R BALANCE BOOST R 13 10 20 3F 0 VBAL CUT L BALANCE CUT L 12 10 1kHz 2.4Vrms 10kHz 2.4Vrms VBAL BST L 0 BALANCE BOOST L 0 11 100Hz 2.4Vrms 10kHz 2.4Vrms 100Hz 2.4Vrms 1kHz 2.4Vrms VCUT HF L-IN R-IN TREBLE CUT 10kHz 8 10 8 100Hz 2.4Vrms 8 VCUT LF 3F 20 S-EFF M-EFF V-MIX BASS CUT 100Hz 1F 10 BAL 9 0 TRE 10kHz 2.4Vrms 1F 10 BASS MODE TREBLE BOOST VBST HF 10kHz 0 AGC 8 0 MUTE LOUT ROUT ROUT LOUT LOUT ROUT MeasureSW set Input ment Input signal to ON point point BASS BOOST 100Hz VBST LF 20 0 20 3F VOL Input conditions 7 6 FLAT f characteristics VLF L, R 100Hz FLAT f characteristics VHF L, R 10kHz VF L, R FLAT L, R 2 5 ICC Current consumption 1 Signal Measurement item No. Electrical Characteristics REF: VR L, R REF: INPUT Remarks — — 0 — 0 –13.5 –13.5 8.5 8.5 –1.5 –1.5 — –17 –2.0 20 Min. — — 1.2 — 1.2 –11 –11 11 11 0 0 — –14 0 35 Typ. 2.0 –30 2.0 –30 2.0 –8.5 –8.5 13.5 13.5 1.5 1.5 –70 –11 2.0 55 Max. % dB dB dB dB dB dB dB dB dB dB dB dB dB mA Unit (Ta = 25°C, VCC = 12V) CXA2022S VCT L, R VCT R, L VNOI L, R VGCB L, R VGCB2 L, R VGCN L, R VGCC L, R MFL L MFL M MFL H MMX L, R SDG L SDG R SMX L Crass-Talk L→R Crass-Talk R→L NOISE LEVEL L, R AGC BOOST L, R AGC BOOST L, R AGC NULL L, R AGC CUT L, R MONO FIL 100HZ MONO FIL 500HZ MONO FIL 10kHz MS MIX LEVEL L, R SS DIF GAIN L SS DIF GAIN R SS MIX LEVEL L 17 18 19 20 21 22 23 24 25 26 27 28 29 30 Signal VMT L, R Measurement item 16 Mute L, R No. 1 3F 0 MUTE VOL – 11 – 0 1 1 0 1 0 1 0 0 0 AGC 10 2 3 2 1 0 BASS MODE 10 TRE Input conditions 20 BAL F 8 8 F 8 8 S-EFF M-EFF V-MIX PS1A R-IN L-IN PS1A L-IN R-IN R-IN L-IN L-IN R-IN 1kHz 350mVrms 1kHz 2.5Vrms 1kHz 350mVrms 10kHz 1.25Vrms 500Hz 1.25Vrms 100Hz 1.25Vrms 1kHz 2Vrms 1kHz 160mVrms PS2B SW1 SW4 SW1 LOUT PS1B LOUT ROUT REF: INPUT REF: AGC-OFF (0) REF: AGC-OFF (0) REF: AGC-OFF (0) 1kHz 50mVrms REF: VFL REF: VFR REF: INPUT REF: AGC-OFF (0) SW2 LOUT ROUT LOUT ROUT LOUT ROUT Remarks 1kHz 10mVrms 1kHz 2.4Vrms MeasureSW set Input ment Input signal to ON point point 13 –4 –4 13 –1.5 –18 –11 –24 –2.5 5 0.5 — — — — Min. 16 –2 –2 16 1.0 –15.5 –8.5 –20 –0.5 7 3 — — — — Typ. 19 0 0 19 3.5 –13 –6 –16 2 10 5.5 –60 –70 –70 –70 Max. dB dB dB dB dB dB dB dB dB dB dB dBm dB dB dB Unit CXA2022S – 12 – DC OFF-Set DOSS2M L, R SS2 → MS-L, R DOSS1M VMINNO L, R DC OFF-Set SS1 → MS-L VOL MIN NOISE L, R 40 41 42 DOOSS2 DC OFF-Set OFF → SS2-L SS2MX 36 SS2-MIX 39 VMX L, R V-MIX L, R 35 DC OFF-Set DOOSS1L, R OFF → SS1-L, R VFIL H V-FIL 10kHz 34 38 VFIL M V-FIL 1kHz 33 DC OFF-Set DOOM OFF → MS-L, R VFIL L V-FIL 100HZ 32 37 SMX R SS MIX LEVEL R 31 Signal Measurement item No. 0 3F VOL 0 MUTE 0 AGC 10 0 1 1 2 3 3 2 0 1 0 0 3 2 3 2 3 BASS MODE 10 TRE Input conditions 20 BAL 8 F F 8 8 F 8 S-EFF M-EFF V-MIX PS3A MVFI L-IN R-IN PS1A 1kHz 500mVrms 10kHz 2.5Vrms 1kHz 2.5Vrms 100Hz 2.5Vrms 1kHz 350mVrms SW5 SW7 SW6 SW1 LOUT ROUT LOUT LOUT ROUT LOUT LOUT ROUT LOUT LOUT ROUT PS3B ROUT MeasureInput SW set ment Input signal point to ON point 30kHz LPF REF: MODE2 REF: MODE3 REF: MODE0 REF: INPUT Remarks — –150 –150 –150 –150 –150 11 10.5 –10.5 –3 –7.5 13 Min. –92 0 0 0 0 0 14 13.5 –8 –0.5 –5 16 Typ. –85 150 150 150 150 150 17 16.5 –5.5 2 –2.5 19 Max. dBm mV mV mV mV mV dB dB dB dB dB dB Unit CXA2022S CXA2022S Description of Operation • AGC circuit The AGC circuit is provided at the input. When AGC is set to ON, this circuit is 0dB for small signal input, boosts for medium signal input, and achieves gain reduction for large signal input. The sound level defference between input sources can be absorbed at this circuit. • Surround circuit The surround circuit provides three modes; MONO (Simulate Stereo), STEREO-1 and STEREO-2. MONO mode L + R signals, passed through the mono filter and then through four stages of phase shifters (PS1A, PS1B, PS2A, PS2B) and 9kHz LPF, are added to L and R channels at opposite phase to each other. The surround effect can be changed by the MONO-EFFECT. STEREO-1 mode L-R signals, passed through two stages of phase shifters (PS1A, PS1B) and 9kHz LPF, are added to L and R channels at opposite phase to each other. The surround effect can be changed by the SURR-EFFECT. In addition, L + R signals passed through the middle frequency BPF (1kHz BPF) are added to L and R channels at in-phase to each other to prevent "vocal missing" in the surround mode. The addition amount of middle frequency can be changed by the VOCAL-MIX. STEREO-2 mode L-R signals, passed through two stages of phase shifters (PS1A, PS1B) and 9kHz LPF, are added to L and R channels at opposite phase to each other. The surround effect can be changed by the SURR-EFFECT. In addition, L + R signals passed through the middle frequency BPF (1kHz BPF) are added to R channel, and the middle frequency signals passed further through two stages of phase shifters (PS3A, PS3B) are added to the L channel. The addition amount of middle frequency (L and R) can be changed by the VOCAL-MIX. Phase Shifter Each of the phase shifters PS1, PS2 and PS3 consists of two stages of phase shifters (A, B). The transfer function for a stage of phase shifter is expressed by the following equation. VO = 1 – SCR Vin 1 + SCR R: Internal resistance ≈ 18kΩ, C: External capacitance • TONE circuit Provides tone controls for BASS and TREBLE. The external capacitance of CL for BASS and CH for TREBLE can determine the characteristics. The number of steps is 32. • BALANCE and VOLUME circuit Provides controls for BALANCE and VOLUME. the number of steps is 64 each. • DAC circuit Provides controls for BASS, TREBLE, VOLUME and BALANCE. The internal impedance is approximately 20kΩ and the LPF capacitance is used externally. – 13 – CXA2022S Example of Representative Characteristics TONE characteristics 20 OUT L, R [dB] BASS-TREBLE MAX. 10 0 BASS-TREBLE MIN. –10 –20 10 100 1k 100k 10k Frequency [Hz] CH. vs. TREBLE-CONTROL (MAX) 17.5 15.0 OUT L, R [dB] 12.5 0.047µ 0.022µ 10.0 2200p 7.5 4700p 5.0 2.5 470p 0.0 –2.5 10 100 1k 10k 100k 10k 100k Frequency [Hz] CH. vs. BASS-CONTROL (MAX) 17.5 15.0 OUT L, R [dB] 12.5 10.0 0.01µ 0.1µ 7.5 0.047µ 1µ 5.0 0.47µ 2.5 0.0 –2.5 10 100 1k Frequency [Hz] – 14 – CXA2022S VOL CONTROL characteristics BALANCE CONTROL characteristics 0 0 –10 –10 OUT R OUT L, R [dB] OUT L, R [dB] –20 –30 –40 –50 –20 –30 –40 –50 –60 –70 –60 –80 –70 10 20 30 –80 3F 0 10 BUS Data (VOL) BASS CONTROL characteristics 30 3F TREBLE CONTROL characteristics 12 10 Input = 100Hz 8 6 4 OUT L, R [dB] 6 4 2 0 –2 2 0 –2 –4 –4 –6 –6 –8 –8 –10 –10 –12 Input = 10kHz –12 0 4 8 C 10 14 18 1C 1F 0 BUS Data (BASS) 4 8 C 10 14 18 BUS Data (TREBLE) AGC characteristics 1V AGC = OFF AGC = ON 100mV OUT [rms] OUT L, R [dB] 8 20 BUS Data (BALANCE) 12 10 OUT L 10 10 100mV IN [rms] – 15 – 1V 1C 1F CXA2022S Package Outline Unit : mm + 0.1 .05 0.25 – 0 30PIN SDIP (PLASTIC) + 0.4 26.9 – 0.1 30 + 0.3 8.5 – 0.1 10.16 16 0° to 15° 15 1 + 0.4 3.7 – 0.1 0.5 MIN 1.778 0.5 ± 0.1 3.0 MIN Two kinds of package surface: 1.All mat surface type. 2.All mirror surface type. 0.9 ± 0.15 PACKAGE STRUCTURE MOLDING COMPOUND EPOXY RESIN SOLDER/PALLADIUM PLATING SONY CODE SDIP-30P-01 LEAD TREATMENT EIAJ CODE SDIP030-P-0400 LEAD MATERIAL COPPER ALLOY PACKAGE MASS 1.8g JEDEC CODE NOTE : PALLADIUM PLATING This product uses S-PdPPF (Sony Spec.-Palladium Pre-Plated Lead Frame). – 16 –