CXA2093S Sharpness for Display Description The CXA2093S is a bipolar IC which performs contour accentuation for display RGB signals. 22 pin SDIP (Plastic) Features • Sharpness time constant selection (50ns/100ns) • Built-in sync separator for sync on green • Differential output pins • Built-in wide-band amplifier (200MHz/–[email protected]) Applications Display Structure Bipolar silicon monolithic IC Absolute Maximum Ratings (Ta = 25°C, GND = 0V) • Supply voltage VCC 7 V • Operating temperature Topr –20 to +75 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation PD 1.13 W Operating Conditions Supply voltage VCC 5 ± 0.25 V Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E97680A26-PS CXA2093S Block Diagram CLAMP f0/GAIN 13 12 VILMAX = 0.8V VIHMIN = 2.8V Y = 0.6G + 0.3R + 0.1B Y operation RIN 1 GIN 3 BIN 5 SYNCIN 7 Switching identification 1st-order differential (50ns) 1st-order differential (100ns) GAIN Min. GAIN Max. 0.5V to 2.0V ; 50ns 3.0V to 4.5V ; 100ns Limiter GCA 15 DIFOUT 21 ROUT 19 GOUT 17 BOUT 14 SYNCOUT Limiter level = 30% Time constant selection CLAMP SyncSep Pin Configuration RIN 1 22 GND GND 2 21 ROUT GIN 3 20 GND GND 4 19 GOUT BIN 5 18 VCC VCC 6 17 BOUT SYNCIN 7 16 VCC GND 8 15 DIFOUT NC 9 14 SYNCOUT GND 10 13 CLAMP 12 F0_GAIN NC 11 –2– CXA2093S Pin Description Pin No. Symbol Pin voltage Equivalent circuit VCC VCC VCC VCC Description VCC VCC VCC 250 1 3 5 RIN GIN BIN 1 RGB input pins. Input these pins through capacitor. 3 150 5 500 2, 4 8, 10 20, 22 GND pins. GND VCC VCC 7 SYNCIN VCC VCC Sync input pin for sync on green. Input this pin through capacitor. 7 150 100µA VCC VCC VCC 30k 12 F0_GAIN Sharpness time constant selection and gain control pin. 12 143 30k VCC VCC 50k Clamp pulse input pin. 13 CLAMP 13 30k 20k –3– ILMAX; 0.8V IHMIN; 2.8V CXA2093S Pin No. Symbol Pin voltage Equivalent circuit VCC 14 SYNCOUT Description VCC VCC VCC Sync output pin. 0 to 4.3V positive polarity pulse is output in synchronizing with sync. 14 150 VCC VCC VCC 1p 15 DIFOUT 625 15 Differential signal output pin. 2mA 6, 16 18, 20 VCC 5V (applied) Power supply pins. VCC VCC VCC 1p 19 21 23 BOUT GOUT ROUT 19 21 625 23 6mA –4– RGB signal output pins. CXA2093S Electrical Characteristics No. Item Symbol (Ta = 25°C, VCC = 5V) MeasureInput signals ment pins Measurement contents Min. Typ. Max. Unit 45 69 95 mA 0.5 1.5 dB 0.5 1.5 dB 0.5 1.5 dB Vp-p 1 Power consumption ICC 6 16 18 2 I/O gain R VGR 21 3 I/O gain G VGG 19 4 I/O gain B VGB 17 5 Input dynamic Drng range 17 19 21 Input video signal to Pins 1, 3 and 5, input Pins 1, 3, 5: Sig-3 clamp pulse to Pin 13, and measure the Pin 13: Sig-2 output amplitude of each output pin. 0.9 1.05 1.2 6 Sharpness gain 1 19 Pins 1, 3, 5: CW Pin 13: 5 V Pin 12: 0.5 V 60 110 150 mVp-p 5.0 7.0 9.0 60 110 150 mVp-p 5.0 7.0 9.0 290 375 455 mVp-p 7 Sharpness gain 2 VSG1 VSG2 19 Vcc pin inflow current Input video signal to Pins 1, 3 and –0.5 5, input clamp pulse to Pin 13, and measure the output amplitude of Pins 1, 3, 5: Sig-1 –0.5 each output pin. Then calculate Pin 13: Sig-2 the I/O gain. output amplitude –0.5 VGR = 20 log 0.7 Pins 1, 3, 5: CW Pin 13: 5 V Pin 12: 2.5 V Input 30MHz and 0.1Vp-p sine wave to Pins 1, 3 and 5, and measure the output amplitude of Pin 19. Input 30MHz and 0.1Vp-p sine wave to Pins 1, 3 and 5, and measure the output amplitude of Pin 19. Then calculate the I/O gain. VGR = 20 log 8 9 Sharpness gain 3 Sharpness gain 4 VSG3 VSG4 19 19 Pins 1, 3, 5: CW Pin 13: 5 V Pin 12: 3.0 V Pins 1, 3, 5: CW Pin 13: 5 V Pin 12: 4.5 V Pin 1: CW Pin 13: 5 V Pin 12: 4.5 V output amplitude 0.1 Input 30MHz and 0.1Vp-p sine wave to Pins 1, 3 and 5, and measure the output amplitude of Pin 19. Input 30MHz and 0.1Vp-p sine wave to Pins 1, 3 and 5, and measure the output amplitude of Pin 19. Then calculate the I/O gain. VGR = 20 log dB dB output amplitude 0.1 Input 30MHz and 0.3Vp-p sine wave to Pin 1, and measure the output amplitude of Pin 15. 10 DIFOUT output level 11 SYNCSEP VSHi output high level Input video signal to Pin 7, and 3.9 measure the high level of Pin 14. 4.2 4.5 V 12 SYNCSEP VSLo output low level Input video signal to Pin 7, and measure the low level of Pin 14. 0.1 0.18 0.26 V 0 19 40 ns 30 51 70 ns VDF 13 SYNCSEP SDtr output delay 1 14 SYNCSEP SDtf output delay 1 15 14 Pin 7: Sig-4 Vth = 50% SDtr Vth = 50% –5– SDtf CXA2093S Signals Used for Measurement 25µs 20µs Sig-1 0.7Vp-p 4µs 2.7V Sig-2 0.9V 200ns 25µs 20µs Sig-3 1.0Vp-p 25µs 0.7Vp-p Sig-4 0.3Vp-p 2µs 1µs 2µs –6– CXA2093S Electrical Characteristics Measurement Circuit 1 RIN 2 GND 3 GIN 4 GND GND 22 0.1µ ROUT 21 ROUT GND 20 0.1µ GOUT 19 0.01µ 47µ 5 BIN VCC 18 6 VCC BOUT 17 7 SYNCIN 8 GND 9 NC GOUT 9V 0.1µ VCC 16 0.1µ 10 BOUT DIFOUT 15 SYNCOUT 14 GND Differential waveform output Sync pulse output CLAMP 13 F0_GAIN 12 11 NC 0V to 5V –7– CXA2093S Application Circuit R input GND 22 1 RIN 2 GND 3 GIN 4 GND 5 BIN VCC 18 6 VCC BOUT 17 7 SYNCIN 8 GND 9 NC 0.1µ G input R output ROUT 21 GND 20 0.1µ B input GOUT 19 0.1µ 5V 47µ Sync on green input 0.01µ DIFOUT 15 SYNCOUT 14 GND 0.01µ B output VCC 16 0.1µ 10 G output CLAMP 13 0.01µ Differential output Sync output Clamp pulse input F0_GAIN 12 11 NC Application circuits shown are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same. –8– CXA2093S Description of Operation 1. Video signal system RGB signals input to Pins 1, 3 and 5 is synchronous clamped by the clamp pulse input from Pin 13. This RGB signals are mixed in the ratio of 0.6G + 0.3R + 0.1B, and Y signal is generated. The high frequency component is pulled out from a Y signal through a differential circuit, and the amplitude is varied according to the gain control circuit. The selecting of gain control and differential circuit time constant is performed by the DC voltage input from Pin 12. Gain controlled signal is output from Pin 15 after amplitude limited from a limiter circuit. At the same time, its signal is added to RGB signals input to Pins 1, 3 and 5, and then is output from Pins 17, 19 and 21. Sharpness Min. F0_GAIN = 0.5V/3.0V No sharpness component Portion that are not output from limiter 100% Limiter level Approx. 0.2V Sharpness Max. F0_GAIN = 2.0V/4.5V 50ns 100% (0.7Vp-p) 10% 100ns Time constant F0_GAIN = 0.5V to 2.0V; 50ns F0_GAIN = 3.0V to 4.5V; 100ns 2. Synchronous system The sync on green signal input to Pin 7 is synchronous separated by the sync separation circuit after diode clamped, and is output from Pin 14 as a positive polarity pulse. The input signal is not sync on green signal, video portion is sliced and then is output as a positive polarity pulse. –9– CXA2093S Example of Representative Characteristics F0_GAIN control characteristics 7 GOUT output gain [dB] 6 5 4 3 2 1 0 0 1 2 3 F0_GAIN applied voltage [V] 4 5 100 300 Frequency characteristics 2 Output gain [dB] 0 –2 –4 –6 –8 1 10 Input frequency [MHz] – 10 – CXA2093S Unit: mm + 0.1 0.05 0.25 – 22PIN SDIP (PLASTIC) + 0.4 19.2 – 0.1 7.62 + 0.3 6.4 – 0.1 12 22 0˚ to 15˚ 11 1 + 0.4 3.9 – 0.1 + 0.15 3.25 – 0.2 0.51 MIN 1.778 0.5 ± 0.1 + 0.15 0.9 – 0.1 Two kinds of package surface: 1.All mat surface type. 2.All mirror surface type. PACKAGE STRUCTURE MOLDING COMPOUND EPOXY RESIN SONY CODE SDIP-22P-01 LEAD TREATMENT SOLDER PLATING EIAJ CODE SDIP022-P-0300 LEAD MATERIAL COPPER ALLOY PACKAGE MASS 0.95g JEDEC CODE + 0.1 0.05 0.25 – 22PIN SDIP (PLASTIC) + 0.4 19.2 – 0.1 7.62 + 0.3 6.4 – 0.1 12 22 0˚ to 15˚ 11 1 + 0.4 3.9 – 0.1 0.51 MIN 1.778 + 0.15 3.25 – 0.2 Package Outline 0.5 ± 0.1 + 0.15 0.9 – 0.1 Two kinds of package surface: 1.All mat surface type. 2.All mirror surface type. PACKAGE STRUCTURE MOLDING COMPOUND EPOXY RESIN SONY CODE SDIP-22P-01 LEAD TREATMENT SOLDER PLATING EIAJ CODE SDIP022-P-0300 LEAD MATERIAL COPPER ALLOY PACKAGE MASS 0.95g JEDEC CODE LEAD PLATING SPECIFICATIONS ITEM LEAD MATERIAL SPEC. COPPER ALLOY SOLDER COMPOSITION Sn-Bi Bi:1-4wt% PLATING THICKNESS 5-18µm – 11 – Sony Corporation