CXK5T8257BTM/BYM/BM -10LLX/12LLX 32768-word × 8-bit High Speed CMOS Static RAM Preliminary For the availability of this product, please contact the sales office. Description The CXK5T8257BTM/BYM/BM is 262,144 bits high speed CMOS static RAM organized as 32768-words by 8 bits. Special feature are low power consumption and high speed. The CXK5T8257BTM/BYM/BM is a suitable RAM for portable equipment with battery back up. Features • Extended operating temperature range: –25 to +85°C • Wide supply voltage range operation: 2.7 to 3.6V • Fast access time: (Access time) 3.0V operation -10LLX 100ns (Max.) -12LLX 120ns (Max.) 3.3V operation -10LLX 85ns (Max.) -12LLX 100ns (Max.) • Low standby current: 7.0µA (Max.) • Low power data retention: 2.0V (Min.) • Available in many packages CXK5T8257BTM/BYM 8mm × 13.4mm 28 pin TSOP Package CXK5T8257BM 450mil 28 pin SOP Package Function 32768-word × 8 bit static RAM Structure Silicon gate CMOS IC CXK5T8257BTM 28 pin TSOP (Plastic) CXK5T8257BYM 28 pin TSOP (Plastic) CXK5T8257BM 28 pin SOP (Plastic) Block Diagram A14 A13 A12 A11 A9 A8 A7 A6 A5 Buffer A10 A4 A3 A2 A1 A0 Buffer Row Decoder Memory Matrix 512 × 512 VCC GND I/O Gate Column Decoder OE Buffer WE I/O Buffer CE I/O1 I/O8 Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– PE96509-ST CXK5T8257BTM/BYM/BM Pin Configuration (Top View) OE A11 A9 A8 A13 WE VCC A14 A12 A7 A6 A5 A4 A3 A3 A4 A5 A6 A7 A12 A14 VCC WE A13 A8 A9 A11 OE 22 23 24 25 26 27 28 1 2 3 4 5 6 7 Pin Description 21 20 19 18 17 16 15 14 13 12 11 10 9 8 CXK5T8257BTM (Standard Pinout) 7 6 5 4 3 2 1 28 27 26 25 24 23 22 8 9 10 11 12 13 14 15 16 17 18 19 20 21 CXK5T8257BYM (Standard Pinout) Absolute Maximum Ratings Item A10 CE I/O8 I/O7 I/O6 I/O5 I/O4 GND I/O3 I/O2 I/O1 A0 A1 A2 A2 A1 A0 I/O1 I/O2 I/O3 GND I/O4 I/O5 I/O6 I/O7 I/O8 CE A10 Symbol A14 1 28 VCC A12 2 27 WE A7 3 26 A13 A6 4 25 A8 A5 5 24 A9 A4 6 23 A11 A3 7 22 OE A2 8 21 A10 A1 9 20 CE A0 10 19 I/O8 I/O1 11 18 I/O7 I/O2 12 17 I/O6 I/O3 13 16 I/O5 GND 14 15 I/O4 CXK5T8257BM (Ta = 25°C, GND = 0V) Symbol Rating Unit V Supply voltage VCC Input voltage VIN –0.5 to +4.6 –0.5∗1 to VCC + 0.5 Input and output voltage VI/O –0.5∗1 to VCC + 0.5 V Allowable power dissipation PD 0.7 W Operating temperature Topr –25 to +85 °C Storage temperature Tstg –55 to +150 °C Soldering temperature · time Tsolder 235 · 10 °C · s V ∗1 VIN, VI/O = –3.0V Min. for pulse width less than 50ns. Truth Table CE OE WE Mode I/O1 to I/O8 H × × Not selected High Z ISB1, ISB2 L H H Output disable High Z ICC1, ICC2 L L H Read Data out ICC1, ICC2 L × L Write Data in ICC1, ICC2 ×: "H" or "L" –2– VCC Current Description A0 to A14 Address input I/O1 to I/O8 Data input/output CE Chip enable input WE Write enable input OE Output enable input VCC Power supply GND Ground CXK5T8257BTM/BYM/BM DC Recommended Operating Conditions Item (Ta = –25 to +85°C, GND = 0V) VCC = 2.7 to 3.6V Symbol VCC = 3.3V ± 0.3V Min. Typ. Max. Min. Typ. Max. Supply voltage VCC 2.7 3.3 3.6 3.0 3.3 3.6 Input high voltage VIH — VCC + 0.3 VCC + 0.3 VIL — 0.4 2.2 –0.3∗1 — Input low voltage 2.4 –0.3∗1 — 0.6 Unit V ∗1 VIL=–3.0V Min. for pulse width less than 50ns. Electrical Characteristics • DC characteristics Item (VCC = 2.7 to 3.6V, GND = 0V, Ta = –25 to +85°C) Symbol Test Conditions Min. Typ.∗2 Max. Input leakage current ILI VIN = GND to VCC –0.5 — 0.5 Output leakage current ILO CE = VIH OE = VIH or WE = VIL VI/O = GND to VCC –0.5 — 0.5 Operating power supply current ICC1 CE = VIL VIN = VIH or VIL IOUT = 0mA — 0.9 2 Average operating ICC2 current Standby current ISB1 Unit µA mA Min. cycle duty = 100%, IOUT = 0mA CE ≥ VCC – 0.2V 18∗3 35∗4 18 35 — 7.0 3.5 — µA — — 0.12 mA 10LLX — 12LLX –25 to +85°C –25 to +70°C — — — +25°C ISB2 CE = VIH — 0.06 0.7 Output high voltage VOH IOH = –2mA 2.4 — — Output low voltage VOL IOL = 2.0mA — — 0.4 V ∗2 VCC = 3.3V, Ta = 25°C ∗3 ICC2 = 21mA for 3.3V operation (VCC = 3.3V ± 0.3V) ∗4 ICC3 = 40mA for 3.3V operation (VCC = 3.3V ± 0.3V) –3– CXK5T8257BTM/BYM/BM I/O capacitance Item (Ta = 25°C, f = 1MHz) Symbol Test condition Min. Typ. Max. Unit Input capacitance CIN VIN = 0V — — 8 pF I/O capacitance CI/O VI/O = 0V — — 10 pF Note) This parameter is sampled and is not 100% tested. AC Characteristics • AC test conditions (Ta = –25 to +85°C) Conditions Item VCC = 2.7 to 3.6V VCC = 3.3V ± 0.3V Input pulse high level VIH = 2.4V VIH = 2.2V Input pulse low level VIL = 0.4V VIL = 0.6V Input rise time tr = 5ns tf = 5ns tr = 5ns tf = 5ns Input fall time Input and output reference level -10LLX Output load conditions -12LLX 1.4V 1.4V CL∗1 = 100pF, 1TTL CL∗1 = 30pF, 1TTL CL∗1 = 100pF, 1TTL CL∗1 = 100pF, 1TTL ∗1 CL includes scope and jig capacitances. –4– TTL CL CXK5T8257BTM/BYM/BM • Read cycle (WE = “H”) VCC = 2.7 to 3.6V Item Symbol tRC tAA Address access time tCO Chip enable access time (CE) tOE Chip enable to output valid tOH Chip hold from address change tLZ Chip enable to output in low Z (CE) tOLZ Output enable to output in low Z (OE) tHZ∗1 Chip disable to output in high Z (CE) Output disable to output in high Z (OE) tOHZ∗1 Read cycle time ∗1 -10LLX VCC = 3.3V ± 0.3V -12LLX -10LLX -12LLX Min. Max. Min. Max. Min. Max. Min. Max. 100 — 120 — 85 — 100 — — 100 — 120 — 85 — 100 — 100 — 120 — 85 — 100 — 50 — 60 — 50 — 50 20 — 20 — 20 — 20 — 10 — 10 — 10 — 10 — 10 — 10 — 10 — 10 — — 35 — 40 — 35 — 35 — 35 — 35 — 35 — 35 Unit ns tHZ and tOHZ are defined as the time required for outputs to turn to high impedance state and are not referred to as output voltage levels. • Write cycle VCC = 2.7 to 3.6V Item Write cycle time Address valid to end of write Chip enable to end of write Data to write time overlap Data hold from write time Write pulse width Address setup time Write recovery time (WE) Write recovery time (CE) Output active from end of write Write to output in high Z ∗2 Symbol tWC tAW tCW tDW tDH tWP tAS tWR tWR1 tOW tWHZ∗2 -10LLX VCC = 3.3V ± 0.3V -12LLX -10LLX -12LLX Min. Max. Min. Max. Min. Max. Min. Max. 100 — 120 — 85 — 100 — 80 — 100 — 80 — 80 — 80 — 100 — 80 — 80 — 35 — 50 — 35 — 35 — 0 — 0 — 0 — 0 — 60 — 70 — 60 — 60 — 0 — 0 — 0 — 0 — 0 — 0 — 0 — 0 — 0 — 0 — 0 — 0 — 10 — 10 — 10 — 10 — — 35 — 40 — 35 — 35 Unit ns tWHZ is defined as the time requied for outputs to turn to high impedance state and is not referred to as output voltage level. –5– CXK5T8257BTM/BYM/BM Timing waveform • Read cycle (1) : CE = OE =VIL, WE = VIH tRC Address tAA tOH Data out Previous data valid Data valid • Read cycle (2): WE = VIH tRC Address tAA CE tCO tHZ tLZ OE tOE tOHZ tOLZ Data out Data valid High impedance • Write cycle (1) : WE contorl tWC Address tWR tAW OE tCW CE tAS [∗1] tWP WE tDW Data in tDH Data valid tWHZ tOW Data out High impedance [∗2] [∗2] –6– CXK5T8257BTM/BYM/BM • Write cycle (2): CE control tWC Address tAW OE tAS tCW tWR1 CE tWP WE tDW Data in tDH Data valid Data out High impedance ∗1 Write is executed when both CE and WE are at low simultaneously. ∗2 Do not apply the data input voltage of the opposite phase to the output while I/O pin is output condition. –7– CXK5T8257BTM/BYM/BM Data Retention Waveform • Low supply voltage data retention waveform Data retention mode tCDRS tR VCC 2.7V 2.2V VDR CE CE ≥ VCC – 0.2V GND Data Retention Characteristics Item Data retention voltage Symbol (Ta = –25 to +85°C) Test conditions Min. Typ. Max. Unit 2 — 3.6 V –25 to +85°C — — 6 –25 to +70°C — — 3 +25°C — 0.1 — VDR CE ≥ VCC – 0.2V ICCDR1 VCC = 3.0V CE ≥ 2.8V Data retention current µA ICCDR2 VCC = 2.0 to 3.6V CE ≥ VCC – 0.2V — 0.12∗1 7.0 Data retention setup time tCDRS Chip disable to data retention mode 0 — — ns Recovery time tR 5 — — ms ∗1 VCC = 3.3V, Ta = 25°C –8– CXK5T8257BTM/BYM/BM Package Outline Unit: mm CXK5T8257BTM 28PIN TSOP (Plastic) ∗8.0 ± 0.1 1.2 MAX 0.1 13.4 ± 0.3 8 ∗11.8 ± 0.1 21 A 22 + 0.1 0.2 – 0.05 28 1 + 0.07 0.127 – 0.02 7 0.55 ± 0.1 0.5 ± 0.1 + 0.1 0.05 – 0.05 0° to 10° DETAIL A NOTE: Dimension “∗” does not include mold protrusion. PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SONY CODE TSOP-28P-L01 LEAD TREATMENT SOLDER PLATING EIAJ CODE TSOP028-P-0000-A LEAD MATERIAL COPPER / 42 ALLOY PACKAGE WEIGHT 0.2g JEDEC CODE CXK5T8257BYM 28PIN TSOP (Plastic) ∗8.0 ± 0.1 0.1 13.4 ± 0.3 21 ∗11.8 ± 0.1 8 1.2 MAX A 7 + 0.1 0.2 – 0.05 1 28 + 0.07 0.127 – 0.02 22 0.55 ± 0.1 0.5 ± 0.1 + 0.1 0.05 – 0.05 0° to 10° DETAIL A NOTE: Dimension “∗” does not include mold protrusion. PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SONY CODE TSOP-28P-L01R LEAD TREATMENT SOLDER PLATING EIAJ CODE TSOP028-P-0000-B LEAD MATERIAL COPPER / 42 ALLOY PACKAGE WEIGHT 0.2g JEDEC CODE –9– CXK5T8257BTM/BYM/BM CXK5T8257BM 28PIN SOP (PLASTIC) + 0.4 2.3 – 0.15 + 0.4 18.0 – 0.1 28 15 0.15 14 1 0.4 ± 0.1 1.27 0.24 1.0 ± 0.2 11.8 ± 0.4 + 0.3 8.4 – 0.1 + 0.2 0.1 – 0.05 0° to 10° + 0.1 0.05 0.15 – M PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SONY CODE SOP-28P-L05 LEAD TREATMENT SOLDER PLATING EIAJ CODE ∗SOP028-P-0450 LEAD MATERIAL 42 ALLOY PACKAGE WEIGHT 0.7g JEDEC CODE – 10 –