CXK5B16120J/TM -12 65536-word × 16-bit High Speed Bi-CMOS Static RAM For the availability of this product, please contact the sales office. Description CXK5B16120J/TM is a high speed 1M bit BiCMOS static RAM organized as 65536 words by 16 bits. Operating on a single 3.3V supply this asynchronous IC is suitable for use in high speed and low power applications. CXK5B16120J 44 pin SOJ (Plastic) Features • Single 3.3V Supply 3.3V±0.3V • Fast access time 12ns (Max.) • Low stand-by current: 10mA (Max.) • Low power operation 972mW (Max.) • Package line-up Dual Vcc/Vss CXK5B16120J 400mil 44pin SOJ Package CXK5B16120TM 400mil 44pin TSOP Package Block Diagram Function 65536-word × 16-bit static RAM Structure Silicon gate Bi-CMOS IC Pin configuration (Top View) A14 A15 A4 1 44 A5 A9 A3 2 43 A6 A2 3 42 A7 A1 4 41 OE A8 A12 Buffer Row Decoder Memory Vcc Matrix 256 × 4096 A13 A0 5 40 UB A11 CE 6 39 LB A10 GND I/O1 7 38 I/O16 I/O2 8 37 I/O15 I/O3 9 36 I/O14 I/O4 1 35 I/O13 0 Vcc 11 34 GND A5 A4 A3 A0 A2 Buffer I/O Gate Column Decoder A1 A6 A7 UB LB WE OE I/O Buffer CXK5B16120TM 44 pin TSOP (Plastic) GND 12 33 Vcc I/O5 13 I/O6 14 32 I/O12 I/O7 15 I/O8 16 30 I/O10 31 I/O11 29 I/O9 WE 17 28 NC A15 18 27 A8 A14 19 26 A9 A13 20 25 A10 A12 21 24 A11 NC 22 23 NC Pin Description Symbol Description A0 to A15 Address input I/O1 to I/O8 Data input output (lower byte I/O) I/O9 Data input output to I/O16 (upper byte I/O) CE Chip enable input WE Write enable input OE Output enable input LB Lower byte select input UB Upper byte select input Vcc +3.3V Power supply GND Ground NC No connection CE I/O1 I/O16 Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E93605A57-PK CXK5B16120J/TM Absolute Maximum Ratings (Ta = 25°C, GND = 0V) Item Symbol Rating –0.5∗1 to +4.6 Unit Supply voltage VCC Input voltage VIN Input and output voltage VI/O –0.5∗1 to VCC + 0.5 –0.5∗1 to VCC + 0.5 Allowable power dissipation PD 1.5∗2 W Operating temperature Topr 0 to +70 °C Storage temperature Tstg –55 to +150 °C Soldering temperature • time Tsolder J 260 • 10 °C • sec TM 235 • 10 °C • sec V V V ∗1 Vcc, VIN, VI/O = –2.0V Min. for pulse width less than 5ns ∗2 Air Flow ≥ 1m/s Truth Table CE OE WE LB UB H × × × × Not selected High Z High Z ISB1, ISB2 L L Read Data Out Data out ICC L H Read Data Out High Z ICC H L Read High Z Data out ICC H H Not selected High Z High Z ICC L L Write Data in Data in ICC L H Write Data in High Z ICC H L Write High Z Data in ICC L L L H × L Mode I/O1 to I/O8 I/O9 to I/O16 Current L H H × × Output disable High Z High Z ICC L × × H H Not selected High Z High Z ICC ~ : “H” or “L” Recommended Operating Conditions Item (Ta = 0 to +70°C, GND = 0V) Symbol Min. Typ. Max. Unit Supply voltage VCC 3.0 3.3 3.6 V Input high voltage VIH 2.0 — VCC + 0.3 V Input low voltage VIL –0.3∗ — 0.8 V ∗ VIL = –2.0V Min. for pulse width less than 5ns –2– CXK5B16120J/TM Electrical Characteristics DC Characteristics Item (Vcc = 3.3V±0.3V, GND = 0V, Ta = 0 to +70°C) Typ.∗ Conditions Min. Max. Unit Symbol Input leakage current ILI VIN = GND to Vcc –10 — +10 µA Output leakage current ILO CE = VIH or OE = VIH or WE = VIL or UB = VIH or LB = VIH VI/O = GND to Vcc –10 — +10 µA Average operating current ICC Min. Cycle Duty =100% IOUT = 0mA, CE = VIL, VIN = VIH or VIL — — 270 mA ISB1 CE ≥ Vcc – 0.2V VIN ≥ Vcc – 0.2V or VIN ≤ 0.2V — — 10 mA ISB2 Min. Cycle Duty =100% CE = VIH, VIN = VIH or VIL — — 100 mA Output high voltage VOH IOH = –2.0mA 2.4 — — V Output low voltage VOL IOL = 2.0mA — — 0.4 V Standby current * Vcc = 3.3V, Ta = 25°C I/O Capacitance (Ta = 25°C, f = 1MHz) Symbol Conditions Input capacitance CIN I/O capacitance CI/O Item Min. Typ. Max. Unit VIN = 0V — — 5 pF VI/O = 0V — — 7 pF Note) This parameter is sampled and is not 100% tested. AC Characteristics • AC test condition Output load (1) (Vcc = 3.3V±0.3V, Ta = 0 to +70°C) Item I/O Condition Input pulse high level VIH = 3.0V Input pulse low level VIL = 0.0V Input rise time Input fall time tr = 2ns tf = 2ns Input and output reference level 1.4V Output load conditions Fig. 1 Zo=50Ω RL=50Ω VL=1.4V Output load (2)*1 3.3V 1179Ω I/O 5pF*2 868Ω *1. For tLZ, tOLZ, tLBLZ, tUBLZ, tHZ, tOHZ, tLBHZ, tUBHZ, tOW, tWHZ *2. Including scope and jig capacitances. Fig. 1 –3– CXK5B16120J/TM • Read cycle Symbol Item Read cycle time Address access time Chip enable access time Output enable to output valid Byte select to output valid Output data hold time Chip enable to output in low Z (CE) Output enable to output in low Z (OE) Byte select to output in low Z (LB, UB) Chip disable to output in high Z (CE) Output disable to output in high Z (OE) Byte select to output in high Z (LB, UB) tRC tAA tCO tOE tLBC tUB tOH tLZ∗ tOLZ∗ tLBLZ, tUBLZ∗ tHZ∗ tOHZ∗ tLBHZ, tUBHZ∗ -12 Unit Min. Max. 12 — ns — 12 ns — 12 ns — 6 ns — 6 ns 3 — ns 3 — ns 0 — ns 0 — ns 0 6 ns 0 6 ns 0 6 ns ∗ Transition is measured ±200mV from steady voltage with specified loading in Fig. 1-(2). This parameter is sampled and is not 100% tested. • Write cycle Symbol Item Write cycle time Address valid to end of write Chip enable to end of write Byte select to end of write Data valid to end to write Data hold from end of write Write pulse width Address set up time Write recovery time Output active from end of write Write to output in high Z tWC tAW tCW tLBW, tUBW tDW tDH tWP tAS tWR tOW* tWHZ* -12 Unit Min. Max. 12 — ns 10 — ns 10 — ns 10 — ns 8 — ns 0 — ns 10 — ns 0 — ns 0 — ns 4 — ns 0 6 ns ∗ Transition is measured ±200mV from steady voltage with specified loading in Fig. 1-(2). This parameter is sampled and is not 100% tested. –4– CXK5B16120J/TM Timing Waveform • Read cycle (1) : CE = OE = VIL, WE = VIH tRC Address tAA tOH Data out Previous data valid Data valid • Read cycle (2) : WE = VIH tRC Address tAA tCO CE tLZ tHZ OE tO E tOLZ tOHZ LB, UB tLB tU B tLBL tLBH Z Z tUBL tUBH Z Z Data valid Data out High impedance –5– CXK5B16120J/TM • Write cycle (1) : WE control tWC Address tWR tA W tCW CE tLBW, tUBW LB, UB tAS tWP WE tDW Data in tDH Data valid tWHZ tOW Data out High impedance • Write cycle (2) : CE control tWC Address tWR tA W tAS CE tCW tLBW, tUBW LB, UB tWP WE Data in tD tD W H Data valid tLZ tWHZ Data out High impedance ∗ Do not apply the data input voltage of the opposite phase to the output while I/O pin is in output condition. –6– CXK5B16120J/TM • Write cycle (3) : LB, UB control tWC Address tA W tCW CE tWR tAS tLBW, tUBW LB, UB tWP WE Data in tD tD W H Data valid tLBLZ tUBLZ tWHZ Data out High impedance ∗ Do not apply the data input voltage of the opposite phase to the output while I/O pin is in output condition. –7– CXK5B16120J/TM Example of Representative Characteristics Supply current vs. Supply voltage Supply current vs. Ambient temperature 1.4 ICC – Supply current [Normalized] ICC – Supply current [Normalized] 1.4 1.2 1.0 0.8 Ta = 25°C 0.6 3.0 1.2 1.0 0.8 VCC =3.3V 0.6 3.15 3.3 3.45 VCC – Supply voltage [V] 3.6 0 Supply current vs. Frequency 20 40 60 Ta – Ambient temperature [°C] 80 Access time vs. Load capacitance 12ns 1.8 1.0 tAA, tCO, tOE – Access time [Normalized] ICC – Supply current [Normalized] tOE 0.75 0.5 0.25 1.6 1.4 tCO, tAA 1.2 Ta = 25°C VCC =3.3V 1.0 0 0 25 50 75 Frequency (1 /tRC, 1 /tWC) [MHz] 0 100 Access time vs. Supply voltage 1.4 tAA, tCO, tOE – Access time [Normalized] tAA, tCO, tOE – Access time [Normalized] 160 Access time vs. Load capacitance 1.4 1.2 1.0 tAA tCO tOE 0.8 Ta = 25°C 0.6 3.0 40 80 120 CL – Load capacitance [pF] 1.2 tCO tAA tOE 1.0 0.8 VCC =3.3V 0.6 3.15 3.3 3.45 VCC – Supply voltage [V] 3.6 0 –8– 20 40 60 Ta – Ambient temperature [°C] 80 CXK5B16120J/TM Standby current vs. Supply voltage Standby current vs. Ambient temperature ISB2 1.2 ISB1 1.0 0.8 Ta = 25°C 0.6 3.0 1.4 ISB1 – Standby current [Normalized] ISB1, ISB2 – Standby current [Normalized] 1.4 1.2 1.0 0.8 VCC = 3.3V 0.6 3.15 3.3 3.45 VCC – Supply voltage [V] 3.6 0 Input voltage level vs. Supply voltage VIH VIL 1.0 0.9 Ta = 25°C ISB2 – Standby current [Normalized] VIL, VIH – Input voltage [Normalized] 1.4 1.1 1.0 0.8 VCC = 3.3V 3.6 0 Output high current vs. Output high voltage 20 40 60 Ta – Ambient temperature[°C] 80 Output low current vs. Output low voltage 1.8 IOL – Output low current [Normalized] IOH – Output high current [Normalized] 1.2 0.6 3.15 3.3 3.45 VCC – Supply voltage [V] 4.0 3.0 2.0 1.0 VCC = 3.3V 0.0 0.0 80 Standby current vs. Ambient temperature 1.2 0.8 3.0 20 40 60 Ta – Ambient temperature[°C] 1.4 1.0 0.6 VCC = 3.3V 0.2 1.0 2.0 3.0 VOH – Output high voltage [V] 4.0 0 –9– 0.2 0.4 0.6 VOL – Output low voltage [V] 0.8 CXK5B16120J/TM Package Outline Unit: mm CXK5B16120J + 0.1 0.2 – 0.05 44PIN SOJ (PLASTIC) 400mil + 0.4 28.58 – 0.1 23 9.33 ± 0.18 11.05 ± 0.12 + 0.3 10.16 – 0.12 44 4 .25 R0 1 22 + 0.08 0.73 – 0.07 + 0.2 2.2 – 0.11 1.27 1.15 MAX 0.178 M + 0.25 3.5 – 0.2 + 0.075 0.43 – 0.045 0.635 MIN 0.1 PACKAGE STRUCTURE PACKAGE MATERIAL EPOXY RESIN SONY CODE SOJ-44P-01 LEAD TREATMENT SOLDER PLATING EIAJ CODE ∗SOJ044-P-0400-A LEAD MATERIAL COPPER ALLOY PACKAGE WEIGHT 1.9g JEDEC CODE CXK5B16120TM 44PIN TSOP (II) (PLASTIC) 400mil 1.2 MAX ∗18.41 ± 0.1 0.1 1 11.76 ± 0.2 23 ∗10.16 ± 0.1 44 A 22 0.8 0.3 ± 0.1 0.13 M + 0.05 0.125 – 0.02 B (0.125) (0.3) 0.145 ± 0.055 0.32 ± 0.08 0.5 ± 0.1 + 0.1 0.1 – 0.05 0° to 10° DETAIL A DETAIL B NOTE: Dimension “∗” does not include mold protrusion. PACKAGE STRUCTURE MOLDING COMPOUND EPOXY / PHENOL RESIN SONY CODE TSOP (II) -44P-L01 LEAD TREATMENT SOLDER PLATING EIAJ CODE TSOP (II) 044-P-0400-A LEAD MATERIAL 42 ALLOY PACKAGE WEIGHT 0.5g JEDEC CODE – 10 –