ICX097AKE Diagonal 3mm (Type 1/6) CCD Image Sensor for PAL Color Cameras Description The ICX097AKE is an interline CCD solid-state image sensor suitable for PAL small color cameras. Ye, Cy, Mg, and G complementary color mosaic filters are used. At the same time, high sensitivity and low dark current are achieved through the adoption of Super HAD CCD technology. This chip features a field period readout system and an electronic shutter with variable chargestorage time. The package is a small 12-pin SON(LCC). Features • High sensitivity and low dark current • Horizontal register: 3.3 to 5.0V drive • No voltage adjustment (Reset gate and substrate bias are not adjusted.) • Low smear • Excellent antiblooming characteristics • Continuous variable-speed shutter • Recommended range of exit pupil distance: –10mm to – ∞ • Ye, Cy, Mg, and G complementary color mosaic filters on chip • 12-pin ceramic SON(LCC) package Device Structure • Interline CCD image sensor • Image size: • Number of effective pixels: • Total number of pixels: • Chip size: • Unit cell size: • Optical black: • Number of dummy bits: • Substrate material: 12 pin SON (Ceramic) AAAAA AAAAA AAAAA AAAAA AAAAA Pin 1 1 V 7 Pin 7 H 14 30 Optical black position (Top View) Diagonal 3mm (Type 1/6) 500 (H) × 582 (V) approx. 290K pixels 537 (H) × 597 (V) approx. 320K pixels 3.30mm (H) × 2.95mm (V) 4.90µm (H) × 3.15µm (V) Horizontal (H) direction: Front 7 pixels, rear 30 pixels Vertical (V) direction: Front 14 pixels, rear 1 pixel Horizontal 16 Vertical 1 (even fields only) Silicon ∗Super HAD CCD is a registered trademark of Sony Corporation. Super HAD CCD is a CCD that drastically improves sensitivity by introducing newly developed semiconductor technology by Sony Corporation into Sony's high-performance HAD (Hole-Accumulation Diode) sensor. Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E97728A99 ICX097AKE GND Vφ1 Vφ2 Vφ3 Vφ4 6 5 4 3 2 1 Vertical register VOUT Block Diagram and Pin Configuration (Top View) Cy Ye Cy Ye Mg G Mg G Cy Ye Cy Ye G Mg G Mg Cy Ye Cy Ye Mg G Mg G Note) Horizontal register VL 11 12 Hφ2 φSUB 10 Hφ1 9 RG 8 VDD Note) 7 : Photo sensor Pin Description Pin No. Symbol Description Pin No. Description Symbol 1 Vφ4 Vertical register transfer clock 7 VDD Supply voltage 2 Vφ3 Vertical register transfer clock 8 φSUB Substrate clock 3 Vφ2 Vertical register transfer clock 9 VL Protective transistor bias 4 Vφ1 Vertical register transfer clock 10 RG Reset gate clock 5 GND GND 11 Hφ1 Horizontal register transfer clock 6 VOUT Signal output 12 Hφ2 Horizontal register transfer clock Absolute Maximum Ratings Item Ratings Unit VDD – φSUB –40 to +8 V VOUT, RG – φSUB –40 to +10 V Vφ1, Vφ3 – φSUB –50 to +15 V Vφ2, Vφ4, VL– φSUB –50 to +0.3 V Hφ1, Hφ2, GND – φSUB –40 to +0.3 V VDD, VOUT, RG – GND –0.3 to +18 V Vφ1, Vφ2, Vφ3, Vφ4 – GND –10 to +18 V Hφ1, Hφ2 – GND –10 to +15 V Vφ1, Vφ3 – VL –0.3 to +26 V Vφ2, Vφ4, Hφ1, Hφ2, GND – VL –0.3 to +16 V to +15 V Hφ1 – Hφ2 –14 to +14 V Hφ1, Hφ2 – Vφ4 –14 to +14 V Storage temperature –30 to +80 °C Operating temperature –10 to +60 °C Against φSUB Against GND Against VL Voltage difference between vertical clock input pins Between input clock pins ∗1 +24V (Max.) when clock width < 10µs, clock duty factor < 0.1%. –2– Remarks ∗1 ICX097AKE Bias Conditions Item Symbol Supply voltage VDD Protective transistor bias VL Substrate clock φSUB Min. Typ. Max. Unit 14.55 15.0 ∗1 15.45 V Remarks ∗2 ∗1 VL setting is the VVL voltage of the vertical transfer clock waveform, or the same power supply as the VL power supply for the V driver should be used. ∗2 Do not apply a DC bias to the substrate clock pin, because a DC bias is generated within the CCD. DC Characteristics Item Symbol Supply current Min. IDD Typ. Max. Unit 4 6 mA Remarks Clock Voltage Conditions Item Readout clock voltage Vertical transfer clock voltage Horizontal transfer clock voltage Min. Typ. Max. Unit Waveform diagram VVT 14.55 15.0 15.45 V 1 VVH1, VVH2 –0.05 0 0.05 V 2 VVH3, VVH4 –0.2 0 0.05 V 2 VVL1, VVL2, VVL3, VVL4 –8.0 –7.5 –7.0 V 2 VVL = (VVL3 + VVL4)/2 VφV 6.8 7.5 8.05 V 2 VφV = VVHn – VVLn (n = 1 to 4) Symbol VVH = (VVH1 + VVH2)/2 VVH3 – VVH –0.25 0.1 V 2 VVH4 – VVH –0.25 0.1 V 2 VVHH 0.3 V 2 High-level coupling VVHL 0.3 V 2 High-level coupling VVLH 0.3 V 2 Low-level coupling VVLL 0.3 V 2 Low-level coupling VφH 3.0 5.0 5.25 V 3 VHL –0.05 0 0.05 V 3 4.5 5.0 5.5 V 4 Input through 0.01µF capacitance 0.8 V 4 Low-level coupling VDD + VDD + VDD + 0.3 0.6 0.9 V 4 21.5 V 5 VφRG Reset gate clock voltage Remarks VRGLH – VRGLL VRGH Substrate clock voltage VφSUB 22.5 –3– 23.5 ICX097AKE Clock Equivalent Circuit Constant Item Symbol Min. Typ. Max. Unit CφV1, CφV3 270 pF CφV2, CφV4 220 pF CφV12, CφV34 180 pF CφV23, CφV41 150 pF CφV13, CφV24 62 pF Capacitance between horizontal transfer clock and GND CφH1, CφH2 20 pF Capacitance between horizontal transfer clocks CφHH 30 pF Capacitance between reset gate clock and GND CφRG 3 pF Capacitance between substrate clock and GND CφSUB 150 pF Vertical transfer clock series resistor R1, R2, R3, R4 82 Ω Vertical transfer clock ground resistor RGND 15 Ω Horizontal transfer clock series resistor RφH 20 Ω Reset gate clock series resistor RφRG 39 Ω Capacitance between vertical transfer clock and GND Capacitance between vertical transfer clocks Remarks Vφ2 Vφ1 CφV12 R1 R2 RφH RφH Hφ2 Hφ1 CφV1 CφHH CφV2 CφV41 CφV23 CφH1 CφH2 CφV13 CφV24 CφV4 R4 RGND CφV3 R3 CφV34 Vφ4 Vφ3 Vertical transfer clock equivalent circuit Horizontal transfer clock equivalent circuit RφRG RGφ CφRG Reset gate clock equivalent circuit –4– ICX097AKE Drive Clock Waveform Conditions (1) Readout clock waveform 100% 90% II II φM VVT φM 2 10% 0% tr twh 0V tf (2) Vertical transfer clock waveform Vφ1 Vφ3 VVHH VVH1 VVHH VVH VVHL VVHL VVH3 VVHL VVL1 VVH VVHH VVHH VVHL VVL3 VVLH VVLH VVLL VVLL VVL VVL Vφ2 Vφ4 VVHH VVHH VVH VVH VVHH VVHH VVHL VVHL VVH2 VVHL VVH4 VVL2 VVHL VVLH VVLH VVLL VVLL VVL VVL4 VVH = (VVH1 + VVH2)/2 VVL = (VVL3 + VVL4)/2 VφV = VVHn – VVLn (n = 1 to 4) –5– VVL ICX097AKE (3) Horizontal transfer clock waveform tr twh tf 90% twl VφH 10% VHL (4) Reset gate clock waveform tr twh tf VRGH twl Point A VφRG RG waveform VRGL + 0.5V VRGLH VRGL VRGLL Hφ1 waveform 10% VRGLH is the maximum value and VRGLL is the minimum value of the coupling waveform during the period from Point A in the above diagram until the rising edge of RG. In addition, VRGL is the average value of VRGLH and VRGLL. VRGL = (VRGLH + VRGLL)/2 Assuming VRGH is the minimum value during the interval twh, then: VφRG = VRGH – VRGL (5) Substrate clock waveform 100% 90% φM VφSUB 10% 0% VSUB (A bias generated within the CCD) tr twh –6– φM 2 tf ICX097AKE Clock Switching Characteristics Item Symbol VT Vertical transfer clock Vφ1, Vφ2, Vφ3, Vφ4 Horizontal transfer clock Readout clock During imaging Hφ twh twl tr tf Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. 2.3 2.5 0.1 0.1 During Hφ1 parallel-serial Hφ2 conversion 46 41 46 5.6 Reset gate clock φRG 11 Substrate clock φSUB 1.5 1.65 14 76 6.5 9.5 6.5 9.5 0.007 0.007 5.6 0.007 0.007 80 6.0 5.0 0.5 µs During readout 250 ns ∗1 5 41 Unit Remarks ns ∗2 µs ns 0.5 µs During drain charge ∗1 When vertical transfer clock driver CXD1267AN is used. ∗2 When VφH = 3.0V. tf ≥ tr – 2ns, and the cross-point voltage (VCR) for the Hφ1 rising side of the Hφ1 and Hφ2 waveforms must be at least VφH/2 [V]. –7– ICX097AKE Image Sensor Characteristics Item (Ta = 25°C) Symbol Min. Typ. S 240 300 RMgG 0.93 1.35 2 RYeCy 1.15 1.48 2 Saturation signal Ysat 500 Smear Sm Video signal shading SHy Sensitivity Sensitivity ratio Max. Unit Measurement method mV 1 Remarks mV 3 % 4 20 % 5 Zone 0 and I 25 % 5 Zone 0 to II' ∆Sr 10 % 6 ∆Sb 10 % 6 Dark signal Ydt 2 mV 7 Ta = 60°C Dark signal shading ∆Ydt 1 mV 8 Ta = 60°C Flicker Y Fy 2 % 9 Flicker R-Y Fcr 5 % 9 Flicker B-Y Fcb 5 % 9 Line crawl R Lcr 3 % 10 Line crawl G Lcg 3 % 10 Line crawl B Lcb 3 % 10 Line crawl W Lcw 3 % 10 Lag Lag 0.5 % 11 Uniformity between video signal channels 0.009 0.015 Ta = 60°C Zone Definition of Video Signal Shading 500 (H) 9 6 9 V 10 H 8 H 8 582 (V) Zone 0, I Zone II, II' 8 Ignored region Effective pixel region V 10 Measurement System [∗Y] [∗A] CCD signal output Y signal output LPF1 (3dB down 4MHz) CCD C.D.S AMP [∗C] SH LPF2 SH Chroma signal output (3dB down 1MHz) Note) Adjust the amplifier gain so that the gain between [∗A] and [∗Y] , and between [∗A] and [∗C] equals 1. –8– ICX097AKE Image Sensor Characteristics Measurement Method Measurement conditions 1) In the following measurements, the device drive conditions are at the typical values of the bias and clock voltage conditions. 2) In the following measurements, spot blemishes are excluded and, unless otherwise specified, the optical black level (OB) is used as the reference for the signal output, which is taken as the value of Y signal output or chroma signal output of the measurement system. Color coding of this image sensor & Composition of luminance (Y) and chroma (color difference) signals Cy Ye Cy Ye A1 G Mg G Mg Cy Ye Cy Ye Mg G Mg G B A2 As shown in the left figure, fields are read out. The charge is mixed by pairs such as A1 and A2 in the A field. (pairs such as B in the B field) As a result, the sequence of charges output as signals from the horizontal shift register (Hreg) is, for line A1, (G + Cy), (Mg + Ye), (G + Cy), and (Mg + Ye). Hreg Color Coding Diagram These signals are processed to form the Y signal and chroma (color difference) signal. The Y signal is formed by adding adjacent signals, and the chroma signal is formed by subtracting adjacent signals. In other words, the approximation: Y = {(G + Cy) + (Mg + Ye)} × 1/2 = 1/2 {2B + 3G + 2R} is used for the Y signal, and the approximation: R – Y = {(Mg + Ye) – (G + Cy)} = {2R – G} is used for the chroma (color difference) signal. For line A2, the signals output from Hreg in sequence are (Mg + Cy), (G + Ye), (Mg + Cy), (G + Ye). The Y signal is formed from these signals as follows: Y = {(G + Ye) + (Mg + Cy)} × 1/2 = 1/2 {2B + 3G + 2R} This is balanced since it is formed in the same way as for line A1. In a like manner, the chroma (color difference) signal is approximated as follows: – (B – Y) = {(G + Ye) – (Mg + Cy)} = – {2B – G} In other words, the chroma signal can be retrieved according to the sequence of lines from R – Y and – (B – Y) in alternation. This is also true for the B field. –9– ICX097AKE Definition of standard imaging conditions 1) Standard imaging condition I: Use a pattern box (luminance 706cd/m2, color temperature of 3200K halogen source) as a subject. (Pattern for evaluation is not applicable.) Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter and image at F5.6. The luminous intensity to the sensor receiving surface at this point is defined as the standard sensitivity testing luminous intensity. 2) Standard imaging condition II: Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 3) Standard imaging condition III: Image a light source (color temperature of 3200K) with a uniformity of brightness within 2% at all angles. Use a testing standard lens (exit pupil distance –33mm) with CM500S (t = 1.0mm) as an IR cut filter. The luminous intensity is adjusted to the value indicated in each testing item by the lens diaphragm. 1. Sensitivity Set to standard imaging condition I. After selecting the electronic shutter mode with a shutter speed of 1/250s, measure the Y signal (Ys) at the center of the screen and substitute the value into the following formula. S = Ys × 250 [mV] 50 2. Sensitivity ratio Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, and then measure the Mg signal output (SMg [mV]) and G signal output (SG [mV]), and Ye signal output (SYe [mV]) and Cy signal output (SCy [mV]) at the center of the screen with frame readout method. Substitute the values into the following formula. RMgG = SMg/SG RYeCy = SYe/SCy 3. Saturation signal Set to standard imaging condition II. After adjusting the luminous intensity to 10 times the intensity with average value of the Y signal output, 200mV, measure the minimum value of the Y signal. 4. Smear Set to standard imaging condition II. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity to 500 times the intensity with average value of the Y signal output, 200mV. When the readout clock is stopped and the charge drain is executed by the electronic shutter at the respective H blankings, measure the maximum value YSm [mV] of the Y signal output and substitute the value into the following formula. Sm = 1 YSm 1 × × × 100 [%] (1/10V method conversion value) 10 200 500 5. Video signal shading Set to standard imaging condition III. With the lens diaphragm at F5.6 to F8, adjust the luminous intensity so that the average value of the Y signal output is 200mV. Then measure the maximum (Ymax [mV]) and minimum (Ymin [mV]) values of the Y signal and substitute the values into the following formula. SHy = (Ymax – Ymin)/200 × 100 [%] 6. Uniformity between video signal channels Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, and then measure the maximum (Crmax, Cbmax [mV]) and minimum (Crmin, Cbmin [mV]) values of the R – Y and B – Y channels of the chroma signal and substitute the values into the following formula. ∆Sr = | (Crmax – Crmin)/200 | × 100 [%] ∆Sb = | (Cbmax – Cbmin)/200 | × 100 [%] – 10 – ICX097AKE 7. Dark signal Measure the average value of the Y signal output (Ydt [mV]) with the device ambient temperature 60°C and the device in the light-obstructed state, using the horizontal idle transfer level as a reference. 8. Dark signal shading After measuring 7, measure the maximum (Ydmax [mV]) and minimum (Ydmin [mV]) values of the Y signal output and substitute the values into the following formula. ∆Ydt = Ydmax – Ydmin [mV] 9. Flicker 1) Fy Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, and then measure the difference in the signal level between fields (∆Yf [mV]). Then substitute the value into the following formula. Fy = (∆Yf/200) × 100 [%] 2) Fcr, Fcb Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, insert an R or B filter, and then measure both the difference in the signal level between fields of the chroma signal (∆Cr, ∆Cb) as well as the average value of the chroma signal output (CAr, CAb). Substitute the values into the following formula. Fci = (∆Ci/CAi) × 100 [%] (i = r, b) 10. Line crawls Set to standard imaging condition II. Adjust the luminous intensity so that the average value of the Y signal output is 200mV, and then insert a white subject and R, G, and B filters and measure the difference between Y signal lines for the same field (∆Ylw, ∆Ylr, ∆Ylg, ∆Ylb [mV]). Substitute the values into the following formula. Lci = (∆Yli/200) × 100 [%] (i = w, r, g, b) 11. Lag Adjust the Y signal output value generated by strobe light to 200mV. After setting the strobe light so that it strobes with the following timing, measure the residual signal (Ylag). Substitute the value into the following formula. Lag = (Ylag/200) × 100 [%] FLD V1 Light Strobe light timing Y signal output 200mV Output – 11 – Ylag (lag) RG Hφ1 Hφ2 XV4 XSG2 XV3 XSG1 XV1 XV2 XSUB 16 5 11 10 22/20V 13 12 9 14 8 7 15 17 4 CXD1267AN 18 3 6 19 22/16V 0.01 1/35 V ICX097AKE (BOTTOM VIEW) 1/20V 100k 12 11 10 9 8 7 3.3/20V 0.01 1500p 2SK523 3.9k 100 6 5 4 3 2 3.3/16V 1 0.1 100k Vφ4 20 Vφ3 Hφ1 2 Vφ2 RG 1 Vφ1 VL 15V GND Hφ2 VOUT φSUB – 12 – VDD Drive Circuit 1M CCD OUT –7.5V ICX097AKE ICX097AKE Spectral Sensitivity Characteristics (excludes both lens characteristics and light source characteristics) 1.0 Ye 0.8 Cy Relative Response G 0.6 0.4 Mg 0.2 0.0 400 450 500 550 600 650 700 Wave Length [nm] Sensor Readout Clock Timing Chart V1 2.5 V2 Odd Field V3 V4 31.1 1.2 1.5 2.5 2.0 0.3 V1 V2 Even Field V3 V4 Unit : µs – 13 – – 14 – CCD OUT V4 V3 V2 V1 HD BLK VD FLD 582 581 625 1 2 3 4 5 620 Drive Timing Chart (Vertical Sync) 15 2 4 6 1 3 5 20 2 4 6 1 3 5 315 582 581 2 4 6 1 3 5 335 2 4 6 1 3 5 ICX097AKE 340 330 325 320 310 25 10 – 15 – SUB V4 V3 V2 V1 RG H2 H1 BLK HD 10 500 1 2 3 5 495 490 Drive Timing Chart (Horizontal Sync) ICX097AKE 7 1 2 3 5 15 16 1 2 3 5 10 1 2 3 5 30 25 20 15 ICX097AKE Notes on Handling 1) Static charge prevention CCD image sensors are easily damaged by static discharge. Before handling be sure to take the following protective measures. a) Either handle bare handed or use non-chargeable gloves, clothes or material. Also use conductive shoes. b) When handling directly use an earth band. c) Install a conductive mat on the floor or working table to prevent the generation of static electricity. d) Ionized air is recommended for discharge when handling CCD image sensor. e) For the shipment of mounted substrates, use boxes treated for the prevention of static charges. 2) Soldering a) Make sure the upper surface of ceramic package temperature does not exceed 80°C. b) Solder dipping in a mounting furnace causes damage to the glass and other defects. Use a ground 30W soldering iron and solder each pin in less than 2 seconds. For repairs and remount, cool sufficiently. c) To dismount an image sensor, do not use a solder suction equipment. When using an electric desoldering tool, use a thermal controller of the zero cross On/Off type and connect it to ground. 3) Dust and dirt protection Image sensors are packed and delivered by taking care of protecting its glass plates from harmful dust and dirt. Clean glass plates with the following operation as required, and use them. a) Perform all assembly operations in a clean room (class 1000 or less). b) Do not either touch glass plates by hand or have any object come in contact with glass surfaces. Should dirt stick to a glass surface, blow it off with an air blower. (For dirt stuck through static electricity ionized air is recommended.) c) Clean with a cotton bud and ethyl alcohol if the grease stained. Be careful not to scratch the glass. d) Keep in a case to protect from dust and dirt. To prevent dew condensation, preheat or precool when moving to a room with great temperature differences. 4) Installing (attaching) a) If a load is applied to the entire surface by a hard component, bending stress may be generated and the package may fracture, etc., depending on the flatness of the bottom of the package. Therefore, for installation, use either an elastic load, such as a spring plate, or an adhesive. b) The adhesive may cause the marking on the rear surface to disappear. c) If the metal, etc., clash or rub against the package, the dust may be generated by the fragments of package. d) Acrylate anaerobic adhesives are generally used to attach CCD image sensors. In addition, cyanoacrylate instantaneous adhesives are sometimes used jointly with acrylate anaerobic adhesives. (reference) 5) Others a) Do not expose to strong light (sun rays) for long periods, color filters will be discolored. When high luminance objects are imaged with the exposure level control by electronic-iris, the luminance of the image-plane may become excessive and discolor of the color filter will possibly be accelerated. In such a case, it is advisable that taking-lens with the automatic-iris and closing of the shutter during the power-off mode should be properly arranged. For continuous using under cruel condition exceeding the normal using condition, consult our company. b) Exposure to high temperature or humidity will affect the characteristics. Accordingly avoid storage or usage in such conditions. – 16 – – 17 – 6.82 10 - 1.27 C 1 12 H 3.36 5.52 6 7 8.22 (Recommendatory pin pitch) 4.11 V 3.53 A 0.40 1.8 6 7 120.60 1 12 D 9. Notches for the pilot pin and the guide pin must not be used for fixing. PACKAGE WEIGHT 0.44g 8. The thickness of the cover glass is 0.5mm, and the refractive index is 1.5. 7. The tilt of the effective image area relative to the bottom“D” is less than 25µm. GOLD PLATING LEAD TREATMENT LEAD MATERIAL 6. The height from the bottom “D” to the effective image area is 1.03 ± 0.15mm. Ceramic 5. The rotation angle of the effective image area relative to the line“B” is ± 1°. 4. The center of the effective image area, relative to“B” and “C” is (H, V) = (4.11,0) ± 0.15mm. 3. The bottom “D” of the package is the height reference. 2. The straight line “B” which passes through the center of the pilot pin and the middle point of the width of the notch for the guide pin is the reference axis of vertical direction (V). The straight line “C” which passes through the center of the pilot pin at right angle to vertical reference line“B” is the reference axis of horizontal direction (H). 1. “A” is the center of the effective image area. 0.50 2ø 1.0 (Recommendatory pin size) B Guide pin 2.30 ± 0.3 PACKAGE MATERIAL PACKAGE STRUCTURE 8.00 ± 0.2 Pilot pin 90° 12pin SON 2.43 9.25 ± 0.2 +0.13 1.0 - 0 Unit: mm 12 1.35 11 1.0 2.43 4.0 1.5 Package Outline ICX097AKE