XICOR X98027

X98027
Key Features
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Resolutions Up To QXGA 60Hz
250ps Long Term Jitter
64 Phase Choices
Zero Offset Error/Offset Drift
275MHz Triple Video Digitizer
with Digital PLL
PRELIMINARY INFORMATION
FEATURES
DESCRIPTION
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The X98027 3-channel, 8-bit Analog Front End (AFE) contains
all the components necessary to digitize analog RGB or YUV
graphics signals from personal computers, workstations and
video set-top boxes. The fully differential analog design provides
high PSRR and dynamic performance to meet the strigent
requirements of the graphics display industry. The 275MSPS
conversion rate supports resolutions up to QXGA at 60Hz
refresh rate, while the front end's high input bandwidth ensures
sharp images at the highest resolution.
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275MSPS maximum conversion rate
64 interpixel sampling positions
Low long-term PLL clock jitter (250ps p-p @ 275MSPS)
Programmable input bandwidth (100MHz to 780MHz)
2 channel input multiplexer
RGB and YUV 4:2:2 output formats
4 embedded voltage regulators allow operation from
single 3.3V supply and enhance performance, isolation
Completely independent 8 bit gain/10 bit offset control
CSYNC and SOG support
Trilevel Sync detection
1180mW typical PD @ 275MSPS
To minimize noise, the X98027's analog section features 2 sets
of pseudo-differential RGB inputs with programmable input
bandwidth, as well as internal DC restore clamping (including
mid-scale clamping for YUV signals). This is followed by the
programmable gain/offset stage and the three 275MSPS
Analog-to-Digital Converters (ADCs). All necessary reference
voltages are internally generated.
APPLICATIONS
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LCD Monitors and Projectors
Digital TVs
Plasma Display Panels
RGB Graphics Processing
Scan Converters
The X98027's digital PLL generates a pixel clock from the analog
source's HSYNC or SOG (Sync-On-Green) signals. Pixel clock
output frequencies range from 10MHz to 275MHz with long-term
clock jitter less than 250ps peak to peak.
BLOCK DIAGRAM
VCLAMP
RIN2
GIN2
Auto Black
Level
Compensation
VIN+
8
PGA
VIN-
+
VCLAMP
GIN1
RGBGND1
10
8 bit ADC
Offset
DAC
10
8
8
VIN+
PGA
VIN-
+
8 bit ADC
8
RGBGND2
VCLAMP
BIN1
BIN2
Offset
DAC
10
Auto Black
Level
Compensation
VIN+
VIN-
PGA
+
RP[7:0]
RS[7:0]
Auto Black
Level
Compensation
8 bit ADC
8
Output Data Formatter
RIN1
Offset
DAC
8
8
8
8
GP[7:0]
GS[7:0]
BP[7:0]
BS[7:0]
DATACLK
SOGIN1
SOGIN2
HSYNCIN1
HSYNCIN2
DATACLK
Sync
Processing
VSYNCIN1
AFE Configuration
and Control
HSOUT
VSOUT
VSYNCIN2
HSYNCOUT
VSYNCOUT
CLOCKINV
XTALIN
Digital PLL
XTALCLKOUT
XTALOUT
SCL
SDA
SADDR
REV 0.7 9/21/03
Serial
Interface
www.xicor.com
Characteristics subject to change without notice