1 XC95216 In-System Programmable CPLD August 21, 2001 (Version 3.1) 1 0* Product Specification Features Power Management • • 10 ns pin-to-pin logic delays on all pins fCNT to 111 MHz • • • 216 macrocells with 4800 usable gates Up to 166 user I/O pins 5 V in-system programmable - Endurance of 10,000 program/erase cycles - Program/erase over full commercial voltage and temperature range Enhanced pin-locking architecture Flexible 36V18 Function Block - 90 product terms drive any or all of 18 macrocells within Function Block - Global and product term clocks, output enables, set and reset signals Extensive IEEE Std 1149.1 boundary-scan (JTAG) support Programmable power reduction mode in each macrocell Slew rate control on individual outputs User programmable ground pin capability Extended pattern security features for design protection High-drive 24 mA outputs 3.3 V or 5 V I/O capability Advanced CMOS 5V FastFLASH technology Supports parallel programming of more than one XC9500 concurrently Available in 160-pin PQFP, 352-pin BGA, and 208-pin HQFP packages Power dissipation can be reduced in the XC95216 by configuring macrocells to standard or low-power modes of operation. Unused macrocells are turned off to minimize power dissipation. • • • • • • • • • • Description The XC95216 is a high-performance CPLD providing advanced in-system programming and test capabilities for general purpose logic integration. It is comprised of twelve 36V18 Function Blocks, providing 4,800 usable gates with propagation delays of 10 ns. See Figure 2 for the architecture overview. ICC (mA) = MCHP (1.7) + MCLP (0.9) + MC (0.006 mA/MHz) f Where: MCHP = Macrocells in high-performance mode MCLP = Macrocells in low-power mode MC = Total number of macrocells used f = Clock frequency (MHz) Figure 1 shows a typical calculation for the XC95216 device. 600 erform High P Typical ICC (mA) • • Operating current for each design can be approximated for specific operating conditions using the following equation: ance 400 (360) (500) (340) ower Low P 200 0 50 Clock Frequency (MHz) 100 X5918 Figure 1: Typical ICC vs. Frequency For XC95216 August 21, 2001 (Version 3.1) 1 R XC95216 In-System Programmable CPLD 3 JTAG Port 1 JTAG Controller In-System Programming Controller 36 18 I/O Function Block 1 Macrocells 1 to 18 I/O I/O I/O Blocks I/O I/O I/O FastCONNECT Switch Matrix I/O 36 18 Function Block 2 Macrocells 1 to 18 36 18 Function Block 3 Macrocells 1 to 18 I/O 3 I/O/GCK 36 1 I/O/GSR I/O/GTS 18 2 36 18 Function Block 4 Macrocells 1 to 18 Function Block 12 Macrocells 1 to 18 X5917 Figure 2: XC95216 Architecture Function Block outputs (indicated by the bold line) drive the I/O Blocks directly 2 August 21, 2001 (Version 3.1) R XC95216 In-System Programmable CPLD Absolute Maximum Ratings Symbol VCC VIN VTS TSTG TSOL Parameter Supply voltage relative to GND DC input voltage relative to GND Voltage applied to 3-state output with respect to GND Storage temperature Max soldering temperature (10 s @ 1/16 in = 1.5 mm) Value Units -0.5 to 7.0 -0.5 to VCC + 0.5 -0.5 to V CC + 0.5 -65 to +150 +260 V V V °C °C Warning: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those listed under Recommended Operating Conditions is not implied. Exposure to Absolute Maximum Rating conditions for extended periods of time may affect device reliability. Recommended Operating Conditions Symbol 1 Parameter VCCINT Supply voltage for internal logic and input buffer VCCIO Supply voltage for output drivers for 5 V operation Supply voltage for output drivers for 3.3 V operation Low-level input voltage High-level input voltage Output voltage VIL VIH VO Min Max Units 4.75 (4.5) 4.75 (4.5) 3.0 0 2.0 0 5.25 (5.5) 5.25 (5.5) 3.6 0.80 VCCINT +0.5 VCCIO V V V V V V Note: 1. Numbers in parenthesis are for industrial-temperature range versions. Endurance Characteristics Symbol Parameter tDR Data Retention NPE Program/Erase Cycles August 21, 2001 (Version 3.1) Min Max Units 20 - Years 10,000 - Cycles 3 R XC95216 In-System Programmable CPLD DC Characteristics Over Recommended Operating Conditions Symbol VOH Parameter Output high voltage for 5 V operation Output high voltage for 3.3 V operation VOL Output low voltage for 5 V operation Output low voltage for 3.3 V operation IIL Input leakage current IIH I/O high-Z leakage current CIN I/O capacitance ICC Operating Supply Current (low power mode, active) Test Conditions Min IOH = -4.0 mA VCC = Min IOH = -3.2 mA VCC = Min IOL = 24 mA VCC = Min IOL = 10 mA VCC = Min VCC = Max VIN = GND or VCC VCC = Max VIN = GND or VCC VIN = GND f = 1.0 MHz VI = GND, No load f = 1.0 MHz 2.4 Max Units V 2.4 V 0.5 V 0.4 V ±10.0 µA ±10.0 µA 10.0 pF 200 (typ) ma AC Characteristics Symbol tPD tSU tH tCO fCNT1 fSYSTEM 2 tPSU tPH tPCO tOE tOD tPOE tPOD tWLH Parameter I/O to output valid I/O setup time before GCK I/O hold time after GCK GCK to output valid 16-bit counter frequency Multiple FB internal operating frequency I/O setup time before p-term clock input I/O hold time after p-term clock input P-term clock to output valid GTS to output valid GTS to output disable Product term OE to output enabled Product term OE to output disabled GCK pulse width (High or Low) XC95216-10 XC95216-15 XC95216-20 Min Max Min 10.0 6.0 0.0 Min Max 15.0 8.0 0.0 6.0 111.1 66.7 2.0 4.0 20.0 8.0 10.0 83.3 50.0 4.0 6.0 12.0 11.0 11.0 14.0 14.0 5.5 Units 10.0 0.0 95.2 55.6 4.0 4.0 10.0 6.0 6.0 10.0 10.0 4.5 Max 16.0 16.0 16.0 18.0 18.0 5.5 ns ns ns ns MHz MHz ns ns ns ns ns ns ns ns Note: 1. fCNT is the fastest 16-bit counter frequency available, using the local feedback when applicable. fCNT is also the Export Control Maximum flip-flop toggle rate, fTOG. 2. fSYSTEM is the internal operating frequency for general purpose system designs spanning multiple FBs. 4 August 21, 2001 (Version 3.1) R XC95216 In-System Programmable CPLD VTEST R1 Output Type Device Output R2 VCCIO VTEST R1 R2 CL 5.0 V 5.0 V 160 Ω 120 Ω 35 pF 3.3 V 3.3 V 260 Ω 360 Ω 35 pF CL X5906 Figure 3: AC Load Circuit Internal Timing Parameters Symbol Parameter Buffer Delays tIN Input buffer delay tGCK GCK buffer delay tGSR GSR buffer delay tGTS GTS buffer delay tOUT Output buffer delay tEN Output buffer enable/disable delay Product Term Control Delays tPTCK Product term clock delay tPTSR Product term set/reset delay tPTTS Product term 3-state delay Internal Register and Combinatorial delays tPDI Combinatorial logic propagation delay tSUI Register setup time tHI Register hold time tCOI Register clock to output valid time tAOI Register async. S/R to output delay tRAI Register async. S/R recovery before clock tLOGI Internal logic delay tLOGILP Internal low power logic delay Feedback Delays tF FastCONNECT matrix feedback delay tLF Function Block local feeback delay Time Adders tPTA3 Incremental Product Term Allocator delay tSLEW Slew-rate limited delay XC95216-10 XC95216-15 XC95216-20 Min Max Min Max Min Max Units 3.5 2.5 6.0 6.0 3.0 0.0 4.5 3.0 7.5 11.0 4.5 0.0 6.5 3.0 9.5 16.0 6.5 0.0 ns ns ns ns ns ns 3.0 2.5 3.5 2.5 3.0 5.0 2.5 3.0 5.0 ns ns ns 4.0 1.0 2.5 11.0 3.0 11.5 3.0 11.5 ns ns ns ns ns ns ns ns 9.5 3.5 11.0 3.5 13.0 5.0 ns ns 1.0 4.5 1.0 5.0 1.5 5.5 ns ns 2.5 3.5 3.0 3.5 4.5 0.5 7.0 10.0 3.5 6.5 0.5 8.0 10.0 0.5 8.0 10.0 Note: 3. tPTA is multiplied by the span of the function as defined in the family data sheet. August 21, 2001 (Version 3.1) 5 R XC95216 In-System Programmable CPLD XC95216 I/O Pins Function Macrocell PQ160 HQ208 BG352 Block 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 1 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 – 18 19 – 21 22 – 23 24 – 25 26 – 27 28 29 30 – – 6 7 – 8 9 – 11 12 – 13 14 – 15 16 – 17 – – 22 23 28 25 30 – 31 32 12 33 34 – 35 36 37 38 – – 7 8 29 9 10 – 15 16 17 18 – 19 20 14 21 – – M25 M26 N26 N25 P23 – P24 R26 G26 R24 T26 – T25 T23 V26 U24 – – E25 G24 P25 F26 H23 – K23 K24 – J25 L24 – K25 L26 H25 M24 – BScan Order 645 642 639 636 633 630 627 624 621 618 615 612 609 606 603 600 597 594 591 588 585 582 579 576 573 570 567 564 561 558 555 552 549 546 543 540 Notes [1] [1] Function Macrocell PQ160 HQ208 BG352 Block 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 4 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 – 32 33 – 34 35 – 36 37 – 38 39 – 42 43 – 44 – – 152 153 – 154 155 – 156 158 – 159 2 – 3 4 – 5 – – 43 44 39 45 46 – 47 49 67 50 51 – 55 56 80 57 – – 198 199 196 200 201 – 202 205 206 3 – 4 5 203 6 – – AA26 Y24 U23 AB25 AA24 – Y23 AA23 AD18 AB24 AD25 – AD23 AF24 AE12 AE23 – – D18 A21 B19 B20 C20 – B22 B24 – C23 E23 – C26 E24 D20 F24 – BScan Order 537 534 531 528 525 522 519 516 513 510 507 504 501 498 495 492 489 486 483 480 477 474 471 468 465 462 459 456 453 450 447 444 441 438 435 432 Notes [1] [1] [1] [1] [1] [1] Note: 1. Global control pin. 6 August 21, 2001 (Version 3.1) R XC95216 In-System Programmable CPLD XC95216 I/O Pins (continued) Function Macrocell PQ160 HQ208 BG352 Block 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 5 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 6 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 – 45 47 – 48 49 – 50 52 – 53 54 – 55 56 – 57 – – 140 142 – 143 144 – 145 146 – 147 148 – 149 150 – 151 – August 21, 2001 (Version 3.1) – 58 60 41 61 63 – 64 70 109 71 72 – 73 74 40 75 – – 180 182 208 185 186 – 187 188 183 191 192 – 193 194 169 197 – – AE22 AE21 W25 AF21 AD19 – AE20 AF18 AD1 AE17 AE16 – AF16 AE14 Y26 AF14 – – A12 A13 D22 C14 A15 – B15 C15 B14 A16 C16 – C17 B18 D9 C19 – BScan Order 429 426 423 420 417 414 411 408 405 402 399 396 393 390 387 384 381 378 375 372 369 366 363 360 357 354 351 348 345 342 339 336 333 330 327 324 Notes Function Macrocell PQ160 HQ208 BG352 Block 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 7 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 – 58 59 – 60 62 – 63 64 – 65 66 – 67 68 – 69 – – 126 128 – 129 130 – 131 132 – 133 134 – 135 138 – 139 – – 76 77 54 78 82 – 83 84 91 85 86 – 87 88 48 89 – – 162 164 143 166 167 – 170 171 195 173 174 – 175 178 189 179 – – AE13 AC13 AE24 AD13 AD12 – AC12 AF11 AD8 AE11 AE9 – AD9 AC10 AC26 AF7 – – B5 B6 J1 D8 B7 – C10 B9 A20 A9 D11 – B11 C12 D15 B12 – BScan Order Notes 321 318 315 312 309 306 303 300 297 294 291 288 285 282 279 276 273 270 267 264 261 258 255 252 249 246 243 240 237 234 231 228 225 222 219 216 7 R XC95216 In-System Programmable CPLD XC95216 I/O Pins (continued) Function Macrocell PQ160 HQ208 BG352 Block 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 9 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 10 8 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 – 72 74 – 76 77 – 78 79 – 82 83 – 84 85 – 86 – – 113 114 – 115 116 – 117 118 – 119 122 – 123 124 – 125 – – 95 97 101 99 100 – 102 103 90 110 111 – 112 113 62 114 – – 147 148 144 149 150 – 152 154 168 155 158 – 159 160 165 161 – – AD7 AE5 AD4 AC7 AE3 – AC5 AD3 AE8 AA4 AB2 – AC1 AA2 AC19 AA1 – – H3 J4 K3 G2 G3 – E2 D2 A7 F4 B3 – A3 D6 A6 C6 – BScan Order 213 210 207 204 201 198 195 192 189 186 183 180 177 174 171 168 165 162 159 156 153 150 147 144 141 138 135 132 129 126 123 120 117 114 111 108 Notes Function Macrocell PQ160 HQ208 BG352 Block 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 11 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 – 87 88 – 89 90 – 91 92 – 93 95 – 96 97 – 98 – – 101 102 – 103 104 – 105 106 – 107 108 – 109 111 – 112 – – 115 116 119 117 118 – 121 122 107 123 125 – 126 127 120 128 – – 131 133 106 134 135 – 136 137 151 138 139 – 140 145 142 146 – – Y1 V4 U4 V3 W2 – V2 U2 AC3 T2 R4 – R3 R2 U3 R1 – – P1 N2 AD2 N4 N3 – M1 M3 F2 M4 L1 – L2 G1 L3 H2 – BScan Order Notes 105 102 99 96 93 90 87 84 81 78 75 72 69 66 63 60 57 54 51 48 45 42 39 36 33 30 27 24 21 18 15 12 9 6 3 0 August 21, 2001 (Version 3.1) R XC95216 In-System Programmable CPLD XC95216 Global, JTAG and Power Pins Pin Type PQ160 I/O/GCK1 I/O/GCK2 I/O/GCK3 I/O/GTS1 I/O/GTS2 I/O/GTS3 I/O/GTS4 I/O/GSR TCK TDI TDO TMS V CCINT 5 V VCCIO 3.3 V/5 V 33 35 42 6 8 2 4 159 75 71 136 73 10,46,94,157 1,41,61,81,121,141 GND 20, 31, 40, 51, 70, 80, 99, 100, 110, 120, 127, 137, 160 No Connects – August 21, 2001 (Version 3.1) HQ208 BG352 44 Y24 46 AA24 55 AD23 7 E25 9 F26 3 E23 5 E24 206 C23 98 AD6 94 AF6 176 D12 96 AE6 11, 59, 124, 153, 204 H24, AF23, T1, G4, C22 1, 26, 53, 65, 79, 92, 105, 132, A10, A17, B2, B25, D7, D13, 157, 172, 181, 184 D19, G23, H4, K1, K26, N23, P4, U1, U26, W23, Y4, AC8, AC14, AC20, AE25, AF10, AF17 2, 13, 24, 27, 42, 52, 66, 68, 69, A1, A2, A5, A8, A14, A19, A22, 81, 93, 104, 108, 129, 130, 141, A25, A26, B1, B26, C7, E1, E26, 156, 163, 177, 190, 207 H1, H26, N1, P3, P26, V23, W1, W26, AB1, AB4, AB26, AC9, AC17, AE1, AE26, AF1, AF2, AF5, AF8, AF13, AF19, AF20, AF22, AF25, AF26 – A4, A11, A18, A23, A24, B4, B8, B10, B13, B16, B17, B21, B23, C1, C2, C3, C4, C5, C8, C9, C11, C13, C18, C21, C24, C25, D1, D3, D4, D5, D10, D14, D16, D17, D21, D23, D24, D25, D26, E3, E4, F1, F3, F23, F25, G25, J2, J3, J23, J24, J26, K2, K4, L4, L23, L25, M2, M23, N24, P2, R23, R25, T3, T4, T24, U25, V1, V24, V25, W3, W4, W24, Y2, Y3, Y25, AA3, AA25, AB3, AB23, AC2, AC4, AC6, AC11, AC15, AC16, AC18, AC21, AC22, AC23, AC24, AC25, AD5, AD10, AD11, AD14, AD15, AD16, AD17, AD20, AD21, AD22, AD24, AD26, AE2, AE4, AE7, AE10, AE15, AE18, AE19, AF3, AF4, AF9, AF12, AF15 9 R XC95216 In-System Programmable CPLD Ordering Information XC95216 -10 HQ 208 C Device Type Temperature Range Number of Pins Speed Package Type Speed Options Packaging Options - 20 20 ns pin-to-pin delay -15 15 ns pin-to-pin delay -10 10 ns pin-to-pin delay PQ160 160-Pin Plastic Quad Flat Pack (PQFP) HQ208 208-Pin Heat Sink Quad Flat Pack (HQFP) BG352 352-Pin Ball Grid Array (BGA) Temperature Options C I Commercial 0°C to +70°C Industrial –40°C to +85°C Component Availability Pins Type Code XC95216 –20 –15 –10 160 Plastic PQFP PQ160 C(I) C(I) C(I) 208 Power QFP HQ208 C(I) C(I) C(I) 352 Plastic BGA BG352 C(I) C(I) C(I) C = Commercial = 0 °C to +70°C I = Industrial = –40 °C to +85°C Revision Control Date 12/4/98 8/21/01 10 Revision Update AC Characteristics and Internal Parameters Added Note 1 to page 6. August 21, 2001 (Version 3.1)